From patchwork Wed Jun 29 14:09:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12900137 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B943CC43334 for ; Wed, 29 Jun 2022 14:12:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233466AbiF2OMk (ORCPT ); Wed, 29 Jun 2022 10:12:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233964AbiF2OMc (ORCPT ); Wed, 29 Jun 2022 10:12:32 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFDA02EA28; Wed, 29 Jun 2022 07:12:31 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 4D50DB8249B; Wed, 29 Jun 2022 14:12:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EFE40C34114; Wed, 29 Jun 2022 14:12:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656511949; bh=lR7ZwSAWF+pA7EbW6aJNgBB7QMveHeptOeicRhPqt3w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=P5ay69S8xdtKXmQ5I15QvuCir9V7FKY73SDHRB2G/DZtFvPKn3oVNNgRFvJkRctnu HN3n++hMJWDEcQJaVD5NKkA4GYJIjNvFPhZMyfv3WUx9vlBa8w3F/TanQc9F8h61eT WBfPZN0ZQcH9tFlrFCPSBhXmR/qxpCfyecQbWtpBsh/ZH/jfbZtSblUkG/TGnTjq2Q XBunFSUldovd1H/+lotIiuk4b3N2HXs3XDfCbi/GZ4DKqUW2Yc0klfVz0NdfkUfuyM ZNguMuTx0ps2nfIWasx3lOfuErki/CWe80/Nn7gNJxlQNQ1J+Ikz4edIZMS+KHkrOD DEm6h9WvjNcSw== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o6YQe-0004l8-CK; Wed, 29 Jun 2022 16:12:28 +0200 From: Johan Hovold To: Bjorn Helgaas , Lorenzo Pieralisi Cc: Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , Andy Gross , Bjorn Andersson , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 01/10] dt-bindings: PCI: qcom: Fix reset conditional Date: Wed, 29 Jun 2022 16:09:51 +0200 Message-Id: <20220629141000.18111-2-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220629141000.18111-1-johan+linaro@kernel.org> References: <20220629141000.18111-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Fix the reset conditional which always evaluated to true due to a misspelled property name ("compatibles" in plural). Fixes: 6700a9b00f0a ("dt-bindings: PCI: qcom: Do not require resets on msm8996 platforms") Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov Acked-by: Krzysztof Kozlowski Reviewed-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 7e84063afe25..ed9f9462a758 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -615,7 +615,7 @@ allOf: - if: not: properties: - compatibles: + compatible: contains: enum: - qcom,pcie-msm8996 From patchwork Wed Jun 29 14:09:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12900138 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B931CCA489 for ; Wed, 29 Jun 2022 14:12:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234024AbiF2OMl (ORCPT ); Wed, 29 Jun 2022 10:12:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233936AbiF2OMb (ORCPT ); Wed, 29 Jun 2022 10:12:31 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A80E92F007; Wed, 29 Jun 2022 07:12:30 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 4187E61EDC; Wed, 29 Jun 2022 14:12:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 08526C341CB; Wed, 29 Jun 2022 14:12:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656511949; bh=BcVf9zGOO0RH2knLw0DhaZp1AodwzllZNO48giZBxQE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LstHweX0rNQX9CxIVzoQVfmqlQEezAH/foe79ueSQ398Ts2G0dbTthNLvnO5teOVG UMFow718sN5w+pmwPiG8r3bTNowOAeKy0p2j3I/4NTrsBgGsCnBVNAFlWFCR2WZEts s3wC4ZGJ2PHCGQedsLTBwgYvDtXMhAWbUNyV3AQr7ELJPJY5J/izsrtOSzO5jOfN3T rVYbPsL9aikgemhBcppTIW1nSWmhE2dG/pfZ7qmKM1A0PXq40R1iMXMC9f7BCNg5wp xePHuSJ3KzsjcRJw40E1yuSXjxRuQE0k6iWSNmEZWb1ugBk1fYulWIx5ZoVA9zyeb0 Be2pr7ArMqrMw== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o6YQe-0004lA-Ep; Wed, 29 Jun 2022 16:12:28 +0200 From: Johan Hovold To: Bjorn Helgaas , Lorenzo Pieralisi Cc: Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , Andy Gross , Bjorn Andersson , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 02/10] dt-bindings: PCI: qcom: Fix msi-interrupt conditional Date: Wed, 29 Jun 2022 16:09:52 +0200 Message-Id: <20220629141000.18111-3-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220629141000.18111-1-johan+linaro@kernel.org> References: <20220629141000.18111-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Fix the msi-interrupt conditional which always evaluated to false due to a misspelled property name ("compatibles" in plural). Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov Acked-by: Krzysztof Kozlowski Reviewed-by: Dmitry Baryshkov Reviewed-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index ed9f9462a758..a1b4fc70e162 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -628,7 +628,7 @@ allOf: # On older chipsets it's always 1 msi interrupt - if: properties: - compatibles: + compatible: contains: enum: - qcom,pcie-msm8996 From patchwork Wed Jun 29 14:09:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12900143 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE029C433EF for ; Wed, 29 Jun 2022 14:12:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230192AbiF2OMo (ORCPT ); Wed, 29 Jun 2022 10:12:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233934AbiF2OMa (ORCPT ); Wed, 29 Jun 2022 10:12:30 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 17C222E9FC; Wed, 29 Jun 2022 07:12:30 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A5A6660F6A; Wed, 29 Jun 2022 14:12:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 00A07C385A2; Wed, 29 Jun 2022 14:12:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656511949; bh=6LChm1cY49hcWreDbWyQGCmRXOsMW3NMD3tsuxoELSM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZqbLA21Vyp+7vCSot6CkMVTBHkbVSQ/0TjsbVi/R4T2Nd2MeQyhWCfvOhxuaZgis7 fl07vvkXg+biAvTBoYnnlid+FOPuQ9q+EEW6wH61UMCNsNHuV1GvYzTRUcm+DEOyla Uxxc0Mv/B5bKP8aemW5fhW5cwHhQqKRXi+asozZRUukljhqeJZqlSRwx8EuyTOWWCB fj8N8Bds4j6+6b9ikTYgigUnETrRdX0AjH8TRFXGXD6oEWdkHnw+BY6YfZCDczgpQL Ho3Ak1lCdNjY8Pqk/eKlTJEYjImjFdsu+8sNxBMhpmCoVTkLnsyYcj2wd9eETHZ0H8 5TtyRBw4S4DpA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o6YQe-0004lC-HM; Wed, 29 Jun 2022 16:12:28 +0200 From: Johan Hovold To: Bjorn Helgaas , Lorenzo Pieralisi Cc: Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , Andy Gross , Bjorn Andersson , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 03/10] dt-bindings: PCI: qcom: Enumerate platforms with single msi interrupt Date: Wed, 29 Jun 2022 16:09:53 +0200 Message-Id: <20220629141000.18111-4-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220629141000.18111-1-johan+linaro@kernel.org> References: <20220629141000.18111-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Explicitly enumerate the older platforms that have a single msi host interrupt. This allows for adding further platforms without resorting to nested conditionals. Drop the redundant comment about older chipsets instead of moving it. Signed-off-by: Johan Hovold Reviewed-by: Manivannan Sadhasivam --- .../devicetree/bindings/pci/qcom,pcie.yaml | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index a1b4fc70e162..8560c65e6f0b 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -625,7 +625,6 @@ allOf: - reset-names # On newer chipsets support either 1 or 8 msi interrupts - # On older chipsets it's always 1 msi interrupt - if: properties: compatible: @@ -660,7 +659,21 @@ allOf: - const: msi5 - const: msi6 - const: msi7 - else: + + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-apq8064 + - qcom,pcie-apq8084 + - qcom,pcie-ipq4019 + - qcom,pcie-ipq6018 + - qcom,pcie-ipq8064 + - qcom,pcie-ipq8064-v2 + - qcom,pcie-ipq8074 + - qcom,pcie-qcs404 + then: properties: interrupts: maxItems: 1 From patchwork Wed Jun 29 14:09:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12900141 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66371CCA490 for ; Wed, 29 Jun 2022 14:12:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232883AbiF2OMm (ORCPT ); Wed, 29 Jun 2022 10:12:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233970AbiF2OMd (ORCPT ); Wed, 29 Jun 2022 10:12:33 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C02FD2F007; Wed, 29 Jun 2022 07:12:31 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 4E07BB824B4; Wed, 29 Jun 2022 14:12:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 02DE6C385A9; Wed, 29 Jun 2022 14:12:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656511949; bh=Ybk6ow1WhS4jPdMO+h86i8MGNxoNOL/Xh3nptBoiZjk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bweNzf1VKU9JMjx4NtzFvC2VdF2zfoWUkMNkRcOwI1WAZZ2BSiYRNXRVl/3FORamF CjNg+0rwe7IvRU0F0pTufVLs7GnRPeJ9bsvQTxWr7kU7wJzcl9wvOhb4TYgX2ZwkPz BiB/p6KLMw+AIX/b+xyGiBklWijB8eQWvgbCav4Ezoj1Pl4MZB93NgBOPmEASqjSmR jlF6uHgYv3yekXZ5V97bH3xQkS68rxw3rrDT0CAYEioQKSTcaS1YvsS2JlPeewtng5 beCh0BNDYItDOCKcsKZnJHYJ024Mlidg4H6vi5LFk4GxehE6UtApSaQecjneTlzzry TBRSyb4k+FYzA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o6YQe-0004lE-Jt; Wed, 29 Jun 2022 16:12:28 +0200 From: Johan Hovold To: Bjorn Helgaas , Lorenzo Pieralisi Cc: Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , Andy Gross , Bjorn Andersson , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 04/10] dt-bindings: PCI: qcom: Add SC8280XP to binding Date: Wed, 29 Jun 2022 16:09:54 +0200 Message-Id: <20220629141000.18111-5-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220629141000.18111-1-johan+linaro@kernel.org> References: <20220629141000.18111-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add the SC8280XP platform to the binding. SC8280XP use four host interrupts for MSI routing so remove the obsolete comment referring to newer chipsets supporting one or eight interrupts (e.g. for backwards compatibility). Signed-off-by: Johan Hovold Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/pci/qcom,pcie.yaml | 50 ++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 8560c65e6f0b..a039f6110322 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -27,6 +27,7 @@ properties: - qcom,pcie-qcs404 - qcom,pcie-sc7280 - qcom,pcie-sc8180x + - qcom,pcie-sc8280xp - qcom,pcie-sdm845 - qcom,pcie-sm8150 - qcom,pcie-sm8250 @@ -181,6 +182,7 @@ allOf: enum: - qcom,pcie-sc7280 - qcom,pcie-sc8180x + - qcom,pcie-sc8280xp - qcom,pcie-sm8250 - qcom,pcie-sm8450-pcie0 - qcom,pcie-sm8450-pcie1 @@ -596,6 +598,35 @@ allOf: items: - const: pci # PCIe core reset + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-sc8280xp + then: + properties: + clocks: + minItems: 8 + maxItems: 9 + clock-names: + minItems: 8 + items: + - const: aux # Auxiliary clock + - const: cfg # Configuration clock + - const: bus_master # Master AXI clock + - const: bus_slave # Slave AXI clock + - const: slave_q2a # Slave Q2A clock + - const: ddrss_sf_tbu # PCIe SF TBU clock + - const: noc_aggr_4 # NoC aggregate 4 clock + - const: noc_aggr_south_sf # NoC aggregate South SF clock + - const: cnoc_qx # Configuration NoC QX clock + resets: + maxItems: 1 + reset-names: + items: + - const: pci # PCIe core reset + - if: not: properties: @@ -624,7 +655,6 @@ allOf: - resets - reset-names - # On newer chipsets support either 1 or 8 msi interrupts - if: properties: compatible: @@ -660,6 +690,24 @@ allOf: - const: msi6 - const: msi7 + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-sc8280xp + then: + properties: + interrupts: + minItems: 4 + maxItems: 4 + interrupt-names: + items: + - const: msi0 + - const: msi1 + - const: msi2 + - const: msi3 + - if: properties: compatible: From patchwork Wed Jun 29 14:09:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12900142 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41AB8CCA482 for ; Wed, 29 Jun 2022 14:12:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233744AbiF2OMn (ORCPT ); Wed, 29 Jun 2022 10:12:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233968AbiF2OMc (ORCPT ); Wed, 29 Jun 2022 10:12:32 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C02622ED5B; Wed, 29 Jun 2022 07:12:31 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 4C1D7B823E1; Wed, 29 Jun 2022 14:12:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F2429C341C8; Wed, 29 Jun 2022 14:12:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656511949; bh=bIvjUkXa9IPjW38Ewt2LnVD5DIrb2+7etgxeumjBb1s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qU5UD+2yFDJZqXVgaE9pVzAGSytEsODwKyTwXT+E2iUvFtr7lYU6Ml137CgjAF6ow AUYyy+tqqm0fCQ6ZurEKO7Hwvay9h24K1RHxnMPNMJRL16LPxCtPW4ECu1obeGWMoF PIkSYNRjgY4E7K3eDrz17vw9Qlj+TcWz+278a1wTeDD4o7x5Wj+daHzj4XXZdaW3g9 90QUhZnI3CTH8FwYZBA/BpFGGQwYbtauUodcvJfKJdMUAmPm//Vef3Ka+ADAv0ZE9l zH4V1OFKMhsbdMi7n0rVhqfjfvG58cKRU2iYXq3Yj3cJmCX0/580CElIIposgLxz+O WGB46YsTN6xSw== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o6YQe-0004lG-N8; Wed, 29 Jun 2022 16:12:28 +0200 From: Johan Hovold To: Bjorn Helgaas , Lorenzo Pieralisi Cc: Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , Andy Gross , Bjorn Andersson , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 05/10] dt-bindings: PCI: qcom: Add SA8540P to binding Date: Wed, 29 Jun 2022 16:09:55 +0200 Message-Id: <20220629141000.18111-6-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220629141000.18111-1-johan+linaro@kernel.org> References: <20220629141000.18111-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org SA8540P is a new platform related to SC8280XP but which uses a single host interrupt for MSI routing. Signed-off-by: Johan Hovold --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index a039f6110322..e9a7c8c783e7 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -25,6 +25,7 @@ properties: - qcom,pcie-ipq4019 - qcom,pcie-ipq8074 - qcom,pcie-qcs404 + - qcom,pcie-sa8540p - qcom,pcie-sc7280 - qcom,pcie-sc8180x - qcom,pcie-sc8280xp @@ -603,6 +604,7 @@ allOf: compatible: contains: enum: + - qcom,pcie-sa8540p - qcom,pcie-sc8280xp then: properties: @@ -720,6 +722,7 @@ allOf: - qcom,pcie-ipq8064 - qcom,pcie-ipq8064-v2 - qcom,pcie-ipq8074 + - qcom,pcie-sa8540p - qcom,pcie-qcs404 then: properties: From patchwork Wed Jun 29 14:09:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12900140 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49489CCA48C for ; Wed, 29 Jun 2022 14:12:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233936AbiF2OMl (ORCPT ); Wed, 29 Jun 2022 10:12:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233987AbiF2OMf (ORCPT ); Wed, 29 Jun 2022 10:12:35 -0400 Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00E322E08E; Wed, 29 Jun 2022 07:12:33 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id F2FF2CE2489; Wed, 29 Jun 2022 14:12:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0ED2AC341CD; Wed, 29 Jun 2022 14:12:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656511949; bh=OKbfDOFsHJpH/aKP85UzWCpP7dM3YaM+DQIPp7aJ2Bs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rV0kcX2ohR6AdRNN4JqBj7nfNLn1pXsSyFXqDheZ2J7Kgy4M/Mz3Iv3N+ArTGq+30 vFp4qsLmnqNwxzaaTjW+jY6vkZPuSZWSYVTPxLOO0mITk8fPFWP3ODn+4M5eMeTcXr STcjrIVoMTpf7cUjCqybKUQZfSEvW1Ks8Wqf2nByZe3nOSpq97ztY0GTzwQczk6+/D 0sgFSRNSLv0DHj7ZxZq8+JGio49WK+8DfzP9g8Gi6h+cO+jGKKoYXfo7DK56BqL3q5 SNsQbd8WOhabMbfUHhw7zhXP9i66L/J/su4zrj3dKnyswngKvDhbg2KHBgfx6sssst DpVgTMFtUn8xQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o6YQe-0004lI-QN; Wed, 29 Jun 2022 16:12:28 +0200 From: Johan Hovold To: Bjorn Helgaas , Lorenzo Pieralisi Cc: Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , Andy Gross , Bjorn Andersson , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 06/10] PCI: qcom: Add support for SC8280XP Date: Wed, 29 Jun 2022 16:09:56 +0200 Message-Id: <20220629141000.18111-7-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220629141000.18111-1-johan+linaro@kernel.org> References: <20220629141000.18111-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The SC8280XP platform has seven PCIe controllers: two used with USB4, two 4-lane, two 2-lane and one 1-lane. Add a new "qcom,pcie-sc8280xp" compatible string and reuse the 1.9.0 ops. Note that the SC8280XP controllers need two or three interconnect clocks to be enabled. Model these as optional clocks to avoid encoding devicetree data in the PCIe driver. Note that the same could be done for the SM8450 interconnect clocks and possibly also for the TBU clocks. Signed-off-by: Johan Hovold Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index ff1b40f213c1..da3f1cdc4ba6 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -160,7 +160,7 @@ struct qcom_pcie_resources_2_3_3 { /* 6 clocks typically, 7 for sm8250 */ struct qcom_pcie_resources_2_7_0 { - struct clk_bulk_data clks[9]; + struct clk_bulk_data clks[12]; int num_clks; struct regulator_bulk_data supplies[2]; struct reset_control *pci_reset; @@ -1119,6 +1119,7 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0; struct dw_pcie *pci = pcie->pci; struct device *dev = pci->dev; + unsigned int num_clks, num_opt_clks; unsigned int idx; int ret; @@ -1148,9 +1149,20 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) if (pcie->cfg->has_aggre1_clk) res->clks[idx++].id = "aggre1"; + num_clks = idx; + + ret = devm_clk_bulk_get(dev, num_clks, res->clks); + if (ret < 0) + return ret; + + res->clks[idx++].id = "noc_aggr_4"; + res->clks[idx++].id = "noc_aggr_south_sf"; + res->clks[idx++].id = "cnoc_qx"; + + num_opt_clks = idx - num_clks; res->num_clks = idx; - ret = devm_clk_bulk_get(dev, res->num_clks, res->clks); + ret = devm_clk_bulk_get_optional(dev, num_opt_clks, res->clks + num_clks); if (ret < 0) return ret; @@ -1449,6 +1461,11 @@ static const struct qcom_pcie_cfg ipq4019_cfg = { .ops = &ops_2_4_0, }; +static const struct qcom_pcie_cfg sc8280xp_cfg = { + .ops = &ops_1_9_0, + .has_ddrss_sf_tbu_clk = true, +}; + static const struct qcom_pcie_cfg sdm845_cfg = { .ops = &ops_2_7_0, .has_tbu_clk = true, @@ -1613,6 +1630,7 @@ static const struct of_device_id qcom_pcie_match[] = { { .compatible = "qcom,pcie-sm8150", .data = &sm8150_cfg }, { .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg }, { .compatible = "qcom,pcie-sc8180x", .data = &sc8180x_cfg }, + { .compatible = "qcom,pcie-sc8280xp", .data = &sc8280xp_cfg }, { .compatible = "qcom,pcie-sm8450-pcie0", .data = &sm8450_pcie0_cfg }, { .compatible = "qcom,pcie-sm8450-pcie1", .data = &sm8450_pcie1_cfg }, { .compatible = "qcom,pcie-sc7280", .data = &sc7280_cfg }, From patchwork Wed Jun 29 14:09:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12900139 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C0B2CCA47C for ; Wed, 29 Jun 2022 14:12:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234031AbiF2OMm (ORCPT ); Wed, 29 Jun 2022 10:12:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233971AbiF2OMd (ORCPT ); Wed, 29 Jun 2022 10:12:33 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55F882E08E; Wed, 29 Jun 2022 07:12:32 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id DCF32B824B7; Wed, 29 Jun 2022 14:12:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0AE27C341CE; Wed, 29 Jun 2022 14:12:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656511949; bh=v0eVaS3PBQTamh6cRAXZ5AqGfuYojlDjnveI93v18rE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jIPyXyanWiEFs6QCHay6xZzD5iRqofl69DvTGzoudch6PR3bEji/pv1rvqcpm6XvR U44YDKBIdgVq2anWg2rlCoX9vZcgsTmXS6aC0MsmpNnb/2tTH6Qz57v1iyZF2QmlOw k10EuB5YvWHKBWhwQJezY/93Tat8SxNk9fRLaQPz5/cuHtf1lFWrBmGwkHBfEju1AR /RP/U8Q5sp7wvXrCR7274LpHkE8UpYESu+R6EueWYyjh9+Ni9ZdsVsvJ/PWdQvH+Zg YFnKZ4x5PpHBwUqJJJjGxwuaYFFTUONX973x1zv2On3eiSpFNLD5aD0bkzK31Wdmpu bphks+e7Rx7uA== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o6YQe-0004lN-TX; Wed, 29 Jun 2022 16:12:28 +0200 From: Johan Hovold To: Bjorn Helgaas , Lorenzo Pieralisi Cc: Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , Andy Gross , Bjorn Andersson , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 07/10] PCI: qcom: Add support for SA8540P Date: Wed, 29 Jun 2022 16:09:57 +0200 Message-Id: <20220629141000.18111-8-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220629141000.18111-1-johan+linaro@kernel.org> References: <20220629141000.18111-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The SA8540P platform has five PCIe controllers: two 4-lane, two 2-lane and one 1-lane. Add a new "qcom,pcie-sa8540p" compatible string and reuse the 1.9.0 ops. Note that like for SC8280XP, the SA8540 controllers need two or three interconnect clocks to be enabled. Signed-off-by: Johan Hovold Reviewed-by: Rob Herring Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index da3f1cdc4ba6..8ab88e5743da 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1461,6 +1461,11 @@ static const struct qcom_pcie_cfg ipq4019_cfg = { .ops = &ops_2_4_0, }; +static const struct qcom_pcie_cfg sa8540p_cfg = { + .ops = &ops_1_9_0, + .has_ddrss_sf_tbu_clk = true, +}; + static const struct qcom_pcie_cfg sc8280xp_cfg = { .ops = &ops_1_9_0, .has_ddrss_sf_tbu_clk = true, @@ -1626,6 +1631,7 @@ static const struct of_device_id qcom_pcie_match[] = { { .compatible = "qcom,pcie-ipq8074", .data = &ipq8074_cfg }, { .compatible = "qcom,pcie-ipq4019", .data = &ipq4019_cfg }, { .compatible = "qcom,pcie-qcs404", .data = &ipq4019_cfg }, + { .compatible = "qcom,pcie-sa8540p", .data = &sa8540p_cfg }, { .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg }, { .compatible = "qcom,pcie-sm8150", .data = &sm8150_cfg }, { .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg }, From patchwork Wed Jun 29 14:09:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12900144 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59D05CCA491 for ; Wed, 29 Jun 2022 14:12:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233472AbiF2OMp (ORCPT ); Wed, 29 Jun 2022 10:12:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41504 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233986AbiF2OMf (ORCPT ); Wed, 29 Jun 2022 10:12:35 -0400 Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A0D82EA28; Wed, 29 Jun 2022 07:12:34 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 4AB70CE2742; Wed, 29 Jun 2022 14:12:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2554BC36AF2; Wed, 29 Jun 2022 14:12:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656511949; bh=BBR83r4Z8wYISqoy9N8mcRo90majWxT9oz32aYE16B4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gew/QVJJ/o5eGLVzrXqIw7oT9Dk9Rrn/kVBT+qcMXVua0irWxj/utDhGeiXF9OrGG saeCu8T87R2lWeXzyt2IKpNsVlPhKTeUo6+dX2hQ+chlmf0vYlEWnSHmuNfLAnWOZI 4AgopHSEcpuijvC0BBDpJMDnBD43nNgoDJrP88sBmqwggq1uWeKHAW6P8f6HybXSsD F8TrxmaC/FcIJCPYqo9VNMA2UJldNkxWMr909qFHGgEtWFWewGT8Xi1W70nKee/RiE faq5hSuy+YLOfErfQOolgJOVM4EG9NqTHMUgdBMxZHa4tktzwh1DDmUHMJTfqUu/JX oZgTsyLZw3VFQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o6YQf-0004lS-0X; Wed, 29 Jun 2022 16:12:29 +0200 From: Johan Hovold To: Bjorn Helgaas , Lorenzo Pieralisi Cc: Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , Andy Gross , Bjorn Andersson , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 08/10] PCI: qcom: Make all optional clocks optional Date: Wed, 29 Jun 2022 16:09:58 +0200 Message-Id: <20220629141000.18111-9-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220629141000.18111-1-johan+linaro@kernel.org> References: <20220629141000.18111-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The kernel is not a devicetree validator and does not need to re-encode information which is already available in the devicetree. This is specifically true for the optional PCIe clocks, some of which are really interconnect clocks. Treat also the 2.7.0 optional clocks as truly optional instead of maintaining a list of clocks per compatible (including two compatible strings for the two identical controllers on sm8450) just to validate the devicetree. Signed-off-by: Johan Hovold Reviewed-by: Rob Herring Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom.c | 28 ++++---------------------- 1 file changed, 4 insertions(+), 24 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 8ab88e5743da..1a564f624bb1 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -189,10 +189,6 @@ struct qcom_pcie_ops { struct qcom_pcie_cfg { const struct qcom_pcie_ops *ops; - unsigned int has_tbu_clk:1; - unsigned int has_ddrss_sf_tbu_clk:1; - unsigned int has_aggre0_clk:1; - unsigned int has_aggre1_clk:1; }; struct qcom_pcie { @@ -1140,14 +1136,6 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) res->clks[idx++].id = "bus_master"; res->clks[idx++].id = "bus_slave"; res->clks[idx++].id = "slave_q2a"; - if (pcie->cfg->has_tbu_clk) - res->clks[idx++].id = "tbu"; - if (pcie->cfg->has_ddrss_sf_tbu_clk) - res->clks[idx++].id = "ddrss_sf_tbu"; - if (pcie->cfg->has_aggre0_clk) - res->clks[idx++].id = "aggre0"; - if (pcie->cfg->has_aggre1_clk) - res->clks[idx++].id = "aggre1"; num_clks = idx; @@ -1155,6 +1143,10 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie) if (ret < 0) return ret; + res->clks[idx++].id = "tbu"; + res->clks[idx++].id = "ddrss_sf_tbu"; + res->clks[idx++].id = "aggre0"; + res->clks[idx++].id = "aggre1"; res->clks[idx++].id = "noc_aggr_4"; res->clks[idx++].id = "noc_aggr_south_sf"; res->clks[idx++].id = "cnoc_qx"; @@ -1463,17 +1455,14 @@ static const struct qcom_pcie_cfg ipq4019_cfg = { static const struct qcom_pcie_cfg sa8540p_cfg = { .ops = &ops_1_9_0, - .has_ddrss_sf_tbu_clk = true, }; static const struct qcom_pcie_cfg sc8280xp_cfg = { .ops = &ops_1_9_0, - .has_ddrss_sf_tbu_clk = true, }; static const struct qcom_pcie_cfg sdm845_cfg = { .ops = &ops_2_7_0, - .has_tbu_clk = true, }; static const struct qcom_pcie_cfg sm8150_cfg = { @@ -1485,31 +1474,22 @@ static const struct qcom_pcie_cfg sm8150_cfg = { static const struct qcom_pcie_cfg sm8250_cfg = { .ops = &ops_1_9_0, - .has_tbu_clk = true, - .has_ddrss_sf_tbu_clk = true, }; static const struct qcom_pcie_cfg sm8450_pcie0_cfg = { .ops = &ops_1_9_0, - .has_ddrss_sf_tbu_clk = true, - .has_aggre0_clk = true, - .has_aggre1_clk = true, }; static const struct qcom_pcie_cfg sm8450_pcie1_cfg = { .ops = &ops_1_9_0, - .has_ddrss_sf_tbu_clk = true, - .has_aggre1_clk = true, }; static const struct qcom_pcie_cfg sc7280_cfg = { .ops = &ops_1_9_0, - .has_tbu_clk = true, }; static const struct qcom_pcie_cfg sc8180x_cfg = { .ops = &ops_1_9_0, - .has_tbu_clk = true, }; static const struct dw_pcie_ops dw_pcie_ops = { From patchwork Wed Jun 29 14:09:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12900136 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0567ACCA486 for ; Wed, 29 Jun 2022 14:12:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234017AbiF2OMj (ORCPT ); Wed, 29 Jun 2022 10:12:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233947AbiF2OMb (ORCPT ); Wed, 29 Jun 2022 10:12:31 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9DB52F00C; Wed, 29 Jun 2022 07:12:30 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 72BDD61EF8; Wed, 29 Jun 2022 14:12:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 24B76C36AEF; Wed, 29 Jun 2022 14:12:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656511949; bh=HMlPrE3X5aQIHuAtwXXyjVkMKPqZ5kosdfNVJMYAnVU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VzLmsnnbgwfLcx4UK/ZMBQPZ6Reve8fWaDUJoLX0sTn0epFBiTdnHRNWiF9ObbBN4 IsUY815sVaubHy31IVlGMlzoKAVoB114aaA97cfz16nXNvBmEHSpC7jX0Hrz/lXAlx uCHkoX1iaUlKCtokM1myGWytp4Qj2qCxZLxmZRaz2RISUJN8fK1ncFla7QdlPsMnr4 CRkejkglO0YeUGe0XWWuWLnHLwoTcF/T/Bzgq97mdq6guog0Sf3EfKfijfxm6XSikS fJnyl2xvtJJJeaKQNlgcgDCCIL/Ex+CCJxr6mssZfEz6YFElP3gHFCLr0ZWlIM+Yz1 bQrSXown037Kg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o6YQf-0004lV-3T; Wed, 29 Jun 2022 16:12:29 +0200 From: Johan Hovold To: Bjorn Helgaas , Lorenzo Pieralisi Cc: Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , Andy Gross , Bjorn Andersson , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 09/10] PCI: qcom: Clean up IP configurations Date: Wed, 29 Jun 2022 16:09:59 +0200 Message-Id: <20220629141000.18111-10-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220629141000.18111-1-johan+linaro@kernel.org> References: <20220629141000.18111-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The various IP versions have different configurations that are encoded in separate sets of operation callbacks. Currently, there is no need for also maintaining corresponding sets of data parameters, but it is conceivable that these may again be found useful (e.g. to implement minor variations of the operation callbacks). Rename the default configuration structures after the IP version they apply to so that they can more easily be reused by different SoCs. Note that SoC specific configurations can be added later if need arises (e.g. cfg_sc8280xp). Signed-off-by: Johan Hovold Reviewed-by: Rob Herring Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom.c | 85 ++++++++------------------ 1 file changed, 27 insertions(+), 58 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 1a564f624bb1..567601679465 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1433,65 +1433,34 @@ static const struct qcom_pcie_ops ops_1_9_0 = { .config_sid = qcom_pcie_config_sid_sm8250, }; -static const struct qcom_pcie_cfg apq8084_cfg = { +static const struct qcom_pcie_cfg cfg_1_0_0 = { .ops = &ops_1_0_0, }; -static const struct qcom_pcie_cfg ipq8064_cfg = { +static const struct qcom_pcie_cfg cfg_1_9_0 = { + .ops = &ops_1_9_0, +}; + +static const struct qcom_pcie_cfg cfg_2_1_0 = { .ops = &ops_2_1_0, }; -static const struct qcom_pcie_cfg msm8996_cfg = { +static const struct qcom_pcie_cfg cfg_2_3_2 = { .ops = &ops_2_3_2, }; -static const struct qcom_pcie_cfg ipq8074_cfg = { +static const struct qcom_pcie_cfg cfg_2_3_3 = { .ops = &ops_2_3_3, }; -static const struct qcom_pcie_cfg ipq4019_cfg = { +static const struct qcom_pcie_cfg cfg_2_4_0 = { .ops = &ops_2_4_0, }; -static const struct qcom_pcie_cfg sa8540p_cfg = { - .ops = &ops_1_9_0, -}; - -static const struct qcom_pcie_cfg sc8280xp_cfg = { - .ops = &ops_1_9_0, -}; - -static const struct qcom_pcie_cfg sdm845_cfg = { +static const struct qcom_pcie_cfg cfg_2_7_0 = { .ops = &ops_2_7_0, }; -static const struct qcom_pcie_cfg sm8150_cfg = { - /* sm8150 has qcom IP rev 1.5.0. However 1.5.0 ops are same as - * 1.9.0, so reuse the same. - */ - .ops = &ops_1_9_0, -}; - -static const struct qcom_pcie_cfg sm8250_cfg = { - .ops = &ops_1_9_0, -}; - -static const struct qcom_pcie_cfg sm8450_pcie0_cfg = { - .ops = &ops_1_9_0, -}; - -static const struct qcom_pcie_cfg sm8450_pcie1_cfg = { - .ops = &ops_1_9_0, -}; - -static const struct qcom_pcie_cfg sc7280_cfg = { - .ops = &ops_1_9_0, -}; - -static const struct qcom_pcie_cfg sc8180x_cfg = { - .ops = &ops_1_9_0, -}; - static const struct dw_pcie_ops dw_pcie_ops = { .link_up = qcom_pcie_link_up, .start_link = qcom_pcie_start_link, @@ -1603,23 +1572,23 @@ static int qcom_pcie_remove(struct platform_device *pdev) } static const struct of_device_id qcom_pcie_match[] = { - { .compatible = "qcom,pcie-apq8084", .data = &apq8084_cfg }, - { .compatible = "qcom,pcie-ipq8064", .data = &ipq8064_cfg }, - { .compatible = "qcom,pcie-ipq8064-v2", .data = &ipq8064_cfg }, - { .compatible = "qcom,pcie-apq8064", .data = &ipq8064_cfg }, - { .compatible = "qcom,pcie-msm8996", .data = &msm8996_cfg }, - { .compatible = "qcom,pcie-ipq8074", .data = &ipq8074_cfg }, - { .compatible = "qcom,pcie-ipq4019", .data = &ipq4019_cfg }, - { .compatible = "qcom,pcie-qcs404", .data = &ipq4019_cfg }, - { .compatible = "qcom,pcie-sa8540p", .data = &sa8540p_cfg }, - { .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg }, - { .compatible = "qcom,pcie-sm8150", .data = &sm8150_cfg }, - { .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg }, - { .compatible = "qcom,pcie-sc8180x", .data = &sc8180x_cfg }, - { .compatible = "qcom,pcie-sc8280xp", .data = &sc8280xp_cfg }, - { .compatible = "qcom,pcie-sm8450-pcie0", .data = &sm8450_pcie0_cfg }, - { .compatible = "qcom,pcie-sm8450-pcie1", .data = &sm8450_pcie1_cfg }, - { .compatible = "qcom,pcie-sc7280", .data = &sc7280_cfg }, + { .compatible = "qcom,pcie-apq8084", .data = &cfg_1_0_0 }, + { .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 }, + { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, + { .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 }, + { .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 }, + { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 }, + { .compatible = "qcom,pcie-ipq4019", .data = &cfg_2_4_0 }, + { .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 }, + { .compatible = "qcom,pcie-sa8540p", .data = &cfg_1_9_0 }, + { .compatible = "qcom,pcie-sdm845", .data = &cfg_2_7_0 }, + { .compatible = "qcom,pcie-sm8150", .data = &cfg_1_9_0 }, + { .compatible = "qcom,pcie-sm8250", .data = &cfg_1_9_0 }, + { .compatible = "qcom,pcie-sc8180x", .data = &cfg_1_9_0 }, + { .compatible = "qcom,pcie-sc8280xp", .data = &cfg_1_9_0 }, + { .compatible = "qcom,pcie-sm8450-pcie0", .data = &cfg_1_9_0 }, + { .compatible = "qcom,pcie-sm8450-pcie1", .data = &cfg_1_9_0 }, + { .compatible = "qcom,pcie-sc7280", .data = &cfg_1_9_0 }, { } }; MODULE_DEVICE_TABLE(of, qcom_pcie_match); From patchwork Wed Jun 29 14:10:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12900134 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F03ACCCA47C for ; Wed, 29 Jun 2022 14:12:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233940AbiF2OMi (ORCPT ); Wed, 29 Jun 2022 10:12:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233949AbiF2OMb (ORCPT ); Wed, 29 Jun 2022 10:12:31 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 115832E9FC; Wed, 29 Jun 2022 07:12:31 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9EC0E61EF2; Wed, 29 Jun 2022 14:12:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 95FA1C341DF; Wed, 29 Jun 2022 14:12:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656511949; bh=RzV9WoW/wVhCUJ1SeVlcZLX/bhXZa+s9p20TuF8bp6o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Y5S/p55QvOe8QAcheqPSPRPpCc04mcV1/47atDTMRzuZwN4wOYmDgxEon1KJDxTRG OmcPwpeP7sSfpk2xzGH8FrTSy3PYX3FZrpIcvwgoW644Zz6HtA3CUymTsh1Yd38Dju hk+z2LEo//GiUD9fuZETvrMewzAiDswH450f8riFjApl69F0VaYNZtnx4ZqH6/9Axs x4deDFHAq/Tyrv2llnBtgRnakABfHmy7YnUS1jSzJM178RBFkDTKlaaabKj8llYE7Y qsKOmR57o7Wx9BTGaFpTNQOzPqvA/I1A4l634zqMpIHxL/TjdFAJJq9oAwbQoi6aea c27oQuRFsAb+Q== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o6YQf-0004lX-6h; Wed, 29 Jun 2022 16:12:29 +0200 From: Johan Hovold To: Bjorn Helgaas , Lorenzo Pieralisi Cc: Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , Andy Gross , Bjorn Andersson , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 10/10] PCI: qcom: Sort device-id table Date: Wed, 29 Jun 2022 16:10:00 +0200 Message-Id: <20220629141000.18111-11-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220629141000.18111-1-johan+linaro@kernel.org> References: <20220629141000.18111-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Sort the device-id table entries alphabetically by compatible string to make it easier to find entries and add new ones. Signed-off-by: Johan Hovold --- drivers/pci/controller/dwc/pcie-qcom.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 567601679465..093f4d4bc15d 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1572,23 +1572,23 @@ static int qcom_pcie_remove(struct platform_device *pdev) } static const struct of_device_id qcom_pcie_match[] = { + { .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-apq8084", .data = &cfg_1_0_0 }, { .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, - { .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 }, - { .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 }, { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 }, { .compatible = "qcom,pcie-ipq4019", .data = &cfg_2_4_0 }, - { .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 }, + { .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 }, { .compatible = "qcom,pcie-sa8540p", .data = &cfg_1_9_0 }, + { .compatible = "qcom,pcie-sc7280", .data = &cfg_1_9_0 }, + { .compatible = "qcom,pcie-sc8180x", .data = &cfg_1_9_0 }, + { .compatible = "qcom,pcie-sc8280xp", .data = &cfg_1_9_0 }, { .compatible = "qcom,pcie-sdm845", .data = &cfg_2_7_0 }, { .compatible = "qcom,pcie-sm8150", .data = &cfg_1_9_0 }, { .compatible = "qcom,pcie-sm8250", .data = &cfg_1_9_0 }, - { .compatible = "qcom,pcie-sc8180x", .data = &cfg_1_9_0 }, - { .compatible = "qcom,pcie-sc8280xp", .data = &cfg_1_9_0 }, { .compatible = "qcom,pcie-sm8450-pcie0", .data = &cfg_1_9_0 }, { .compatible = "qcom,pcie-sm8450-pcie1", .data = &cfg_1_9_0 }, - { .compatible = "qcom,pcie-sc7280", .data = &cfg_1_9_0 }, + { .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 }, { } }; MODULE_DEVICE_TABLE(of, qcom_pcie_match);