From patchwork Fri Jul 1 08:20:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 12902938 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3BCAECCA479 for ; Fri, 1 Jul 2022 08:21:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F19510F457; Fri, 1 Jul 2022 08:21:22 +0000 (UTC) Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by gabe.freedesktop.org (Postfix) with ESMTPS id 49A3010F425 for ; Fri, 1 Jul 2022 08:21:21 +0000 (UTC) Received: by mail-pj1-x1029.google.com with SMTP id x1-20020a17090abc8100b001ec7f8a51f5so5758608pjr.0 for ; Fri, 01 Jul 2022 01:21:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3JX/iuVBCiH5yj/WHuJ1/f+3WaqUl5eDHzSMUfsG02Q=; b=oXr6tPXGRlwJyo7ncqnJ8UPZRb3uawOmoReKvVpwTiZjWFBXYflSM7jEaKzg8PZYPE dD/4ilotL0U7US5/tlJkTQmmuzQKM0G/yZFuhApDntNmMoKE/AVOST/FGLSgcrwIg6Ta P9DRyk09nOuLX3FhQ8BKO6hZrP1HDaUoTf5E8YxYOPBfNl3O4QiTqdMDTC5QvmAm0XgL LfzMOWe1uBs53DHy7YUSfj97XsELS/VwZMIKr+LaxQ8Pdshf9gt3DvKbl6oGyX02DQDc 8nOMM223R5lXDqAY0SJ1Hsu5QI3pT7pzqUqAZzWIrhfwUqai0bSpy66fdZnMiMEpi7Jq pE2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3JX/iuVBCiH5yj/WHuJ1/f+3WaqUl5eDHzSMUfsG02Q=; b=jzdpam0nlnZ2R4WH68rb0ZTZYVNrI8wCHW0szboojk9C84M6Kb4V2nFRutedo/cB94 XboG2iWfS0YSbF1vJE7UmxsPj0n+QEe+uVgP+EHmaEjvbTW6iSVg/k3xwBwTEKY0BlYd Lk5J8A/qOmd5hkQQ3pDAVEbpaCiCDQQX/KmBoJQp11jOnxW/Jjpgug9NzgB1QYYswgJ3 5WfaNnZ6aehjw5pMqFDKP8fbpLIR5epu4CjwJQUgwG4/XBs6wWi//c2QIKO60XhMHN0x tmU/B836rkY2WWsdF7r+UirSRahgkSxEUcp4leCXIlyp4sH5Vyklb7+e5XNDdH40L6eU 7MoQ== X-Gm-Message-State: AJIora8eF2FUUKuUP+4lZ31D6wf1o0sSJsljMEjNcwLO9wYLtdAjak/b oIFL2/E2p96UbDa7zboo8MQLVA== X-Google-Smtp-Source: AGRyM1v9z853kLDeBAeq79Scb9HDzro3Uyn0gVbpfMw6suMfjPhB2mkfyUWMkJIrsml3S0jT+kWzwA== X-Received: by 2002:a17:903:40cd:b0:16a:2dcf:408f with SMTP id t13-20020a17090340cd00b0016a2dcf408fmr18611553pld.18.1656663680823; Fri, 01 Jul 2022 01:21:20 -0700 (PDT) Received: from localhost ([122.172.201.58]) by smtp.gmail.com with ESMTPSA id b21-20020a17090a8c9500b001ec8d191db4sm5883557pjo.17.2022.07.01.01.21.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Jul 2022 01:21:20 -0700 (PDT) From: Viresh Kumar To: Qiang Yu Subject: [PATCH V2 13/30] drm/lima: Migrate to dev_pm_opp_set_config() Date: Fri, 1 Jul 2022 13:50:08 +0530 Message-Id: <9e65578ab96ae33acbe7bcba664ef65663fff938.1656660185.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Vincent Guittot , lima@lists.freedesktop.org, "Rafael J. Wysocki" , Stephen Boyd , Viresh Kumar , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Signed-off-by: Viresh Kumar --- drivers/gpu/drm/lima/lima_devfreq.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/lima/lima_devfreq.c b/drivers/gpu/drm/lima/lima_devfreq.c index 8989e215dfc9..d8c67843fa1b 100644 --- a/drivers/gpu/drm/lima/lima_devfreq.c +++ b/drivers/gpu/drm/lima/lima_devfreq.c @@ -111,6 +111,12 @@ int lima_devfreq_init(struct lima_device *ldev) struct dev_pm_opp *opp; unsigned long cur_freq; int ret; + struct dev_pm_opp_config config = { + .regulator_names = (const char *[]){ "mali" }, + .regulator_count = 1, + .clk_names = (const char *[]){ "core" }, + .clk_count = 1, + }; if (!device_property_present(dev, "operating-points-v2")) /* Optional, continue without devfreq */ @@ -118,11 +124,7 @@ int lima_devfreq_init(struct lima_device *ldev) spin_lock_init(&ldevfreq->lock); - ret = devm_pm_opp_set_clkname(dev, "core"); - if (ret) - return ret; - - ret = devm_pm_opp_set_regulators(dev, (const char *[]){ "mali" }, 1); + ret = devm_pm_opp_set_config(dev, &config); if (ret) { /* Continue if the optional regulator is missing */ if (ret != -ENODEV) From patchwork Fri Jul 1 08:20:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 12902939 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CACEFC433EF for ; Fri, 1 Jul 2022 08:21:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EC31E10F4B5; Fri, 1 Jul 2022 08:21:25 +0000 (UTC) Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) by gabe.freedesktop.org (Postfix) with ESMTPS id 94F3B10F4AE for ; Fri, 1 Jul 2022 08:21:24 +0000 (UTC) Received: by mail-pl1-x62c.google.com with SMTP id k14so1717404plh.4 for ; Fri, 01 Jul 2022 01:21:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jb0snNKbqdGMcNSHmZUstipe/vA8ntyU7tLSAh8qCE4=; b=EmWdXESfxTD6CClfgXeW3XMNSv/G8xk8QvfxlF5biP6edTuTajQaVQMVDMpOdy7Fuv MwktxJ+WJTVnMxJhs1Gt4E6SyL9e0EQF3iWsiK/Aifv7j0qHi6OiVTmSQ1dunx/oI6ty bY8yGaJDED/u5I76xENmYt5NI3WaoCl+80vM3DMnJWlKurKeE2tZ6SzpuqU3dfPSRHJh E7NAgHUpWVjxfDsLEWGa636YIKIemPdqiFQEgVykN8HoNsjUSMcIIQPW5sDXdqkWtnmU 8+9h5nbQKWOjn7ZdmKio1PcWeIPAzY0nvAROsypuOs3sPOZvKhBZLZLJx4jsTf4+bhcg sgmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jb0snNKbqdGMcNSHmZUstipe/vA8ntyU7tLSAh8qCE4=; b=ZzNEw+DCpEqklT/ZZtWbbSv9U0840u9VaPrh8kwf2PpZs1dXmUJveUekcHqXi3y1Dx WoC9dq1qyJWfuHHD76OoY+SNx8vrxdnTYQzZbOH5RPnZCumS3OcOljLCMVNfrclw5X0x xE0eA3nM7eeu07vFrwX977WfwCvd4UvfEImVGBlE7CicJOj22Vmyt2kNLfkn8r5GpDhp +xCb0F1J3p+JnfebUTPeAZaAeykf16fSPVkhqR5nXXB0rqeieRBToUFuorH9zfiq7riV IWP0cxZamTkyN/Nzygz/u72UCf9sLoFoBn9U0Et0fjqfsKZlFqgO5yscWsMmLbs1unoM mZpg== X-Gm-Message-State: AJIora+iPKycaY7VARSTFA3QREDCYV4LW+u3gd8UM2fjCHzH0V5UvkTf 6jOdQwgbxIxJbI/DW3n3H4aYlw== X-Google-Smtp-Source: AGRyM1u7YOcVYA6e7JC8Afc3cO0uF+FowHj00X8PP+5fdNddz6P/PTLix/S0GqoELPlK91hqfqoM/g== X-Received: by 2002:a17:90a:e2c5:b0:1ec:ea7f:a85c with SMTP id fr5-20020a17090ae2c500b001ecea7fa85cmr15486494pjb.232.1656663684098; Fri, 01 Jul 2022 01:21:24 -0700 (PDT) Received: from localhost ([122.172.201.58]) by smtp.gmail.com with ESMTPSA id e12-20020a170902784c00b0016a35649186sm14830427pln.195.2022.07.01.01.21.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Jul 2022 01:21:23 -0700 (PDT) From: Viresh Kumar To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul Subject: [PATCH V2 14/30] drm/msm: Migrate to dev_pm_opp_set_config() Date: Fri, 1 Jul 2022 13:50:09 +0530 Message-Id: <31b74e43d3af263e1b943bca1dd3debe885521d8.1656660185.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Vincent Guittot , "Rafael J. Wysocki" , Stephen Boyd , Viresh Kumar , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Signed-off-by: Viresh Kumar --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 8 ++++++-- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 10 +++++----- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 6 +++++- drivers/gpu/drm/msm/dp/dp_ctrl.c | 6 +++++- drivers/gpu/drm/msm/dsi/dsi_host.c | 6 +++++- 5 files changed, 26 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index c424e9a37669..6ebb5a28c501 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -1723,10 +1723,14 @@ static void check_speed_bin(struct device *dev) { struct nvmem_cell *cell; u32 val; + struct dev_pm_opp_config config = { + .supported_hw = &val, + .supported_hw_count = 1, + }; /* * If the OPP table specifies a opp-supported-hw property then we have - * to set something with dev_pm_opp_set_supported_hw() or the table + * to set something with dev_pm_opp_set_config() or the table * doesn't get populated so pick an arbitrary value that should * ensure the default frequencies are selected but not conflict with any * actual bins @@ -1748,7 +1752,7 @@ static void check_speed_bin(struct device *dev) nvmem_cell_put(cell); } - devm_pm_opp_set_supported_hw(dev, &val, 1); + devm_pm_opp_set_config(dev, &config); } struct msm_gpu *a5xx_gpu_init(struct drm_device *dev) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 42ed9a3c4905..82801311f7d4 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1800,6 +1800,10 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev) u32 supp_hw = UINT_MAX; u32 speedbin; int ret; + struct dev_pm_opp_config config = { + .supported_hw = &supp_hw, + .supported_hw_count = 1, + }; ret = adreno_read_speedbin(dev, &speedbin); /* @@ -1818,11 +1822,7 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev) supp_hw = fuse_to_supp_hw(dev, rev, speedbin); done: - ret = devm_pm_opp_set_supported_hw(dev, &supp_hw, 1); - if (ret) - return ret; - - return 0; + return devm_pm_opp_set_config(dev, &config); } static const struct adreno_gpu_funcs funcs = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index e23e2552e802..2213ce52d2fa 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1215,12 +1215,16 @@ static int dpu_kms_init(struct drm_device *ddev) struct dev_pm_opp *opp; int ret = 0; unsigned long max_freq = ULONG_MAX; + struct dev_pm_opp_config config = { + .clk_names = (const char *[]){ "core" }, + .clk_count = 1, + }; dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL); if (!dpu_kms) return -ENOMEM; - ret = devm_pm_opp_set_clkname(dev, "core"); + ret = devm_pm_opp_set_config(dev, &config); if (ret) return ret; /* OPP table is optional */ diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index b7f5b8d3bbd6..0c8fc151b4be 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -2022,6 +2022,10 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, { struct dp_ctrl_private *ctrl; int ret; + struct dev_pm_opp_config config = { + .clk_names = (const char *[]){ "ctrl_link" }, + .clk_count = 1, + }; if (!dev || !panel || !aux || !link || !catalog) { @@ -2035,7 +2039,7 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, return ERR_PTR(-ENOMEM); } - ret = devm_pm_opp_set_clkname(dev, "ctrl_link"); + ret = devm_pm_opp_set_config(dev, &config); if (ret) { dev_err(dev, "invalid DP OPP table in device tree\n"); /* caller do PTR_ERR(opp_table) */ diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index a95d5df52653..35b6722d1cf9 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -2034,6 +2034,10 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi) struct msm_dsi_host *msm_host = NULL; struct platform_device *pdev = msm_dsi->pdev; int ret; + struct dev_pm_opp_config config = { + .clk_names = (const char *[]){ "byte" }, + .clk_count = 1, + }; msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL); if (!msm_host) { @@ -2095,7 +2099,7 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi) goto fail; } - ret = devm_pm_opp_set_clkname(&pdev->dev, "byte"); + ret = devm_pm_opp_set_config(&pdev->dev, &config); if (ret) return ret; /* OPP table is optional */ From patchwork Fri Jul 1 08:20:10 2022 Content-Type: text/plain; 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Fri, 01 Jul 2022 01:21:26 -0700 (PDT) Received: from localhost ([122.172.201.58]) by smtp.gmail.com with ESMTPSA id i4-20020a17090aee8400b001eb162ffaa3sm5884839pjz.25.2022.07.01.01.21.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Jul 2022 01:21:26 -0700 (PDT) From: Viresh Kumar To: Rob Herring , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig Subject: [PATCH V2 15/30] drm/panfrost: Migrate to dev_pm_opp_set_config() Date: Fri, 1 Jul 2022 13:50:10 +0530 Message-Id: <1179832f813aafc02c408b65765f299e7f668ad3.1656660185.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Vincent Guittot , "Rafael J. Wysocki" , Stephen Boyd , Viresh Kumar , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Acked-by: Steven Price Signed-off-by: Viresh Kumar --- drivers/gpu/drm/panfrost/panfrost_devfreq.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c index 194af7f607a6..7826d9366d35 100644 --- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c +++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c @@ -91,6 +91,10 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) struct devfreq *devfreq; struct thermal_cooling_device *cooling; struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; + struct dev_pm_opp_config config = { + .regulator_names = pfdev->comp->supply_names, + .regulator_count = pfdev->comp->num_supplies, + }; if (pfdev->comp->num_supplies > 1) { /* @@ -101,13 +105,12 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) return 0; } - ret = devm_pm_opp_set_regulators(dev, pfdev->comp->supply_names, - pfdev->comp->num_supplies); + ret = devm_pm_opp_set_config(dev, &config); if (ret) { /* Continue if the optional regulator is missing */ if (ret != -ENODEV) { if (ret != -EPROBE_DEFER) - DRM_DEV_ERROR(dev, "Couldn't set OPP regulators\n"); + DRM_DEV_ERROR(dev, "Couldn't set OPP config\n"); return ret; } } From patchwork Fri Jul 1 08:20:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 12902941 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A9032C433EF for ; Fri, 1 Jul 2022 08:21:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B48BF10F481; Fri, 1 Jul 2022 08:21:30 +0000 (UTC) Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by gabe.freedesktop.org (Postfix) with ESMTPS id 22E9510F4CB for ; Fri, 1 Jul 2022 08:21:30 +0000 (UTC) Received: by mail-pj1-x102b.google.com with SMTP id i8-20020a17090aee8800b001ecc929d14dso4882134pjz.0 for ; Fri, 01 Jul 2022 01:21:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=63pbLSKne9f5UCaDcrJmMmenMVeEUp+bxWKacPvU73Q=; b=PRw8pWiNZY18pWGJgVJIoN7OQ1s2yw48mle6GY/4XbqXfOM8W+/dPuxPjnVsAfDGVD A8m3pSEoZP2W9Wg38cQ0bbaNVAzWswoC+nKCFc5XCEUUvMoqG+yW9f+wcJB9/ETVNZdE nKZmCNjpve7XuRAN7ahyVkdcfDMzxh43YpC8OXHMdkvtfaGo7J4qx9vShhtdTpHbehD5 wVHcFFMn7nLHFi/wvIRCCZVlt95Rq/qbO3FoUn/v11UMiq4rPMaLoG3T6vdbH0dMdE+P 8U33SaenNIGQFDAOssieTM5n/BXEZBYaAw6ptyOuBYLvlncREiMhWug52kkrzT9h7GP7 raLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=63pbLSKne9f5UCaDcrJmMmenMVeEUp+bxWKacPvU73Q=; b=bJAkpyA8xpMEA1ADuRy6uL26q5qULnN5koXKFh7xuFIwRrW4ru5H1uEC9G9zKhglCe XIBtFcMeviToh8b8iNKeX8ObEtQdBHIKSaH7dFIchphUwHVz9Ln7jR5hIyEJIAC+NoZN RNMkc91eH628WS4pA0M8qggJif3QFarfVSyRsXoZSI4mm0AYLiAy8FLs0dj3/a60Z1+D xchB9iGhevtM0F9rVmvRqcJBb9oDqLu6dGxm96hejQ9GCCko1ZC0m+N90cWbbFxLdqhs +fhBcstXPKHoACBVQBF8l93I89iUu0b8qj4Bd8bdI+fy1gSGf/SV5vEtPkgLsfKPYH/r A9ug== X-Gm-Message-State: AJIora/j+mrc7OqDkrxwQQ7sI+cqLrE6d4RW4y0LqiBRYN8BpkHOla6h hNsM/GVYOXSUftFv41aDsxJyZQ== X-Google-Smtp-Source: AGRyM1uxAmkNLUVQoSG5Xz0/hnQf267BwGjWNVZUTXaOfD1kC8GpNyCWX61Jw76VoQZ5wANEVlh6sw== X-Received: by 2002:a17:902:e84a:b0:16a:5435:b5fc with SMTP id t10-20020a170902e84a00b0016a5435b5fcmr20837549plg.119.1656663689707; Fri, 01 Jul 2022 01:21:29 -0700 (PDT) Received: from localhost ([122.172.201.58]) by smtp.gmail.com with ESMTPSA id d59-20020a17090a6f4100b001ec7ba41fe7sm6182063pjk.48.2022.07.01.01.21.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Jul 2022 01:21:29 -0700 (PDT) From: Viresh Kumar To: Thierry Reding , Jonathan Hunter Subject: [PATCH V2 16/30] drm/tegra: Migrate to dev_pm_opp_set_config() Date: Fri, 1 Jul 2022 13:50:11 +0530 Message-Id: X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Vincent Guittot , "Rafael J. Wysocki" , Stephen Boyd , Viresh Kumar , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Dmitry Osipenko , linux-tegra@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The OPP core now provides a unified API for setting all configuration types, i.e. dev_pm_opp_set_config(). Lets start using it. Tested-by: Dmitry Osipenko Signed-off-by: Viresh Kumar --- drivers/gpu/drm/tegra/gr3d.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/tegra/gr3d.c b/drivers/gpu/drm/tegra/gr3d.c index a1fd3113ea96..05c45c104e13 100644 --- a/drivers/gpu/drm/tegra/gr3d.c +++ b/drivers/gpu/drm/tegra/gr3d.c @@ -389,6 +389,10 @@ static int gr3d_init_power(struct device *dev, struct gr3d *gr3d) struct device_link *link; unsigned int i; int err; + struct dev_pm_opp_config config = { + .genpd_names = opp_genpd_names, + .virt_devs = &opp_virt_devs, + }; err = of_count_phandle_with_args(dev->of_node, "power-domains", "#power-domain-cells"); @@ -421,7 +425,7 @@ static int gr3d_init_power(struct device *dev, struct gr3d *gr3d) if (dev->pm_domain) return 0; - err = devm_pm_opp_attach_genpd(dev, opp_genpd_names, &opp_virt_devs); + err = devm_pm_opp_set_config(dev, &config); if (err) return err;