From patchwork Mon Jul 4 11:45:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12905162 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7489C433EF for ; Mon, 4 Jul 2022 11:46:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233685AbiGDLqK (ORCPT ); Mon, 4 Jul 2022 07:46:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56996 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233506AbiGDLqI (ORCPT ); Mon, 4 Jul 2022 07:46:08 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 301DC11467; Mon, 4 Jul 2022 04:46:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1656935168; x=1688471168; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sufTxRaRVYvZj0YOF6g5IdKoqVMEpHWnvnxJ+xlHy4E=; b=tk7QUBQs+EDNjPRFuF3GCPh3f5fuGQWpbkrWXQPrB5V55QhkZ/bgouSA A7C/Ge+iz6NizHrXCymzVYY9jhMLJgUliydc6yc1f8JhG/O48CO6jW0hF STVancjimOZi8hSkqvXpxqThNa4dA/aJv05vmDVo4YhHcITuk/NSOw5UB cKlB6VgHgStbxnEhJPfU/zy/x15/nwaNBdtY9GTQjwRQbaCW3RWlCb6yx YOQLhO69cloc8OMrm0kzzAwtJYijxFbGIoC8Nyiaqpzo2WDq03h9w9v38 qXgciSrmsLmd5bjfjHAdThl0vG7IGCFsagx15wWnSvQgvyhPj7Pdxx5aJ A==; X-IronPort-AV: E=Sophos;i="5.92,243,1650956400"; d="scan'208";a="102905904" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 04 Jul 2022 04:46:07 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 4 Jul 2022 04:46:06 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 4 Jul 2022 04:46:03 -0700 From: Conor Dooley To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Nicolas Ferre , Claudiu Beznea CC: , , , , "Conor Dooley" , Rob Herring Subject: [net-next PATCH v2 1/5] dt-bindings: net: cdns,macb: document polarfire soc's macb Date: Mon, 4 Jul 2022 12:45:08 +0100 Message-ID: <20220704114511.1892332-2-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220704114511.1892332-1-conor.dooley@microchip.com> References: <20220704114511.1892332-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Until now the PolarFire SoC (MPFS) has been using the generic "cdns,macb" compatible but has optional reset support. Add a specific compatible which falls back to the currently used generic binding. Acked-by: Rob Herring Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/net/cdns,macb.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml index 86fc31c2d91b..9c92156869b2 100644 --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -28,6 +28,7 @@ properties: - enum: - cdns,at91sam9260-macb # Atmel at91sam9 SoCs - cdns,sam9x60-macb # Microchip sam9x60 SoC + - microchip,mpfs-macb # Microchip PolarFire SoC - const: cdns,macb # Generic - items: From patchwork Mon Jul 4 11:45:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12905163 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55141C433EF for ; Mon, 4 Jul 2022 11:46:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233271AbiGDLqP (ORCPT ); Mon, 4 Jul 2022 07:46:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57070 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233709AbiGDLqL (ORCPT ); Mon, 4 Jul 2022 07:46:11 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA57011472; Mon, 4 Jul 2022 04:46:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1656935170; x=1688471170; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NL1XdhwWv4eZJEkhqkXDdPRC7SJOg8Mko/Ziu/ZBb+M=; b=c6PDQC62w4ca682ubsuMbtUtsjVWue3UajZ508U3ISibbzXMOKYx+4qr 4cNBX8b7trZlL9Urd37iQquTvaVvRcdTd7cGp36DurFczYZ11K/wup0OI 1Hh9oZA8332E6NE4mDPWIHREy2l16kFa8321zQL33LapqGdzmjwQJLHEQ /PAmCV+rqYSAku6ugdIPciN+4jb86RET6mohnTkwGBItfVFLVV/P+8e2c 54ffaeNVhAst3x94Qg3vXoEFR4gnBk8PX1XFTuFMnLH7oREvmWQ8kZYlr 7snbjU/y5vJlRyNJNW20K8DbpCi9fdbrNKnvYsBIo7gvG9hqM7qO0ymYV Q==; X-IronPort-AV: E=Sophos;i="5.92,243,1650956400"; d="scan'208";a="102905919" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 04 Jul 2022 04:46:09 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 4 Jul 2022 04:46:09 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 4 Jul 2022 04:46:06 -0700 From: Conor Dooley To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Nicolas Ferre , Claudiu Beznea CC: , , , , "Conor Dooley" Subject: [net-next PATCH v2 2/5] net: macb: add polarfire soc reset support Date: Mon, 4 Jul 2022 12:45:09 +0100 Message-ID: <20220704114511.1892332-3-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220704114511.1892332-1-conor.dooley@microchip.com> References: <20220704114511.1892332-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org To date, the Microchip PolarFire SoC (MPFS) has been using the cdns,macb compatible, however the generic device does not have reset support. Add a new compatible & .data for MPFS to hook into the reset functionality added for zynqmp support (and make the zynqmp init function generic in the process). Signed-off-by: Conor Dooley --- drivers/net/ethernet/cadence/macb_main.c | 26 ++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index d89098f4ede8..d43bcf256b02 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4689,34 +4689,32 @@ static const struct macb_config np4_config = { .usrio = &macb_default_usrio, }; -static int zynqmp_init(struct platform_device *pdev) +static int init_reset_optional(struct platform_device *pdev) { struct net_device *dev = platform_get_drvdata(pdev); struct macb *bp = netdev_priv(dev); int ret; if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) { - /* Ensure PS-GTR PHY device used in SGMII mode is ready */ + /* Ensure PHY device used in SGMII mode is ready */ bp->sgmii_phy = devm_phy_optional_get(&pdev->dev, NULL); if (IS_ERR(bp->sgmii_phy)) { ret = PTR_ERR(bp->sgmii_phy); dev_err_probe(&pdev->dev, ret, - "failed to get PS-GTR PHY\n"); + "failed to get SGMII PHY\n"); return ret; } ret = phy_init(bp->sgmii_phy); if (ret) { - dev_err(&pdev->dev, "failed to init PS-GTR PHY: %d\n", + dev_err(&pdev->dev, "failed to init SGMII PHY: %d\n", ret); return ret; } } - /* Fully reset GEM controller at hardware level using zynqmp-reset driver, - * if mapped in device tree. - */ + /* Fully reset controller at hardware level if mapped in device tree */ ret = device_reset_optional(&pdev->dev); if (ret) { dev_err_probe(&pdev->dev, ret, "failed to reset controller"); @@ -4737,7 +4735,7 @@ static const struct macb_config zynqmp_config = { MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH, .dma_burst_length = 16, .clk_init = macb_clk_init, - .init = zynqmp_init, + .init = init_reset_optional, .jumbo_max_len = 10240, .usrio = &macb_default_usrio, }; @@ -4751,6 +4749,17 @@ static const struct macb_config zynq_config = { .usrio = &macb_default_usrio, }; +static const struct macb_config mpfs_config = { + .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | + MACB_CAPS_JUMBO | + MACB_CAPS_GEM_HAS_PTP, + .dma_burst_length = 16, + .clk_init = macb_clk_init, + .init = init_reset_optional, + .usrio = &macb_default_usrio, + .jumbo_max_len = 10240, +}; + static const struct macb_config sama7g5_gem_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG | MACB_CAPS_MIIONRGMII, @@ -4787,6 +4796,7 @@ static const struct of_device_id macb_dt_ids[] = { { .compatible = "cdns,zynqmp-gem", .data = &zynqmp_config}, { .compatible = "cdns,zynq-gem", .data = &zynq_config }, { .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config }, + { .compatible = "microchip,mpfs-macb", .data = &mpfs_config }, { .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config }, { .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config }, { /* sentinel */ } From patchwork Mon Jul 4 11:45:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12905164 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55CB1CCA47C for ; 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X-IronPort-AV: E=Sophos;i="5.92,243,1650956400"; d="scan'208";a="170950905" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 04 Jul 2022 04:46:13 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 4 Jul 2022 04:46:12 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 4 Jul 2022 04:46:10 -0700 From: Conor Dooley To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Nicolas Ferre , Claudiu Beznea CC: , , , , "Conor Dooley" Subject: [net-next PATCH v2 3/5] net: macb: unify macb_config alignment style Date: Mon, 4 Jul 2022 12:45:10 +0100 Message-ID: <20220704114511.1892332-4-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220704114511.1892332-1-conor.dooley@microchip.com> References: <20220704114511.1892332-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The various macb_config structs have taken different appraches to alignment when broken over newlines. Pick one style and make them match. Signed-off-by: Conor Dooley --- drivers/net/ethernet/cadence/macb_main.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index d43bcf256b02..85a2e1ea7826 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4626,8 +4626,8 @@ static const struct macb_config at91sam9260_config = { }; static const struct macb_config sama5d3macb_config = { - .caps = MACB_CAPS_SG_DISABLED - | MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, + .caps = MACB_CAPS_SG_DISABLED | + MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, .clk_init = macb_clk_init, .init = macb_init, .usrio = &macb_default_usrio, @@ -4658,8 +4658,8 @@ static const struct macb_config sama5d29_config = { }; static const struct macb_config sama5d3_config = { - .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE - | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO, + .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE | + MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, @@ -4731,8 +4731,8 @@ static int init_reset_optional(struct platform_device *pdev) static const struct macb_config zynqmp_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | - MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH, + MACB_CAPS_JUMBO | + MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = init_reset_optional, @@ -4806,8 +4806,8 @@ MODULE_DEVICE_TABLE(of, macb_dt_ids); static const struct macb_config default_gem_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | - MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_JUMBO | + MACB_CAPS_GEM_HAS_PTP, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, From patchwork Mon Jul 4 11:45:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12905165 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 461FBCCA481 for ; Mon, 4 Jul 2022 11:46:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233952AbiGDLqd (ORCPT ); Mon, 4 Jul 2022 07:46:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57160 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233745AbiGDLq3 (ORCPT ); Mon, 4 Jul 2022 07:46:29 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 663EB11824; Mon, 4 Jul 2022 04:46:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1656935176; x=1688471176; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ut5r7XOY+8r4BHR6rDG4F4J/JbNW2GuxLXfnNQpRYeY=; b=QcW5WupH6cUrA40YqclWBi4A4gaeDR+C/MPwtr1alTrOvjaBA/w5O2vD PlDZ7REfSJFwhKtYohDD+sQlhyYlgHopqmkbabl9OysA89AV3h/oU4SZL xYoQswU2oNZ/XwGE6tvT8CTHnV5+yb0Np6SUUMSZZMTkOGb8ij0brzM23 YYh+DlSj0BbQ4EZloowTQGCy2H98xm2NuY6WjNPB1X+A6+7pm994aBQhw LzIG/pVAZqyS5GO6DSuSaAnbqwdIKQzPO1o0XP5ozqGSuMl6RUvv7Hsny Y7rwR47leSzhdPj5FH9g9IlQ4eclFLGbEpsIxusho25jcrBH3pTZpSDGh g==; X-IronPort-AV: E=Sophos;i="5.92,243,1650956400"; d="scan'208";a="170950913" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 04 Jul 2022 04:46:15 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 4 Jul 2022 04:46:15 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 4 Jul 2022 04:46:12 -0700 From: Conor Dooley To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Nicolas Ferre , Claudiu Beznea CC: , , , , "Conor Dooley" Subject: [net-next PATCH v2 4/5] net: macb: simplify error paths in init_reset_optional() Date: Mon, 4 Jul 2022 12:45:11 +0100 Message-ID: <20220704114511.1892332-5-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220704114511.1892332-1-conor.dooley@microchip.com> References: <20220704114511.1892332-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The error handling paths in init_reset_optional() can all be simplified to return dev_err_probe(). Do so. Signed-off-by: Conor Dooley --- drivers/net/ethernet/cadence/macb_main.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 85a2e1ea7826..4423d99c72a7 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4699,27 +4699,21 @@ static int init_reset_optional(struct platform_device *pdev) /* Ensure PHY device used in SGMII mode is ready */ bp->sgmii_phy = devm_phy_optional_get(&pdev->dev, NULL); - if (IS_ERR(bp->sgmii_phy)) { - ret = PTR_ERR(bp->sgmii_phy); - dev_err_probe(&pdev->dev, ret, - "failed to get SGMII PHY\n"); - return ret; - } + if (IS_ERR(bp->sgmii_phy)) + return dev_err_probe(&pdev->dev, PTR_ERR(bp->sgmii_phy), + "failed to get SGMII PHY\n"); ret = phy_init(bp->sgmii_phy); - if (ret) { - dev_err(&pdev->dev, "failed to init SGMII PHY: %d\n", - ret); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to init SGMII PHY\n"); } /* Fully reset controller at hardware level if mapped in device tree */ ret = device_reset_optional(&pdev->dev); if (ret) { - dev_err_probe(&pdev->dev, ret, "failed to reset controller"); phy_exit(bp->sgmii_phy); - return ret; + return dev_err_probe(&pdev->dev, ret, "failed to reset controller"); } ret = macb_init(pdev); From patchwork Mon Jul 4 11:45:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12905166 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0EF18C43334 for ; Mon, 4 Jul 2022 11:46:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234252AbiGDLqy (ORCPT ); Mon, 4 Jul 2022 07:46:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233981AbiGDLqa (ORCPT ); Mon, 4 Jul 2022 07:46:30 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C4ED711823; Mon, 4 Jul 2022 04:46:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1656935179; x=1688471179; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zfbKyBLC0mFyQIJx/KT+jhrSiCA/8O4T/yeF8thm6iM=; b=vEohZ2okuoWK8d48kO5MJR89H8FFykMEhBel6WsCgRmfLc59j5ctLr3C KBd9kUUmhZ9jl41Ky7AkudE0jve3rBuY8G2TgpKzBG3TQL2Y7IAu89lVF cSh47fryrb2lFHeo/7+9WUACIcZhVeD4gGgIul14iuCk5+7TZS1ev1gCt yvV9F0czkqGGbe5ijjfXZ1Oq0v1umeRKSi21uyvof9JILfVv1E4R22OZY Gzs0aM/mVUQKcDxhRzvA5tAT0fhXzK0Y+R/hZDI+3+lQSTMWsqE7+ckJ5 0a7txDpDQnfihip+LHijaFmzWLCnBwKZt29mGMAZ6OxtA/zqmBsdZ5+5e Q==; X-IronPort-AV: E=Sophos;i="5.92,243,1650956400"; d="scan'208";a="170950918" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 04 Jul 2022 04:46:19 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 4 Jul 2022 04:46:18 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 4 Jul 2022 04:46:15 -0700 From: Conor Dooley To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Nicolas Ferre , Claudiu Beznea CC: , , , , "Conor Dooley" Subject: [net-next PATCH v2 5/5] net: macb: sort init_reset_optional() with other init()s Date: Mon, 4 Jul 2022 12:45:12 +0100 Message-ID: <20220704114511.1892332-6-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220704114511.1892332-1-conor.dooley@microchip.com> References: <20220704114511.1892332-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org init_reset_optional() is somewhat oddly placed amidst the macb_config struct definitions. Move it to a more reasonable location alongside the fu540 init functions. Signed-off-by: Conor Dooley --- drivers/net/ethernet/cadence/macb_main.c | 68 ++++++++++++------------ 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 4423d99c72a7..36a659f2a289 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4600,6 +4600,40 @@ static int fu540_c000_init(struct platform_device *pdev) return macb_init(pdev); } +static int init_reset_optional(struct platform_device *pdev) +{ + struct net_device *dev = platform_get_drvdata(pdev); + struct macb *bp = netdev_priv(dev); + int ret; + + if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) { + /* Ensure PHY device used in SGMII mode is ready */ + bp->sgmii_phy = devm_phy_optional_get(&pdev->dev, NULL); + + if (IS_ERR(bp->sgmii_phy)) + return dev_err_probe(&pdev->dev, PTR_ERR(bp->sgmii_phy), + "failed to get SGMII PHY\n"); + + ret = phy_init(bp->sgmii_phy); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to init SGMII PHY\n"); + } + + /* Fully reset controller at hardware level if mapped in device tree */ + ret = device_reset_optional(&pdev->dev); + if (ret) { + phy_exit(bp->sgmii_phy); + return dev_err_probe(&pdev->dev, ret, "failed to reset controller"); + } + + ret = macb_init(pdev); + if (ret) + phy_exit(bp->sgmii_phy); + + return ret; +} + static const struct macb_usrio_config sama7g5_usrio = { .mii = 0, .rmii = 1, @@ -4689,40 +4723,6 @@ static const struct macb_config np4_config = { .usrio = &macb_default_usrio, }; -static int init_reset_optional(struct platform_device *pdev) -{ - struct net_device *dev = platform_get_drvdata(pdev); - struct macb *bp = netdev_priv(dev); - int ret; - - if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) { - /* Ensure PHY device used in SGMII mode is ready */ - bp->sgmii_phy = devm_phy_optional_get(&pdev->dev, NULL); - - if (IS_ERR(bp->sgmii_phy)) - return dev_err_probe(&pdev->dev, PTR_ERR(bp->sgmii_phy), - "failed to get SGMII PHY\n"); - - ret = phy_init(bp->sgmii_phy); - if (ret) - return dev_err_probe(&pdev->dev, ret, - "failed to init SGMII PHY\n"); - } - - /* Fully reset controller at hardware level if mapped in device tree */ - ret = device_reset_optional(&pdev->dev); - if (ret) { - phy_exit(bp->sgmii_phy); - return dev_err_probe(&pdev->dev, ret, "failed to reset controller"); - } - - ret = macb_init(pdev); - if (ret) - phy_exit(bp->sgmii_phy); - - return ret; -} - static const struct macb_config zynqmp_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |