From patchwork Wed Jul 6 09:51:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12907822 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C046C433EF for ; Wed, 6 Jul 2022 09:52:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232287AbiGFJwI (ORCPT ); Wed, 6 Jul 2022 05:52:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232052AbiGFJv7 (ORCPT ); Wed, 6 Jul 2022 05:51:59 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3D6B24086; Wed, 6 Jul 2022 02:51:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1657101117; x=1688637117; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=l+0Z4yg98vsQ9dpxhPGV97hIjiFxAtIh0W1k9P4F4qA=; b=IqcKI83h5y+lE6xT09BTK7wkZtKT6T2xSZSQJhf84R1+mAOVcSGhG2KI 3wiq3Y2VmyFCZRZhN3B0IKx2o9vLbtob9MQKFyz/9C9hBo7bdS6AtFGp3 7r4dA6k3kk8IUNyq7hslRRSOgTL7g5+MPUS7zaaVlauYJ24SklN5qGfJI IH9P4l3MtcwKBeLhyLpaeKCemsNi9SMnvrPNBWVAW4qYAnux1SShtG8i/ TOQFHCoiWUcJEhOajnTGmLMjXjuqL5CAPn+eUOh6Ck/Nt+OFifQ7akJ4I wtgpKLYMWb8dnmEyHeP70TAuNv3qQ4/rA2p/cIMQQKbH9NanSQnQI7Qo5 w==; X-IronPort-AV: E=Sophos;i="5.92,249,1650956400"; d="scan'208";a="171243808" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Jul 2022 02:51:56 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Wed, 6 Jul 2022 02:51:56 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Wed, 6 Jul 2022 02:51:53 -0700 From: Conor Dooley To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Nicolas Ferre , Claudiu Beznea CC: , , , , "Conor Dooley" , Rob Herring Subject: [net-next PATCH v3 1/5] dt-bindings: net: cdns,macb: document polarfire soc's macb Date: Wed, 6 Jul 2022 10:51:25 +0100 Message-ID: <20220706095129.828253-2-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220706095129.828253-1-conor.dooley@microchip.com> References: <20220706095129.828253-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Until now the PolarFire SoC (MPFS) has been using the generic "cdns,macb" compatible but has optional reset support. Add a specific compatible which falls back to the currently used generic binding. Acked-by: Rob Herring Reviewed-by: Claudiu Beznea Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/net/cdns,macb.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml index 86fc31c2d91b..9c92156869b2 100644 --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -28,6 +28,7 @@ properties: - enum: - cdns,at91sam9260-macb # Atmel at91sam9 SoCs - cdns,sam9x60-macb # Microchip sam9x60 SoC + - microchip,mpfs-macb # Microchip PolarFire SoC - const: cdns,macb # Generic - items: From patchwork Wed Jul 6 09:51:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12907825 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0E82CCA473 for ; Wed, 6 Jul 2022 09:52:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232348AbiGFJwQ (ORCPT ); Wed, 6 Jul 2022 05:52:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232151AbiGFJwG (ORCPT ); Wed, 6 Jul 2022 05:52:06 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED4DB248F2; Wed, 6 Jul 2022 02:52:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1657101123; x=1688637123; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=h+Q2lCKZQpmFo8oDx4PBDjfwz3TU2Q/j4OQOv2QNgWE=; b=xzTDpd2G/XAlWQrxDiNtDbwq6rf2/hO2Eg9mSdIDchTM5EfXtg5fRpQe sTU6V8EmYEvl9pl7ow83ITCrQnhRAYC5NWWquSr6Ju5El1g5StyM25RGr XdTk+P+tOS/ehaOVFriy9tlQY2tbm3mb8Rm+DYJAopWqIM1nNMJ/CS2J9 mjA4g/ol/DmJdwbyQ8P4zNW5AEewqgbN8NyaJCuSd9aIT3Qr0UMtzJOVy //sejDw/ppeYkFYmqa1o3UPoXKr6w5yFMiwAmUnHP0M7NniE02g35kk/p JDVoWJmK0xIg/ULDollrEtOMLAhlxjj+ppFDD8GNhzjAMOD6If+gkzBGI A==; X-IronPort-AV: E=Sophos;i="5.92,249,1650956400"; d="scan'208";a="170975545" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Jul 2022 02:52:03 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Wed, 6 Jul 2022 02:51:59 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Wed, 6 Jul 2022 02:51:56 -0700 From: Conor Dooley To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Nicolas Ferre , Claudiu Beznea CC: , , , , "Conor Dooley" Subject: [net-next PATCH v3 2/5] net: macb: add polarfire soc reset support Date: Wed, 6 Jul 2022 10:51:26 +0100 Message-ID: <20220706095129.828253-3-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220706095129.828253-1-conor.dooley@microchip.com> References: <20220706095129.828253-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org To date, the Microchip PolarFire SoC (MPFS) has been using the cdns,macb compatible, however the generic device does not have reset support. Add a new compatible & .data for MPFS to hook into the reset functionality added for zynqmp support (and make the zynqmp init function generic in the process). Reviewed-by: Claudiu Beznea Signed-off-by: Conor Dooley --- drivers/net/ethernet/cadence/macb_main.c | 26 ++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index d89098f4ede8..d43bcf256b02 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4689,34 +4689,32 @@ static const struct macb_config np4_config = { .usrio = &macb_default_usrio, }; -static int zynqmp_init(struct platform_device *pdev) +static int init_reset_optional(struct platform_device *pdev) { struct net_device *dev = platform_get_drvdata(pdev); struct macb *bp = netdev_priv(dev); int ret; if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) { - /* Ensure PS-GTR PHY device used in SGMII mode is ready */ + /* Ensure PHY device used in SGMII mode is ready */ bp->sgmii_phy = devm_phy_optional_get(&pdev->dev, NULL); if (IS_ERR(bp->sgmii_phy)) { ret = PTR_ERR(bp->sgmii_phy); dev_err_probe(&pdev->dev, ret, - "failed to get PS-GTR PHY\n"); + "failed to get SGMII PHY\n"); return ret; } ret = phy_init(bp->sgmii_phy); if (ret) { - dev_err(&pdev->dev, "failed to init PS-GTR PHY: %d\n", + dev_err(&pdev->dev, "failed to init SGMII PHY: %d\n", ret); return ret; } } - /* Fully reset GEM controller at hardware level using zynqmp-reset driver, - * if mapped in device tree. - */ + /* Fully reset controller at hardware level if mapped in device tree */ ret = device_reset_optional(&pdev->dev); if (ret) { dev_err_probe(&pdev->dev, ret, "failed to reset controller"); @@ -4737,7 +4735,7 @@ static const struct macb_config zynqmp_config = { MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH, .dma_burst_length = 16, .clk_init = macb_clk_init, - .init = zynqmp_init, + .init = init_reset_optional, .jumbo_max_len = 10240, .usrio = &macb_default_usrio, }; @@ -4751,6 +4749,17 @@ static const struct macb_config zynq_config = { .usrio = &macb_default_usrio, }; +static const struct macb_config mpfs_config = { + .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | + MACB_CAPS_JUMBO | + MACB_CAPS_GEM_HAS_PTP, + .dma_burst_length = 16, + .clk_init = macb_clk_init, + .init = init_reset_optional, + .usrio = &macb_default_usrio, + .jumbo_max_len = 10240, +}; + static const struct macb_config sama7g5_gem_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG | MACB_CAPS_MIIONRGMII, @@ -4787,6 +4796,7 @@ static const struct of_device_id macb_dt_ids[] = { { .compatible = "cdns,zynqmp-gem", .data = &zynqmp_config}, { .compatible = "cdns,zynq-gem", .data = &zynq_config }, { .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config }, + { .compatible = "microchip,mpfs-macb", .data = &mpfs_config }, { .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config }, { .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config }, { /* sentinel */ } From patchwork Wed Jul 6 09:51:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12907824 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C830CCA473 for ; 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X-IronPort-AV: E=Sophos;i="5.92,249,1650956400"; d="scan'208";a="163537854" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Jul 2022 02:52:04 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Wed, 6 Jul 2022 02:52:02 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Wed, 6 Jul 2022 02:51:59 -0700 From: Conor Dooley To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Nicolas Ferre , Claudiu Beznea CC: , , , , "Conor Dooley" Subject: [net-next PATCH v3 3/5] net: macb: unify macb_config alignment style Date: Wed, 6 Jul 2022 10:51:27 +0100 Message-ID: <20220706095129.828253-4-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220706095129.828253-1-conor.dooley@microchip.com> References: <20220706095129.828253-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The various macb_config structs have taken different approaches to alignment when broken over newlines. Pick one style and make them match. Reviewed-by: Claudiu Beznea Signed-off-by: Conor Dooley --- drivers/net/ethernet/cadence/macb_main.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index d43bcf256b02..85a2e1ea7826 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4626,8 +4626,8 @@ static const struct macb_config at91sam9260_config = { }; static const struct macb_config sama5d3macb_config = { - .caps = MACB_CAPS_SG_DISABLED - | MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, + .caps = MACB_CAPS_SG_DISABLED | + MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, .clk_init = macb_clk_init, .init = macb_init, .usrio = &macb_default_usrio, @@ -4658,8 +4658,8 @@ static const struct macb_config sama5d29_config = { }; static const struct macb_config sama5d3_config = { - .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE - | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO, + .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE | + MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, @@ -4731,8 +4731,8 @@ static int init_reset_optional(struct platform_device *pdev) static const struct macb_config zynqmp_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | - MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH, + MACB_CAPS_JUMBO | + MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = init_reset_optional, @@ -4806,8 +4806,8 @@ MODULE_DEVICE_TABLE(of, macb_dt_ids); static const struct macb_config default_gem_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | - MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_JUMBO | + MACB_CAPS_GEM_HAS_PTP, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, From patchwork Wed Jul 6 09:51:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12907823 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E00BC433EF for ; Wed, 6 Jul 2022 09:52:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232147AbiGFJwM (ORCPT ); Wed, 6 Jul 2022 05:52:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232286AbiGFJwI (ORCPT ); Wed, 6 Jul 2022 05:52:08 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2773248C5; Wed, 6 Jul 2022 02:52:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1657101127; x=1688637127; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ixTEFBBCmvimE/C5V7LJETD7sFfJnFOViWRROURSZYU=; b=Kq3MQx2h+2ezWp0W8oP7EAtoY3pCtmxfR5uAZUhaaKR8Fpvbq2Q2Aq2v KMaears63GfdBnR3SsxYIIqv6ciPEtNe2dkiH5IxGzm+u++HcI0nXk5GM C7jBi1RoNm0zBzr53vug/WYNbbUOstTfEK05qg8GgmWCHe2EeMZrG7czB pQzFmYTzLpVo0s4LXuw/1CU8Y0aPJsQp0BrmBhdmt9nFGcfqc6DmS/Egv 55b72BhlCHISCKCO8espI2JyFnIUq+k3ELg6NwtdnsB7qHcdXvMB6cYoB 6ivDSMDWUpaSMd/3Aqe+jq55z5Kv0bo63RSmo4ATR1nr5yut6aTk0ODIi w==; X-IronPort-AV: E=Sophos;i="5.92,249,1650956400"; d="scan'208";a="163537865" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Jul 2022 02:52:06 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Wed, 6 Jul 2022 02:52:05 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Wed, 6 Jul 2022 02:52:02 -0700 From: Conor Dooley To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Nicolas Ferre , Claudiu Beznea CC: , , , , "Conor Dooley" Subject: [net-next PATCH v3 4/5] net: macb: simplify error paths in init_reset_optional() Date: Wed, 6 Jul 2022 10:51:28 +0100 Message-ID: <20220706095129.828253-5-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220706095129.828253-1-conor.dooley@microchip.com> References: <20220706095129.828253-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The error handling paths in init_reset_optional() can all be simplified to return dev_err_probe(). Do so. Reviewed-by: Claudiu Beznea Signed-off-by: Conor Dooley --- drivers/net/ethernet/cadence/macb_main.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 85a2e1ea7826..4423d99c72a7 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4699,27 +4699,21 @@ static int init_reset_optional(struct platform_device *pdev) /* Ensure PHY device used in SGMII mode is ready */ bp->sgmii_phy = devm_phy_optional_get(&pdev->dev, NULL); - if (IS_ERR(bp->sgmii_phy)) { - ret = PTR_ERR(bp->sgmii_phy); - dev_err_probe(&pdev->dev, ret, - "failed to get SGMII PHY\n"); - return ret; - } + if (IS_ERR(bp->sgmii_phy)) + return dev_err_probe(&pdev->dev, PTR_ERR(bp->sgmii_phy), + "failed to get SGMII PHY\n"); ret = phy_init(bp->sgmii_phy); - if (ret) { - dev_err(&pdev->dev, "failed to init SGMII PHY: %d\n", - ret); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to init SGMII PHY\n"); } /* Fully reset controller at hardware level if mapped in device tree */ ret = device_reset_optional(&pdev->dev); if (ret) { - dev_err_probe(&pdev->dev, ret, "failed to reset controller"); phy_exit(bp->sgmii_phy); - return ret; + return dev_err_probe(&pdev->dev, ret, "failed to reset controller"); } ret = macb_init(pdev); From patchwork Wed Jul 6 09:51:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12907826 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1DE9C43334 for ; Wed, 6 Jul 2022 09:52:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232353AbiGFJwT (ORCPT ); Wed, 6 Jul 2022 05:52:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232300AbiGFJwK (ORCPT ); Wed, 6 Jul 2022 05:52:10 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD60924082; Wed, 6 Jul 2022 02:52:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1657101130; x=1688637130; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=om/UZBrb2XM7I9JkRLhYt07766ef5nyevWuoEb4xepc=; b=fL7Yq/NPRTSc7mOzIDjHQQLFenMOK+2CGSEhJIxcuz006wfsNapYe3zi 9pbjh1a/EWMTbSOFmbqnLuCnAtWvXcx6ghddgPMPUxTRJ42vObqlo8PLz NLOs8ABDYsgMz2BegLBZnu1Ow+Sb3xjsBnEhePrH6ZoW5Sa5DKdy4F00f l4HAOA0lJQoLOSzqDW81s3DGNyy+Goi96UxTfid6rhrWvW3Te/Cq8iuo4 x4R0GBRDoj9gN/+J2h4MJ7/1gug8jsIFR50VXLpQwjli1t4S9Va3StvLR LVjgrKkdvZjaXnbtcCl8Ru96A9MJViw3qG2wtmfF3klVvgEX1/vYSMtmO g==; X-IronPort-AV: E=Sophos;i="5.92,249,1650956400"; d="scan'208";a="163537889" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Jul 2022 02:52:09 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Wed, 6 Jul 2022 02:52:08 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Wed, 6 Jul 2022 02:52:05 -0700 From: Conor Dooley To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Nicolas Ferre , Claudiu Beznea CC: , , , , "Conor Dooley" Subject: [net-next PATCH v3 5/5] net: macb: sort init_reset_optional() with other init()s Date: Wed, 6 Jul 2022 10:51:29 +0100 Message-ID: <20220706095129.828253-6-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220706095129.828253-1-conor.dooley@microchip.com> References: <20220706095129.828253-1-conor.dooley@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org init_reset_optional() is somewhat oddly placed amidst the macb_config struct definitions. Move it to a more reasonable location alongside the fu540 init functions. Reviewed-by: Claudiu Beznea Signed-off-by: Conor Dooley --- drivers/net/ethernet/cadence/macb_main.c | 68 ++++++++++++------------ 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 4423d99c72a7..36a659f2a289 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4600,6 +4600,40 @@ static int fu540_c000_init(struct platform_device *pdev) return macb_init(pdev); } +static int init_reset_optional(struct platform_device *pdev) +{ + struct net_device *dev = platform_get_drvdata(pdev); + struct macb *bp = netdev_priv(dev); + int ret; + + if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) { + /* Ensure PHY device used in SGMII mode is ready */ + bp->sgmii_phy = devm_phy_optional_get(&pdev->dev, NULL); + + if (IS_ERR(bp->sgmii_phy)) + return dev_err_probe(&pdev->dev, PTR_ERR(bp->sgmii_phy), + "failed to get SGMII PHY\n"); + + ret = phy_init(bp->sgmii_phy); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to init SGMII PHY\n"); + } + + /* Fully reset controller at hardware level if mapped in device tree */ + ret = device_reset_optional(&pdev->dev); + if (ret) { + phy_exit(bp->sgmii_phy); + return dev_err_probe(&pdev->dev, ret, "failed to reset controller"); + } + + ret = macb_init(pdev); + if (ret) + phy_exit(bp->sgmii_phy); + + return ret; +} + static const struct macb_usrio_config sama7g5_usrio = { .mii = 0, .rmii = 1, @@ -4689,40 +4723,6 @@ static const struct macb_config np4_config = { .usrio = &macb_default_usrio, }; -static int init_reset_optional(struct platform_device *pdev) -{ - struct net_device *dev = platform_get_drvdata(pdev); - struct macb *bp = netdev_priv(dev); - int ret; - - if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) { - /* Ensure PHY device used in SGMII mode is ready */ - bp->sgmii_phy = devm_phy_optional_get(&pdev->dev, NULL); - - if (IS_ERR(bp->sgmii_phy)) - return dev_err_probe(&pdev->dev, PTR_ERR(bp->sgmii_phy), - "failed to get SGMII PHY\n"); - - ret = phy_init(bp->sgmii_phy); - if (ret) - return dev_err_probe(&pdev->dev, ret, - "failed to init SGMII PHY\n"); - } - - /* Fully reset controller at hardware level if mapped in device tree */ - ret = device_reset_optional(&pdev->dev); - if (ret) { - phy_exit(bp->sgmii_phy); - return dev_err_probe(&pdev->dev, ret, "failed to reset controller"); - } - - ret = macb_init(pdev); - if (ret) - phy_exit(bp->sgmii_phy); - - return ret; -} - static const struct macb_config zynqmp_config = { .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |