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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id r15-20020a0560001b8f00b0021d74906683sm5142406wru.28.2022.07.06.11.29.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 11:29:12 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v3 1/7] media: Add P010 tiled format Date: Wed, 6 Jul 2022 20:28:55 +0200 Message-Id: <20220706182901.78949-2-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220706182901.78949-1-jernej.skrabec@gmail.com> References: <20220706182901.78949-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220706_112916_735576_ABDAD548 X-CRM114-Status: GOOD ( 13.50 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Ezequiel Garcia Add P010 tiled format Tested-by: Benjamin Gaignard Signed-off-by: Ezequiel Garcia [rebased, updated pixel format name and added description] Signed-off-by: Jernej Skrabec --- .../media/v4l/pixfmt-yuv-planar.rst | 18 +++++++++++++++--- drivers/media/v4l2-core/v4l2-common.c | 1 + drivers/media/v4l2-core/v4l2-ioctl.c | 1 + include/uapi/linux/videodev2.h | 1 + 4 files changed, 18 insertions(+), 3 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst index a900ff66911a..faba259a2b92 100644 --- a/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst @@ -116,6 +116,13 @@ All components are stored with the same number of bits per component. - Cb, Cr - Yes - Linear + * - V4L2_PIX_FMT_P010_4L4 + - 'T010' + - 10 + - 4:2:0 + - Cb, Cr + - Yes + - 4x4 tiles * - V4L2_PIX_FMT_NV16 - 'NV16' - 8 @@ -528,11 +535,12 @@ number of lines as the luma plane. - Cr\ :sub:`33` .. _V4L2_PIX_FMT_P010: +.. _V4L2-PIX-FMT-P010-4L4: -P010 ----- +P010 and tiled P010 +------------------- -Like NV12 with 10 bits per component, expanded to 16 bits. +P010 is like NV12 with 10 bits per component, expanded to 16 bits. Data in the 10 high bits, zeros in the 6 low bits, arranged in little endian order. .. flat-table:: Sample 4x4 P010 Image @@ -570,6 +578,10 @@ Data in the 10 high bits, zeros in the 6 low bits, arranged in little endian ord - Cb\ :sub:`11` - Cr\ :sub:`11` +``V4L2_PIX_FMT_P010_4L4`` stores pixels in 4x4 tiles, and stores tiles linearly +in memory. The line stride must be aligned to multiple of 8 and image height to +a multiple of 4. The layouts of the luma and chroma planes are identical. + .. raw:: latex \endgroup diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c index 1e38ad8906a2..e0fbe6ba4b6c 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c @@ -278,6 +278,7 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) /* Tiled YUV formats */ { .format = V4L2_PIX_FMT_NV12_4L4, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 1, 2, 0, 0 }, .hdiv = 2, .vdiv = 2 }, + { .format = V4L2_PIX_FMT_P010_4L4, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 2, 4, 0, 0 }, .hdiv = 2, .vdiv = 2 }, /* YUV planar formats, non contiguous variant */ { .format = V4L2_PIX_FMT_YUV420M, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 3, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 2 }, diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index e2526701294e..7aa3af389b51 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1310,6 +1310,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_NV12_4L4: descr = "Y/CbCr 4:2:0 (4x4 Linear)"; break; case V4L2_PIX_FMT_NV12_16L16: descr = "Y/CbCr 4:2:0 (16x16 Linear)"; break; case V4L2_PIX_FMT_NV12_32L32: descr = "Y/CbCr 4:2:0 (32x32 Linear)"; break; + case V4L2_PIX_FMT_P010_4L4: descr = "10-bit Y/CbCr 4:2:0 (4x4 Linear)"; break; case V4L2_PIX_FMT_NV12M: descr = "Y/CbCr 4:2:0 (N-C)"; break; case V4L2_PIX_FMT_NV21M: descr = "Y/CrCb 4:2:0 (N-C)"; break; case V4L2_PIX_FMT_NV16M: descr = "Y/CbCr 4:2:2 (N-C)"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index 5311ac4fde35..32bedeb04152 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -630,6 +630,7 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_NV12_4L4 v4l2_fourcc('V', 'T', '1', '2') /* 12 Y/CbCr 4:2:0 4x4 tiles */ #define V4L2_PIX_FMT_NV12_16L16 v4l2_fourcc('H', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */ #define V4L2_PIX_FMT_NV12_32L32 v4l2_fourcc('S', 'T', '1', '2') /* 12 Y/CbCr 4:2:0 32x32 tiles */ +#define V4L2_PIX_FMT_P010_4L4 v4l2_fourcc('T', '0', '1', '0') /* 12 Y/CbCr 4:2:0 10-bit 4x4 macroblocks */ /* Tiled YUV formats, non contiguous planes */ #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */ From patchwork Wed Jul 6 18:28:56 2022 Content-Type: text/plain; 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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id r15-20020a0560001b8f00b0021d74906683sm5142406wru.28.2022.07.06.11.29.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 11:29:13 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v3 2/7] media: hantro: Support format filtering by depth Date: Wed, 6 Jul 2022 20:28:56 +0200 Message-Id: <20220706182901.78949-3-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220706182901.78949-1-jernej.skrabec@gmail.com> References: <20220706182901.78949-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220706_112916_928432_1E3647F7 X-CRM114-Status: GOOD ( 19.78 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org In preparation for supporting 10-bit formats, add mechanism which will filter formats based on pixel depth. Hantro G2 supports only one decoding format natively and that is based on bit depth of current video frame. Additionally, it makes no sense to upconvert bitness, so filter those out too. Reviewed-by: Ezequiel Garcia Tested-by: Benjamin Gaignard Signed-off-by: Jernej Skrabec --- drivers/staging/media/hantro/hantro.h | 4 ++ drivers/staging/media/hantro/hantro_v4l2.c | 48 ++++++++++++++++++++-- drivers/staging/media/hantro/hantro_v4l2.h | 1 + 3 files changed, 50 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h index 26308bb29adc..2989ebc631cc 100644 --- a/drivers/staging/media/hantro/hantro.h +++ b/drivers/staging/media/hantro/hantro.h @@ -227,6 +227,7 @@ struct hantro_dev { * * @ctrl_handler: Control handler used to register controls. * @jpeg_quality: User-specified JPEG compression quality. + * @bit_depth: Bit depth of current frame * * @codec_ops: Set of operations related to codec mode. * @postproc: Post-processing context. @@ -252,6 +253,7 @@ struct hantro_ctx { struct v4l2_ctrl_handler ctrl_handler; int jpeg_quality; + int bit_depth; const struct hantro_codec_ops *codec_ops; struct hantro_postproc_ctx postproc; @@ -277,6 +279,7 @@ struct hantro_ctx { * @enc_fmt: Format identifier for encoder registers. * @frmsize: Supported range of frame sizes (only for bitstream formats). * @postprocessed: Indicates if this format needs the post-processor. + * @match_depth: Indicates if format bit depth must match video bit depth */ struct hantro_fmt { char *name; @@ -287,6 +290,7 @@ struct hantro_fmt { enum hantro_enc_fmt enc_fmt; struct v4l2_frmsize_stepwise frmsize; bool postprocessed; + bool match_depth; }; struct hantro_reg { diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c index 29cc61d53b71..334f18a4120d 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.c +++ b/drivers/staging/media/hantro/hantro_v4l2.c @@ -64,6 +64,42 @@ hantro_get_postproc_formats(const struct hantro_ctx *ctx, return ctx->dev->variant->postproc_fmts; } +int hantro_get_format_depth(u32 fourcc) +{ + switch (fourcc) { + case V4L2_PIX_FMT_P010: + case V4L2_PIX_FMT_P010_4L4: + return 10; + default: + return 8; + } +} + +static bool +hantro_check_depth_match(const struct hantro_ctx *ctx, + const struct hantro_fmt *fmt) +{ + int fmt_depth, ctx_depth = 8; + + if (!fmt->match_depth && !fmt->postprocessed) + return true; + + /* 0 means default depth, which is 8 */ + if (ctx->bit_depth) + ctx_depth = ctx->bit_depth; + + fmt_depth = hantro_get_format_depth(fmt->fourcc); + + /* + * Allow only downconversion for postproc formats for now. + * It may be possible to relax that on some HW. + */ + if (!fmt->match_depth) + return fmt_depth <= ctx_depth; + + return fmt_depth == ctx_depth; +} + static const struct hantro_fmt * hantro_find_format(const struct hantro_ctx *ctx, u32 fourcc) { @@ -91,7 +127,8 @@ hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream) formats = hantro_get_formats(ctx, &num_fmts); for (i = 0; i < num_fmts; i++) { if (bitstream == (formats[i].codec_mode != - HANTRO_MODE_NONE)) + HANTRO_MODE_NONE) && + hantro_check_depth_match(ctx, &formats[i])) return &formats[i]; } return NULL; @@ -162,11 +199,13 @@ static int vidioc_enum_fmt(struct file *file, void *priv, formats = hantro_get_formats(ctx, &num_fmts); for (i = 0; i < num_fmts; i++) { bool mode_none = formats[i].codec_mode == HANTRO_MODE_NONE; + fmt = &formats[i]; if (skip_mode_none == mode_none) continue; + if (!hantro_check_depth_match(ctx, fmt)) + continue; if (j == f->index) { - fmt = &formats[i]; f->pixelformat = fmt->fourcc; return 0; } @@ -182,8 +221,11 @@ static int vidioc_enum_fmt(struct file *file, void *priv, return -EINVAL; formats = hantro_get_postproc_formats(ctx, &num_fmts); for (i = 0; i < num_fmts; i++) { + fmt = &formats[i]; + + if (!hantro_check_depth_match(ctx, fmt)) + continue; if (j == f->index) { - fmt = &formats[i]; f->pixelformat = fmt->fourcc; return 0; } diff --git a/drivers/staging/media/hantro/hantro_v4l2.h b/drivers/staging/media/hantro/hantro_v4l2.h index 18bc682c8556..b17e84c82582 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.h +++ b/drivers/staging/media/hantro/hantro_v4l2.h @@ -22,5 +22,6 @@ extern const struct v4l2_ioctl_ops hantro_ioctl_ops; extern const struct vb2_ops hantro_queue_ops; void hantro_reset_fmts(struct hantro_ctx *ctx); +int hantro_get_format_depth(u32 fourcc); #endif /* HANTRO_V4L2_H_ */ From patchwork Wed Jul 6 18:28:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 12908462 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 09B10C43334 for ; Wed, 6 Jul 2022 18:30:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id r15-20020a0560001b8f00b0021d74906683sm5142406wru.28.2022.07.06.11.29.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 11:29:14 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v3 3/7] media: hantro: postproc: Fix buffer size calculation Date: Wed, 6 Jul 2022 20:28:57 +0200 Message-Id: <20220706182901.78949-4-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220706182901.78949-1-jernej.skrabec@gmail.com> References: <20220706182901.78949-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220706_112919_058673_1782F3D6 X-CRM114-Status: GOOD ( 17.20 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org When allocating aux buffers for postprocessing, it's assumed that base buffer size is the same as that of output. Coincidentally, that's true most of the time, but not always. 10-bit source also needs aux buffer size which is appropriate for 10-bit native format, even if the output format is 8-bit. Similarly, mv sizes and other extra buffer size also depends on source width/height, not destination. Reviewed-by: Ezequiel Garcia Tested-by: Benjamin Gaignard Signed-off-by: Jernej Skrabec --- .../staging/media/hantro/hantro_postproc.c | 24 +++++++++++++------ drivers/staging/media/hantro/hantro_v4l2.c | 2 +- drivers/staging/media/hantro/hantro_v4l2.h | 2 ++ 3 files changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c index ab168c1c0d28..b77cc55e43ea 100644 --- a/drivers/staging/media/hantro/hantro_postproc.c +++ b/drivers/staging/media/hantro/hantro_postproc.c @@ -12,6 +12,7 @@ #include "hantro_hw.h" #include "hantro_g1_regs.h" #include "hantro_g2_regs.h" +#include "hantro_v4l2.h" #define HANTRO_PP_REG_WRITE(vpu, reg_name, val) \ { \ @@ -174,18 +175,27 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; struct vb2_queue *cap_queue = &m2m_ctx->cap_q_ctx.q; unsigned int num_buffers = cap_queue->num_buffers; + struct v4l2_pix_format_mplane pix_mp; + const struct hantro_fmt *fmt; unsigned int i, buf_size; - buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage; + /* this should always pick native format */ + fmt = hantro_get_default_fmt(ctx, false); + if (!fmt) + return -EINVAL; + v4l2_fill_pixfmt_mp(&pix_mp, fmt->fourcc, ctx->src_fmt.width, + ctx->src_fmt.height); + + buf_size = pix_mp.plane_fmt[0].sizeimage; if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE) - buf_size += hantro_h264_mv_size(ctx->dst_fmt.width, - ctx->dst_fmt.height); + buf_size += hantro_h264_mv_size(pix_mp.width, + pix_mp.height); else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_VP9_FRAME) - buf_size += hantro_vp9_mv_size(ctx->dst_fmt.width, - ctx->dst_fmt.height); + buf_size += hantro_vp9_mv_size(pix_mp.width, + pix_mp.height); else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_HEVC_SLICE) - buf_size += hantro_hevc_mv_size(ctx->dst_fmt.width, - ctx->dst_fmt.height); + buf_size += hantro_hevc_mv_size(pix_mp.width, + pix_mp.height); for (i = 0; i < num_buffers; ++i) { struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i]; diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c index 334f18a4120d..2c7a805289e7 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.c +++ b/drivers/staging/media/hantro/hantro_v4l2.c @@ -118,7 +118,7 @@ hantro_find_format(const struct hantro_ctx *ctx, u32 fourcc) return NULL; } -static const struct hantro_fmt * +const struct hantro_fmt * hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream) { const struct hantro_fmt *formats; diff --git a/drivers/staging/media/hantro/hantro_v4l2.h b/drivers/staging/media/hantro/hantro_v4l2.h index b17e84c82582..64f6f57e9d7a 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.h +++ b/drivers/staging/media/hantro/hantro_v4l2.h @@ -23,5 +23,7 @@ extern const struct vb2_ops hantro_queue_ops; void hantro_reset_fmts(struct hantro_ctx *ctx); int hantro_get_format_depth(u32 fourcc); +const struct hantro_fmt * +hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream); 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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id r15-20020a0560001b8f00b0021d74906683sm5142406wru.28.2022.07.06.11.29.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 11:29:16 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v3 4/7] media: hantro: postproc: Fix legacy regs configuration Date: Wed, 6 Jul 2022 20:28:58 +0200 Message-Id: <20220706182901.78949-5-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220706182901.78949-1-jernej.skrabec@gmail.com> References: <20220706182901.78949-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220706_112922_102247_AFD51797 X-CRM114-Status: GOOD ( 12.71 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Some postproc legacy registers were set in VP9 code. Move them to postproc and fix their value. Reviewed-by: Ezequiel Garcia Tested-by: Benjamin Gaignard Signed-off-by: Jernej Skrabec --- drivers/staging/media/hantro/hantro_g2_vp9_dec.c | 8 -------- drivers/staging/media/hantro/hantro_postproc.c | 10 ++++++++++ 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c index 91c21b634fab..c9cb11fd95af 100644 --- a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c @@ -515,16 +515,8 @@ static void config_bit_depth(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) { if (ctx->dev->variant->legacy_regs) { - u8 pp_shift = 0; - hantro_reg_write(ctx->dev, &g2_bit_depth_y, dec_params->bit_depth); hantro_reg_write(ctx->dev, &g2_bit_depth_c, dec_params->bit_depth); - hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, dec_params->bit_depth); - - if (dec_params->bit_depth > 8) - pp_shift = 16 - dec_params->bit_depth; - - hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); hantro_reg_write(ctx->dev, &g2_pix_shift, 0); } else { hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8); diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c index b77cc55e43ea..8933b4af73ed 100644 --- a/drivers/staging/media/hantro/hantro_postproc.c +++ b/drivers/staging/media/hantro/hantro_postproc.c @@ -130,6 +130,16 @@ static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma); hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + chroma_offset); } + if (ctx->dev->variant->legacy_regs) { + int out_depth = hantro_get_format_depth(ctx->dst_fmt.pixelformat); + u8 pp_shift = 0; + + if (out_depth > 8) + pp_shift = 16 - out_depth; + + hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, out_depth); + hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); + } hantro_reg_write(vpu, &g2_out_rs_e, 1); } From patchwork Wed Jul 6 18:28:59 2022 Content-Type: text/plain; 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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id r15-20020a0560001b8f00b0021d74906683sm5142406wru.28.2022.07.06.11.29.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 11:29:17 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v3 5/7] media: hantro: postproc: Properly calculate chroma offset Date: Wed, 6 Jul 2022 20:28:59 +0200 Message-Id: <20220706182901.78949-6-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220706182901.78949-1-jernej.skrabec@gmail.com> References: <20220706182901.78949-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220706_112924_084010_F60390A3 X-CRM114-Status: GOOD ( 10.84 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Currently chroma offset calculation assumes only 1 byte per luma, with no consideration for stride. Take necessary information from destination pixel format which makes calculation completely universal. Reviewed-by: Ezequiel Garcia Tested-by: Benjamin Gaignard Signed-off-by: Jernej Skrabec --- drivers/staging/media/hantro/hantro_postproc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c index 8933b4af73ed..a0928c508434 100644 --- a/drivers/staging/media/hantro/hantro_postproc.c +++ b/drivers/staging/media/hantro/hantro_postproc.c @@ -113,12 +113,14 @@ static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; struct vb2_v4l2_buffer *dst_buf; - size_t chroma_offset = ctx->dst_fmt.width * ctx->dst_fmt.height; int down_scale = down_scale_factor(ctx); + size_t chroma_offset; dma_addr_t dst_dma; dst_buf = hantro_get_dst_buf(ctx); dst_dma = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); + chroma_offset = ctx->dst_fmt.plane_fmt[0].bytesperline * + ctx->dst_fmt.height; if (down_scale) { hantro_reg_write(vpu, &g2_down_scale_e, 1); From patchwork Wed Jul 6 18:29:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 12908463 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71DF8C433EF for ; Wed, 6 Jul 2022 18:30:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YyQQDQMzRbn1cjOLJ0bin0XYAf9bhB31pxde2lfHdII=; b=ePh8v3mZorw6AK MxO1FNFGZpkGtlVAfQpBZR9MqkcJoQRWpaPcIt5PE46OHuzSKRAI/1uD8Hv+e9hIwRQ7D3/NU1zN+ 9ypA6tH2sfc+jWj18R/smddGeTE/neVLrC8mnrgCRdEjNio0g23adA9nDXaltJ87bMDHDjIHIuc3R 2N1TWTZtKpkHgesW+QpDVkkqnThrCPChOEay3gu4uiS9jTzQhnElo7g+WDLeUkI0BFuHL94cocGzz 2r1n2P42MgGZZA9YNv0nOd3BCAp0pIGtuWTwDtSNJvwVaKiaaO2LVS2wpjWAb3eZ8ONCadVzjdNW8 JhrcUOi4+mW/CW0kLXYQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o99mq-00BxIs-Is; Wed, 06 Jul 2022 18:30:08 +0000 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o99m3-00Bwua-Jz; Wed, 06 Jul 2022 18:29:20 +0000 Received: by mail-wr1-x435.google.com with SMTP id b26so23249310wrc.2; Wed, 06 Jul 2022 11:29:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aRhpgcalr07YkEQC06e4quRgCbSsA86eLkAqCnDRLp8=; b=pcydag+pErwwrdcsmjf+nFIVxjSqKs3nSu05sEc+DitNQRoW43UAfrWUOvZR5eJbGU XiE5mJ2bYJ+uqPX+b6HKuNlkKSZ8SzLTaugHjQgkcOmwONArnOB0T8++e71Lti63s8Nt NMO95ub8vty+cf7GwftldTDIx+6zgB9/9LC92KBVy/UVMlYotWQBrlAbC70r15BU9oSM sYfr+n9/93qVCTRXS1I7tbqY2SaacHWmGwYnmm51IqDpuZHDCiw+8dFoekXyiinSQMES Lp1IEXFlwhXbJEHpKVbM1Y2LAYKKVuTxdP+C/lBxjgRZrDfnEat17Qzxq7G4Ghwl7FUn 3sVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aRhpgcalr07YkEQC06e4quRgCbSsA86eLkAqCnDRLp8=; b=qUmlgbZYXbGKSEqmctTlr876luSdJKE1G3cxzIUGT/Ap5M4ljy3X91U/dqb71nvbEQ sIghXvMP/F5gcIdR9uHC8n72gm+qpMNtot1FVeP6ilhvl85V3i9Wu5K0ZrU01nsYnfMs 3m8pKms/Hg9XfmWflkx4azLStqZxjkGe3hiv/uWKldSb7jP8NB6qYvl6FMSNJIuaWGgU Xn3brh5wQAaiTm/4TPW4GFwPwhJIAgnkGGeM2wLy0sdLnZR0znEngie7vgSariulNqM6 o38S+iBKkX5lYth8NIsFTjmiylsnUtbwtdgs7vkmX+H0TR/ad47E5jBlFN6Y26BbP69d w0Ew== X-Gm-Message-State: AJIora9p/A2lYX82oAsxvLjMi1XxvV1oHW5AQgtST9zPIUnNVbztTMrK /bmwJLpWR/FfATTGIihxGIM= X-Google-Smtp-Source: AGRyM1vqDJph0zXaYU+mKDtrGOKYY+x7Ui4yKgelPc1/miuilxQ3TdUsAbj7Z1VEKJsMxiRYhuCZ9w== X-Received: by 2002:adf:dd82:0:b0:21d:62e3:a51 with SMTP id x2-20020adfdd82000000b0021d62e30a51mr21961682wrl.324.1657132159236; Wed, 06 Jul 2022 11:29:19 -0700 (PDT) Received: from kista.localdomain (213-161-3-76.dynamic.telemach.net. [213.161.3.76]) by smtp.gmail.com with ESMTPSA id r15-20020a0560001b8f00b0021d74906683sm5142406wru.28.2022.07.06.11.29.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 11:29:18 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v3 6/7] media: hantro: Store VP9 bit depth in context Date: Wed, 6 Jul 2022 20:29:00 +0200 Message-Id: <20220706182901.78949-7-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220706182901.78949-1-jernej.skrabec@gmail.com> References: <20220706182901.78949-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220706_112919_680037_420DE47C X-CRM114-Status: GOOD ( 11.74 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Now that we have proper infrastructure for postprocessing 10-bit formats, store VP9 bit depth in context. Reviewed-by: Ezequiel Garcia Tested-by: Benjamin Gaignard Signed-off-by: Jernej Skrabec --- drivers/staging/media/hantro/hantro_drv.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index 01d33dcb0467..afddf7ac0731 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -324,6 +324,24 @@ static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl) return 0; } +static int hantro_vp9_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct hantro_ctx *ctx; + + ctx = container_of(ctrl->handler, + struct hantro_ctx, ctrl_handler); + + switch (ctrl->id) { + case V4L2_CID_STATELESS_VP9_FRAME: + ctx->bit_depth = ctrl->p_new.p_vp9_frame->bit_depth; + break; + default: + return -EINVAL; + } + + return 0; +} + static const struct v4l2_ctrl_ops hantro_ctrl_ops = { .try_ctrl = hantro_try_ctrl, }; @@ -336,6 +354,10 @@ static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = { .s_ctrl = hantro_hevc_s_ctrl, }; +static const struct v4l2_ctrl_ops hantro_vp9_ctrl_ops = { + .s_ctrl = hantro_vp9_s_ctrl, +}; + #define HANTRO_JPEG_ACTIVE_MARKERS (V4L2_JPEG_ACTIVE_MARKER_APP0 | \ V4L2_JPEG_ACTIVE_MARKER_COM | \ V4L2_JPEG_ACTIVE_MARKER_DQT | \ @@ -503,6 +525,7 @@ static const struct hantro_ctrl controls[] = { .codec = HANTRO_VP9_DECODER, .cfg = { .id = V4L2_CID_STATELESS_VP9_FRAME, + .ops = &hantro_vp9_ctrl_ops, }, }, { .codec = HANTRO_VP9_DECODER, From patchwork Wed Jul 6 18:29:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 12908465 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D7699C43334 for ; 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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id r15-20020a0560001b8f00b0021d74906683sm5142406wru.28.2022.07.06.11.29.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 11:29:20 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v3 7/7] media: hantro: sunxi: Enable 10-bit decoding Date: Wed, 6 Jul 2022 20:29:01 +0200 Message-Id: <20220706182901.78949-8-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220706182901.78949-1-jernej.skrabec@gmail.com> References: <20220706182901.78949-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220706_112924_089969_10FE9451 X-CRM114-Status: GOOD ( 10.10 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Now that infrastructure for 10-bit decoding exists, enable it for Allwinner H6. Tested-by: Benjamin Gaignard Signed-off-by: Jernej Skrabec --- drivers/staging/media/hantro/sunxi_vpu_hw.c | 27 +++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/staging/media/hantro/sunxi_vpu_hw.c b/drivers/staging/media/hantro/sunxi_vpu_hw.c index fbeac81e59e1..02ce8b064a8f 100644 --- a/drivers/staging/media/hantro/sunxi_vpu_hw.c +++ b/drivers/staging/media/hantro/sunxi_vpu_hw.c @@ -23,12 +23,39 @@ static const struct hantro_fmt sunxi_vpu_postproc_fmts[] = { .step_height = 32, }, }, + { + .fourcc = V4L2_PIX_FMT_P010, + .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, + .frmsize = { + .min_width = FMT_MIN_WIDTH, + .max_width = FMT_UHD_WIDTH, + .step_width = 32, + .min_height = FMT_MIN_HEIGHT, + .max_height = FMT_UHD_HEIGHT, + .step_height = 32, + }, + }, }; static const struct hantro_fmt sunxi_vpu_dec_fmts[] = { { .fourcc = V4L2_PIX_FMT_NV12_4L4, .codec_mode = HANTRO_MODE_NONE, + .match_depth = true, + .frmsize = { + .min_width = FMT_MIN_WIDTH, + .max_width = FMT_UHD_WIDTH, + .step_width = 32, + .min_height = FMT_MIN_HEIGHT, + .max_height = FMT_UHD_HEIGHT, + .step_height = 32, + }, + }, + { + .fourcc = V4L2_PIX_FMT_P010_4L4, + .codec_mode = HANTRO_MODE_NONE, + .match_depth = true, .frmsize = { .min_width = FMT_MIN_WIDTH, .max_width = FMT_UHD_WIDTH,