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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add fsl,imx8ulp-fec for i.MX8ULP platform. Signed-off-by: Wei Fang Acked-by: Krzysztof Kozlowski --- V2 change: Add fsl,imx6q-fec --- Documentation/devicetree/bindings/net/fsl,fec.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml index daa2f79a294f..4d2454ade3b6 100644 --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml @@ -58,6 +58,11 @@ properties: - fsl,imx8qxp-fec - const: fsl,imx8qm-fec - const: fsl,imx6sx-fec + - items: + - enum: + - fsl,imx8ulp-fec + - const: fsl,imx6ul-fec + - const: fsl,imx6q-fec reg: maxItems: 1 From patchwork Mon Jul 11 09:44:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Fang X-Patchwork-Id: 12912754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 69A31CCA479 for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the fec support on i.MX8ULP platforms. Signed-off-by: Wei Fang --- V2 change: Remove the external clocks which is related to specific board. --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index 60c1b018bf03..3e8a1e4f0fc2 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -16,6 +16,7 @@ / { #size-cells = <2>; aliases { + ethernet0 = &fec; gpio0 = &gpiod; gpio1 = &gpioe; gpio2 = &gpiof; @@ -365,6 +366,16 @@ usdhc2: mmc@298f0000 { bus-width = <4>; status = "disabled"; }; + + fec: ethernet@29950000 { + compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec"; + reg = <0x29950000 0x10000>; + interrupts = ; + interrupt-names = "int0"; + fsl,num-tx-queues = <1>; + fsl,num-rx-queues = <1>; + status = "disabled"; + }; }; gpioe: gpio@2d000080 { From patchwork Mon Jul 11 09:44:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Fang X-Patchwork-Id: 12912755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D59EAC43334 for ; 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Received: from AM9PR04MB9003.eurprd04.prod.outlook.com (2603:10a6:20b:40a::9) by AM0PR04MB6673.eurprd04.prod.outlook.com (2603:10a6:208:16a::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5417.25; Mon, 11 Jul 2022 01:49:52 +0000 Received: from AM9PR04MB9003.eurprd04.prod.outlook.com ([fe80::a9e6:66bf:9b6f:1573]) by AM9PR04MB9003.eurprd04.prod.outlook.com ([fe80::a9e6:66bf:9b6f:1573%8]) with mapi id 15.20.5417.026; Mon, 11 Jul 2022 01:49:52 +0000 From: Wei Fang To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, peng.fan@nxp.com, ping.bai@nxp.com, sudeep.holla@arm.com, linux-arm-kernel@lists.infradead.org, aisheng.dong@nxp.com Subject: [PATCH V2 3/3] arm64: dts: imx8ulp-evk: Add the fec support Date: Mon, 11 Jul 2022 19:44:34 +1000 Message-Id: <20220711094434.369377-4-wei.fang@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220711094434.369377-1-wei.fang@nxp.com> References: <20220711094434.369377-1-wei.fang@nxp.com> X-ClientProxiedBy: SG2PR04CA0169.apcprd04.prod.outlook.com (2603:1096:4::31) To AM9PR04MB9003.eurprd04.prod.outlook.com (2603:10a6:20b:40a::9) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: fcad9f76-6263-4bc4-530c-08da62dfa5bf X-MS-TrafficTypeDiagnostic: AM0PR04MB6673:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Wei Fang --- V2 change: Add clock_ext_rmii and clock_ext_ts. They are both related to EVK board. --- arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts index 33e84c4e9ed8..ebce716b10e6 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts @@ -19,6 +19,21 @@ memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0 0x80000000>; }; + + clock_ext_rmii: clock-ext-rmii { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + clock-output-names = "ext_rmii_clk"; + #clock-cells = <0>; + }; + + clock_ext_ts: clock-ext-ts { + compatible = "fixed-clock"; + /* External ts clock is 50MHZ from PHY on EVK board. */ + clock-frequency = <50000000>; + clock-output-names = "ext_ts_clk"; + #clock-cells = <0>; + }; }; &lpuart5 { @@ -38,7 +53,49 @@ &usdhc0 { status = "okay"; }; +&fec { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_enet>; + pinctrl-1 = <&pinctrl_enet>; + clocks = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>, + <&pcc4 IMX8ULP_CLK_ENET>, + <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>, + <&clock_ext_rmii>; + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref"; + assigned-clocks = <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>; + assigned-clock-parents = <&clock_ext_ts>; + phy-mode = "rmii"; + phy-handle = <ðphy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy: ethernet-phy { + reg = <1>; + micrel,led-mode = <1>; + }; + }; +}; + &iomuxc1 { + pinctrl_enet: enetgrp { + fsl,pins = < + MX8ULP_PAD_PTE15__ENET0_MDC 0x43 + MX8ULP_PAD_PTE14__ENET0_MDIO 0x43 + MX8ULP_PAD_PTE17__ENET0_RXER 0x43 + MX8ULP_PAD_PTE18__ENET0_CRS_DV 0x43 + MX8ULP_PAD_PTF1__ENET0_RXD0 0x43 + MX8ULP_PAD_PTE20__ENET0_RXD1 0x43 + MX8ULP_PAD_PTE16__ENET0_TXEN 0x43 + MX8ULP_PAD_PTE23__ENET0_TXD0 0x43 + MX8ULP_PAD_PTE22__ENET0_TXD1 0x43 + MX8ULP_PAD_PTE19__ENET0_REFCLK 0x43 + MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43 + >; + }; + pinctrl_lpuart5: lpuart5grp { fsl,pins = < MX8ULP_PAD_PTF14__LPUART5_TX 0x3