From patchwork Wed Jul 13 16:54:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12917114 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CD422C43334 for ; Wed, 13 Jul 2022 20:53:49 +0000 (UTC) Received: from localhost ([::1]:47180 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oBjMi-0007mj-Uw for qemu-devel@archiver.kernel.org; Wed, 13 Jul 2022 16:53:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55898) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBg9t-0003zS-JC; Wed, 13 Jul 2022 13:28:21 -0400 Received: from imap5.colo.codethink.co.uk ([78.40.148.171]:54838) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBg9o-0006ss-8F; Wed, 13 Jul 2022 13:28:20 -0400 Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122] helo=rainbowdash) by imap5.colo.codethink.co.uk with esmtpsa (Exim 4.94.2 #2 (Debian)) id 1oBfdU-003eoT-Ek; Wed, 13 Jul 2022 17:54:50 +0100 Received: from ben by rainbowdash with local (Exim 4.96) (envelope-from ) id 1oBfdS-0009kh-1a; Wed, 13 Jul 2022 17:54:50 +0100 From: Ben Dooks To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Jude Onyenegecha , Sudip Mukherjee , William Salmon , Adnan Chowdhury , Ben Dooks , Ben Dooks Subject: [PATCH 1/7] pci: designware: add 64-bit viewport limit Date: Wed, 13 Jul 2022 17:54:43 +0100 Message-Id: <20220713165449.37433-2-ben.dooks@sifive.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220713165449.37433-1-ben.dooks@sifive.com> References: <20220713165449.37433-1-ben.dooks@sifive.com> MIME-Version: 1.0 Received-SPF: pass client-ip=78.40.148.171; envelope-from=ben@codethink.co.uk; helo=imap5.colo.codethink.co.uk X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Wed, 13 Jul 2022 16:45:29 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Versions 4 and above add support for 64-bit viewport limit. Add support for the DESIGNWARE_PCIE_ATU_UPPER_LIMIT regiser where supported. Signed-off-by: Ben Dooks --- hw/pci-host/designware.c | 22 +++++++++++++++++----- include/hw/pci-host/designware.h | 2 +- 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index bde3a343a2..296f1b9760 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -54,6 +54,7 @@ #define DESIGNWARE_PCIE_ATU_BUS(x) (((x) >> 24) & 0xff) #define DESIGNWARE_PCIE_ATU_DEVFN(x) (((x) >> 16) & 0xff) #define DESIGNWARE_PCIE_ATU_UPPER_TARGET 0x91C +#define DESIGNWARE_PCIE_ATU_UPPER_LIMIT 0x924 #define DESIGNWARE_PCIE_IRQ_MSI 3 @@ -196,6 +197,10 @@ designware_pcie_root_config_read(PCIDevice *d, uint32_t address, int len) val = viewport->target >> 32; break; + case DESIGNWARE_PCIE_ATU_UPPER_LIMIT: + val = viewport->limit >> 32; + break; + case DESIGNWARE_PCIE_ATU_LIMIT: val = viewport->limit; break; @@ -269,7 +274,7 @@ static void designware_pcie_update_viewport(DesignwarePCIERoot *root, { const uint64_t target = viewport->target; const uint64_t base = viewport->base; - const uint64_t size = (uint64_t)viewport->limit - base + 1; + const uint64_t size = viewport->limit - base + 1; const bool enabled = viewport->cr[1] & DESIGNWARE_PCIE_ATU_ENABLE; MemoryRegion *current, *other; @@ -363,14 +368,21 @@ static void designware_pcie_root_config_write(PCIDevice *d, uint32_t address, viewport->target |= val; break; + case DESIGNWARE_PCIE_ATU_UPPER_LIMIT: + viewport->limit &= 0x00000000FFFFFFFFUL; + viewport->limit |= (uint64_t)val << 32; + break; + case DESIGNWARE_PCIE_ATU_LIMIT: - viewport->limit = val; + viewport->limit = 0xFFFFFFFF00000000ULL; + viewport->limit |= val; break; case DESIGNWARE_PCIE_ATU_CR1: viewport->cr[0] = val; break; case DESIGNWARE_PCIE_ATU_CR2: + //printf("CR2: value %08x\n", val); viewport->cr[1] = val; designware_pcie_update_viewport(root, viewport); break; @@ -429,7 +441,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) viewport->inbound = true; viewport->base = 0x0000000000000000ULL; viewport->target = 0x0000000000000000ULL; - viewport->limit = UINT32_MAX; + viewport->limit = UINT64_MAX-1; viewport->cr[0] = DESIGNWARE_PCIE_ATU_TYPE_MEM; source = &host->pci.address_space_root; @@ -453,7 +465,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) viewport->inbound = false; viewport->base = 0x0000000000000000ULL; viewport->target = 0x0000000000000000ULL; - viewport->limit = UINT32_MAX; + viewport->limit = UINT64_MAX-1; viewport->cr[0] = DESIGNWARE_PCIE_ATU_TYPE_MEM; destination = &host->pci.memory; @@ -560,7 +572,7 @@ static const VMStateDescription vmstate_designware_pcie_viewport = { .fields = (VMStateField[]) { VMSTATE_UINT64(base, DesignwarePCIEViewport), VMSTATE_UINT64(target, DesignwarePCIEViewport), - VMSTATE_UINT32(limit, DesignwarePCIEViewport), + VMSTATE_UINT64(limit, DesignwarePCIEViewport), VMSTATE_UINT32_ARRAY(cr, DesignwarePCIEViewport, 2), VMSTATE_END_OF_LIST() } diff --git a/include/hw/pci-host/designware.h b/include/hw/pci-host/designware.h index 6d9b51ae67..bd4dd49aec 100644 --- a/include/hw/pci-host/designware.h +++ b/include/hw/pci-host/designware.h @@ -44,7 +44,7 @@ typedef struct DesignwarePCIEViewport { uint64_t base; uint64_t target; - uint32_t limit; + uint64_t limit; uint32_t cr[2]; bool inbound; From patchwork Wed Jul 13 16:54:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12917113 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5DC82C433EF for ; Wed, 13 Jul 2022 20:53:49 +0000 (UTC) Received: from localhost ([::1]:47186 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oBjMi-0007mt-GF for qemu-devel@archiver.kernel.org; Wed, 13 Jul 2022 16:53:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53034) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBfwP-0006c7-SW; Wed, 13 Jul 2022 13:14:25 -0400 Received: from imap4.hz.codethink.co.uk ([188.40.203.114]:38712) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBfwO-0003Bp-FU; Wed, 13 Jul 2022 13:14:25 -0400 Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122] helo=rainbowdash) by imap4.hz.codethink.co.uk with esmtpsa (Exim 4.94.2 #2 (Debian)) id 1oBfdU-003M8m-0n; Wed, 13 Jul 2022 17:54:51 +0100 Received: from ben by rainbowdash with local (Exim 4.96) (envelope-from ) id 1oBfdS-0009kk-1f; Wed, 13 Jul 2022 17:54:50 +0100 From: Ben Dooks To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Jude Onyenegecha , Sudip Mukherjee , William Salmon , Adnan Chowdhury , Ben Dooks Subject: [PATCH 2/7] pci: designware: fix DESIGNWARE_PCIE_ATU_UPPER_TARGET Date: Wed, 13 Jul 2022 17:54:44 +0100 Message-Id: <20220713165449.37433-3-ben.dooks@sifive.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220713165449.37433-1-ben.dooks@sifive.com> References: <20220713165449.37433-1-ben.dooks@sifive.com> MIME-Version: 1.0 Received-SPF: pass client-ip=188.40.203.114; envelope-from=ben@codethink.co.uk; helo=imap4.hz.codethink.co.uk X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Wed, 13 Jul 2022 16:45:28 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" By inspection DESIGNWARE_PCIE_ATU_UPPER_TARGET should be writing to the upper 32-bits of viewport->target, so fix this by shifting the 32-bit value before the or. Signed-off-by: Ben Dooks --- hw/pci-host/designware.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 296f1b9760..d213d7324c 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -365,7 +365,7 @@ static void designware_pcie_root_config_write(PCIDevice *d, uint32_t address, case DESIGNWARE_PCIE_ATU_UPPER_TARGET: viewport->target &= 0x00000000FFFFFFFFULL; - viewport->target |= val; + viewport->target |= (uint64_t)val << 32; break; case DESIGNWARE_PCIE_ATU_UPPER_LIMIT: From patchwork Wed Jul 13 16:54:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12917093 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6BA12C43334 for ; Wed, 13 Jul 2022 20:51:52 +0000 (UTC) Received: from localhost ([::1]:42930 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oBjKp-0004i9-DD for qemu-devel@archiver.kernel.org; Wed, 13 Jul 2022 16:51:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53058) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBfwT-0006dl-6R; Wed, 13 Jul 2022 13:14:29 -0400 Received: from imap4.hz.codethink.co.uk ([188.40.203.114]:38714) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBfwR-0003CY-Lk; Wed, 13 Jul 2022 13:14:28 -0400 Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122] helo=rainbowdash) by imap4.hz.codethink.co.uk with esmtpsa (Exim 4.94.2 #2 (Debian)) id 1oBfdU-003M8o-18; Wed, 13 Jul 2022 17:54:51 +0100 Received: from ben by rainbowdash with local (Exim 4.96) (envelope-from ) id 1oBfdS-0009kn-1k; Wed, 13 Jul 2022 17:54:50 +0100 From: Ben Dooks To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Jude Onyenegecha , Sudip Mukherjee , William Salmon , Adnan Chowdhury , Ben Dooks Subject: [PATCH 3/7] pci: designware: clamp viewport index Date: Wed, 13 Jul 2022 17:54:45 +0100 Message-Id: <20220713165449.37433-4-ben.dooks@sifive.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220713165449.37433-1-ben.dooks@sifive.com> References: <20220713165449.37433-1-ben.dooks@sifive.com> MIME-Version: 1.0 Received-SPF: pass client-ip=188.40.203.114; envelope-from=ben@codethink.co.uk; helo=imap4.hz.codethink.co.uk X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Wed, 13 Jul 2022 16:45:29 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The current Linux driver for this assumes it can write the 255 into this register and then read back the value to work out how many viewports are supported. Clamp the value so that the probe works and does not cause memory corruption as the value is not well clamped elsewhere in the driver. Signed-off-by: Ben Dooks --- hw/pci-host/designware.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index d213d7324c..6403416634 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -345,6 +345,10 @@ static void designware_pcie_root_config_write(PCIDevice *d, uint32_t address, break; case DESIGNWARE_PCIE_ATU_VIEWPORT: + /* clamp this value, linux uses it to calculate the + * available number of viewports */ + if (val >= DESIGNWARE_PCIE_NUM_VIEWPORTS) + val = DESIGNWARE_PCIE_NUM_VIEWPORTS-1; root->atu_viewport = val; break; From patchwork Wed Jul 13 16:54:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12917116 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B784CC433EF for ; Wed, 13 Jul 2022 20:56:12 +0000 (UTC) Received: from localhost ([::1]:51300 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oBjP1-0002Lq-Si for qemu-devel@archiver.kernel.org; Wed, 13 Jul 2022 16:56:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53082) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBfwW-0006fD-68; Wed, 13 Jul 2022 13:14:32 -0400 Received: from imap4.hz.codethink.co.uk ([188.40.203.114]:38716) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBfwU-0003DM-OB; Wed, 13 Jul 2022 13:14:31 -0400 Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122] helo=rainbowdash) by imap4.hz.codethink.co.uk with esmtpsa (Exim 4.94.2 #2 (Debian)) id 1oBfdU-003M8p-1I; Wed, 13 Jul 2022 17:54:51 +0100 Received: from ben by rainbowdash with local (Exim 4.96) (envelope-from ) id 1oBfdS-0009kt-1o; Wed, 13 Jul 2022 17:54:50 +0100 From: Ben Dooks To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Jude Onyenegecha , Sudip Mukherjee , William Salmon , Adnan Chowdhury , Ben Dooks Subject: [PATCH 4/7] pci: designware: ignore new bits in ATU CR1 Date: Wed, 13 Jul 2022 17:54:46 +0100 Message-Id: <20220713165449.37433-5-ben.dooks@sifive.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220713165449.37433-1-ben.dooks@sifive.com> References: <20220713165449.37433-1-ben.dooks@sifive.com> MIME-Version: 1.0 Received-SPF: pass client-ip=188.40.203.114; envelope-from=ben@codethink.co.uk; helo=imap4.hz.codethink.co.uk X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Wed, 13 Jul 2022 16:45:29 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" In version 4 and anver ATU CR1 has more bits in it than just the viewport type. Make a guess at masking these out to avoid issues where Linux writes these bits and fails to enable memory ATUs. Signed-off-by: Ben Dooks --- hw/pci-host/designware.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 6403416634..947547d153 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -276,10 +276,10 @@ static void designware_pcie_update_viewport(DesignwarePCIERoot *root, const uint64_t base = viewport->base; const uint64_t size = viewport->limit - base + 1; const bool enabled = viewport->cr[1] & DESIGNWARE_PCIE_ATU_ENABLE; - + uint32_t cr0 = viewport->cr[0]; MemoryRegion *current, *other; - if (viewport->cr[0] == DESIGNWARE_PCIE_ATU_TYPE_MEM) { + if ((cr0 & 0xFF) == DESIGNWARE_PCIE_ATU_TYPE_MEM) { current = &viewport->mem; other = &viewport->cfg; memory_region_set_alias_offset(current, target); From patchwork Wed Jul 13 16:54:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12917115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE380C43334 for ; Wed, 13 Jul 2022 20:56:10 +0000 (UTC) Received: from localhost ([::1]:51288 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oBjOz-0002LT-Ub for qemu-devel@archiver.kernel.org; Wed, 13 Jul 2022 16:56:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55916) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBg9w-00044N-8M; Wed, 13 Jul 2022 13:28:24 -0400 Received: from imap5.colo.codethink.co.uk ([78.40.148.171]:53198) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBg9u-0006uS-Hi; Wed, 13 Jul 2022 13:28:23 -0400 Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122] helo=rainbowdash) by imap5.colo.codethink.co.uk with esmtpsa (Exim 4.94.2 #2 (Debian)) id 1oBfdU-003eoU-Hg; Wed, 13 Jul 2022 17:54:51 +0100 Received: from ben by rainbowdash with local (Exim 4.96) (envelope-from ) id 1oBfdS-0009kx-1t; Wed, 13 Jul 2022 17:54:50 +0100 From: Ben Dooks To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Jude Onyenegecha , Sudip Mukherjee , William Salmon , Adnan Chowdhury , Ben Dooks Subject: [PATCH 5/7] pci: designware: move msi to entry 5 Date: Wed, 13 Jul 2022 17:54:47 +0100 Message-Id: <20220713165449.37433-6-ben.dooks@sifive.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220713165449.37433-1-ben.dooks@sifive.com> References: <20220713165449.37433-1-ben.dooks@sifive.com> MIME-Version: 1.0 Received-SPF: pass client-ip=78.40.148.171; envelope-from=ben@codethink.co.uk; helo=imap5.colo.codethink.co.uk X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Wed, 13 Jul 2022 16:45:29 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The driver should leave irq[0..3] for INT[A..D] but seems to put the MSI IRQ at entry 3 which should also be INT_D. Extend the irqs[] array to 5 entires and put the MSI at entry irqs[4]. Signed-off-by: Ben Dooks --- hw/pci-host/designware.c | 2 +- include/hw/pci-host/designware.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 947547d153..b5d5b2b8a5 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -56,7 +56,7 @@ #define DESIGNWARE_PCIE_ATU_UPPER_TARGET 0x91C #define DESIGNWARE_PCIE_ATU_UPPER_LIMIT 0x924 -#define DESIGNWARE_PCIE_IRQ_MSI 3 +#define DESIGNWARE_PCIE_IRQ_MSI 4 static DesignwarePCIEHost * designware_pcie_root_to_host(DesignwarePCIERoot *root) diff --git a/include/hw/pci-host/designware.h b/include/hw/pci-host/designware.h index bd4dd49aec..37f90c5000 100644 --- a/include/hw/pci-host/designware.h +++ b/include/hw/pci-host/designware.h @@ -90,7 +90,7 @@ struct DesignwarePCIEHost { MemoryRegion memory; MemoryRegion io; - qemu_irq irqs[4]; + qemu_irq irqs[5]; } pci; MemoryRegion mmio; From patchwork Wed Jul 13 16:54:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12917092 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 49BADCCA479 for ; Wed, 13 Jul 2022 20:48:47 +0000 (UTC) Received: from localhost ([::1]:36270 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oBjHq-000076-8q for qemu-devel@archiver.kernel.org; Wed, 13 Jul 2022 16:48:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52958) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBfwG-0006Ys-IB; Wed, 13 Jul 2022 13:14:16 -0400 Received: from imap4.hz.codethink.co.uk ([188.40.203.114]:48444) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBfw9-00038p-L3; Wed, 13 Jul 2022 13:14:15 -0400 Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122] helo=rainbowdash) by imap4.hz.codethink.co.uk with esmtpsa (Exim 4.94.2 #2 (Debian)) id 1oBfdU-003M8q-19; Wed, 13 Jul 2022 17:54:51 +0100 Received: from ben by rainbowdash with local (Exim 4.96) (envelope-from ) id 1oBfdS-0009l1-1y; Wed, 13 Jul 2022 17:54:50 +0100 From: Ben Dooks To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Jude Onyenegecha , Sudip Mukherjee , William Salmon , Adnan Chowdhury , Ben Dooks Subject: [PATCH 6/7] pci: designware: correct host's class_id Date: Wed, 13 Jul 2022 17:54:48 +0100 Message-Id: <20220713165449.37433-7-ben.dooks@sifive.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220713165449.37433-1-ben.dooks@sifive.com> References: <20220713165449.37433-1-ben.dooks@sifive.com> MIME-Version: 1.0 Received-SPF: pass client-ip=188.40.203.114; envelope-from=ben@codethink.co.uk; helo=imap4.hz.codethink.co.uk X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_HELO_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Wed, 13 Jul 2022 16:45:22 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is a host to pcie bridge, so use PCI_CLASS_BRIDGE_HOST for the class. Signed-off-by: Ben Dooks --- hw/pci-host/designware.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index b5d5b2b8a5..a47ae48071 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -615,7 +615,7 @@ static void designware_pcie_root_class_init(ObjectClass *klass, void *data) k->vendor_id = PCI_VENDOR_ID_SYNOPSYS; k->device_id = 0xABCD; k->revision = 0; - k->class_id = PCI_CLASS_BRIDGE_PCI; + k->class_id = PCI_CLASS_BRIDGE_HOST; k->is_bridge = true; k->exit = pci_bridge_exitfn; k->realize = designware_pcie_root_realize; From patchwork Wed Jul 13 16:54:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12917090 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CA44AC433EF for ; Wed, 13 Jul 2022 20:48:46 +0000 (UTC) Received: from localhost ([::1]:36198 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oBjHp-0008Vj-H1 for qemu-devel@archiver.kernel.org; Wed, 13 Jul 2022 16:48:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52972) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBfwJ-0006ZZ-P1; Wed, 13 Jul 2022 13:14:19 -0400 Received: from imap4.hz.codethink.co.uk ([188.40.203.114]:60716) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oBfwI-0003Aa-6c; Wed, 13 Jul 2022 13:14:19 -0400 Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122] helo=rainbowdash) by imap4.hz.codethink.co.uk with esmtpsa (Exim 4.94.2 #2 (Debian)) id 1oBfdU-003M8r-1K; Wed, 13 Jul 2022 17:54:51 +0100 Received: from ben by rainbowdash with local (Exim 4.96) (envelope-from ) id 1oBfdS-0009l5-22; Wed, 13 Jul 2022 17:54:50 +0100 From: Ben Dooks To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Jude Onyenegecha , Sudip Mukherjee , William Salmon , Adnan Chowdhury , Ben Dooks Subject: [PATCH 7/7] pci: designware: add initial tracing events Date: Wed, 13 Jul 2022 17:54:49 +0100 Message-Id: <20220713165449.37433-8-ben.dooks@sifive.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220713165449.37433-1-ben.dooks@sifive.com> References: <20220713165449.37433-1-ben.dooks@sifive.com> MIME-Version: 1.0 Received-SPF: pass client-ip=188.40.203.114; envelope-from=ben@codethink.co.uk; helo=imap4.hz.codethink.co.uk X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Wed, 13 Jul 2022 16:45:26 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add a couple of tracing events for internal driver updates Signed-off-by: Ben Dooks --- hw/pci-host/designware.c | 4 ++++ hw/pci-host/trace-events | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index a47ae48071..489959513f 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -30,6 +30,7 @@ #include "migration/vmstate.h" #include "hw/irq.h" #include "hw/pci-host/designware.h" +#include "trace.h" #define DESIGNWARE_PCIE_PORT_LINK_CONTROL 0x710 #define DESIGNWARE_PCIE_PHY_DEBUG_R1 0x72C @@ -112,6 +113,7 @@ static void designware_pcie_root_update_msi_mapping(DesignwarePCIERoot *root) const uint64_t base = root->msi.base; const bool enable = root->msi.intr[0].enable; + trace_dw_pcie_msi_update(base, enable); memory_region_set_address(mem, base); memory_region_set_enabled(mem, enable); } @@ -279,6 +281,8 @@ static void designware_pcie_update_viewport(DesignwarePCIERoot *root, uint32_t cr0 = viewport->cr[0]; MemoryRegion *current, *other; + trace_dw_pcie_viewport_update(target, base, size, cr0, enabled); + if ((cr0 & 0xFF) == DESIGNWARE_PCIE_ATU_TYPE_MEM) { current = &viewport->mem; other = &viewport->cfg; diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events index 437e66ff50..6b064d3c74 100644 --- a/hw/pci-host/trace-events +++ b/hw/pci-host/trace-events @@ -3,6 +3,10 @@ # bonito.c bonito_spciconf_small_access(uint64_t addr, unsigned size) "PCI config address is smaller then 32-bit, addr: 0x%"PRIx64", size: %u" +# designware.c +dw_pcie_msi_update(uint64_t base, int enable) "base 0x%" PRIx64 " enable %d" +dw_pcie_viewport_update(uint64_t target, uint64_t base, uint64_t limit, uint32_t cr0, int enabled) "target 0x%" PRIx64 " base 0x%" PRIx64 " limit 0x%" PRIx64 " cr0 0x%" PRIx32 " enabled %d" + # grackle.c grackle_set_irq(int irq_num, int level) "set_irq num %d level %d"