From patchwork Mon Jan 14 18:42:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthias Kaehlcke X-Patchwork-Id: 10763305 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AB49A6C2 for ; Mon, 14 Jan 2019 18:43:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9D3BC298DB for ; Mon, 14 Jan 2019 18:43:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 90BBD298E5; Mon, 14 Jan 2019 18:43:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3D574298DB for ; Mon, 14 Jan 2019 18:43:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726815AbfANSnN (ORCPT ); Mon, 14 Jan 2019 13:43:13 -0500 Received: from mail-pg1-f194.google.com ([209.85.215.194]:44507 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726758AbfANSnN (ORCPT ); Mon, 14 Jan 2019 13:43:13 -0500 Received: by mail-pg1-f194.google.com with SMTP id t13so408pgr.11 for ; Mon, 14 Jan 2019 10:43:13 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=iEPj3gwfHL0lmQt8i9cpEJHC7YdOzae9+2BrYxoGEH8=; b=KlrUzSGDnL2LeHlEiFhXrBGbsgX2HBgzl9BCpvHqJpHAgQslqGFtRvFXfs9IDlK8SP btvJTZe3sNIR22AeD/WA7xNTfu5cCWXiTjFHNHXxkdPQpO5GxZglvBSsdcXqeu6n9y72 BtVc7Zo7F/nhKhRJLJ+e5xxQy6kCmTOQqW62EU1khMeE5q94c9EGP0aws5mR55r29xoL UpkjqCaBb4k/mbbRjfdKyvBDF+82P4dqc5crrr/sXXeavlcaQwK3zbeqddKIM61dZQZw JZDTKYvCDR2LoIBX77641zHgq4s+pHO0RxPPzYA4G/Kyn1k9RJWziS+/rgvyLQXW8XBJ co9w== X-Gm-Message-State: AJcUukcLWC4JLoVidKEst7k/ELdyrJZsd0GVt6EYw2xQNMyUgjA0uEjA mGr5jVcCVsFwD3iRc8fo65ykkyvzoqCFQw== X-Google-Smtp-Source: ALg8bN4wHpFDmuWairamlt1Mix3xcf+GUbdNTZWE9nY+Mlw3dJCAkh+fcjiqMcETF5TBRV26bLCG9g== X-Received: by 2002:aa7:8802:: with SMTP id c2mr19461747pfo.20.1547491392444; Mon, 14 Jan 2019 10:43:12 -0800 (PST) Received: from mka.mtv.corp.google.com ([2620:15c:202:1:75a:3f6e:21d:9374]) by smtp.gmail.com with ESMTPSA id v191sm1197512pgb.77.2019.01.14.10.43.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Jan 2019 10:43:11 -0800 (PST) From: Matthias Kaehlcke To: Andy Gross , David Brown , Rob Herring , Mark Rutland Cc: linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Douglas Anderson , Rajendra Nayak , Matthias Kaehlcke Subject: [PATCH] arm64: dts: sdm845: Add CPU topology Date: Mon, 14 Jan 2019 10:42:55 -0800 Message-Id: <20190114184255.258318-1-mka@chromium.org> X-Mailer: git-send-email 2.20.1.97.g81188d93c3-goog MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The 8 CPU cores of the SDM845 are organized in two clusters of 4 big ("gold") and 4 little ("silver") cores. Add a cpu-map node to the DT that describes this topology. Signed-off-by: Matthias Kaehlcke Reviewed-by: Douglas Anderson Signed-off-by: Amit Kucheria Reviewed-by: Stephen Boyd Reviewed-by: Sudeep Holla --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 38 ++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c27cbd3bcb0a6..f6c0d87e663f3 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -192,6 +192,44 @@ next-level-cache = <&L3_0>; }; }; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + }; + + cluster1 { + core0 { + cpu = <&CPU4>; + }; + + core1 { + cpu = <&CPU5>; + }; + + core2 { + cpu = <&CPU6>; + }; + + core3 { + cpu = <&CPU7>; + }; + }; + }; }; pmu {