From patchwork Mon Aug 1 22:09:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12934152 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88546C19F29 for ; Mon, 1 Aug 2022 22:11:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=cfFl44kt1odvXEkf0yT5OW0IHp1cNYAoFt/KmMalcTo=; b=icHVSVaT8Futx5 RtISTGa1CmH1gMecKx+vDZDFJ7a2B+NmNFjemksgfycwwDAsRftzRQHsy6d/BAAvVcdfLiN2pf8Ui nDnZ2D/6zJt+KKVZU2nVpcPPLLdoC8nSmIO+Zcf7zrxDi+nS4Z653mZL0KZk7oO36EWuVKUAW1xmq 7u+pzKwKoq9Ov07e32abtCMoz+K2Pej6xFX3rP5SYKIBqte21DciPrIpcWBiJ5fGINAfewVRXzVff /A0JnzQeAYCjl1KDm7EMqcWt6Eyo174y/LFGim5NDU6ev8sqEWzlTtn00hTCu3MZajOFbJyBj/oQi me8mm0w5sLMDWRMrXCDQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oIdbq-00BGBH-0a; Mon, 01 Aug 2022 22:09:58 +0000 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oIdbX-00BFxL-C2 for linux-arm-kernel@lists.infradead.org; Mon, 01 Aug 2022 22:09:42 +0000 Received: by mail-pl1-x62b.google.com with SMTP id iw1so11722966plb.6 for ; Mon, 01 Aug 2022 15:09:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=sjab8NUtyjy7A2QDJ5EJm8tKiQk79yMcDvt2JCTAsw0=; b=doXfW1Zz0vXbj2SptEufE+H0lyvFuZX/+1ML39t4MtIzg2K775qZVef6fZUdoPobu/ vt8kZlpDZMCD15SKax/ZVo0LKoCLD4UdoKt3GBQ8e9GT9tdyUgbgI/cCq23LWKFNVUAO VE5E+rP5Q7tBQXSDJsCQ5bxCWKErC2WUyTINMFGX2X13TDI/1NF2CCq2fR43v1M06MdX eOh2+ZQnlXKiA1T/j+SuvL/XZY/zYp23Mg18z4irtagh5kK1mR4eHs/pNq7guMjJfmQT gu2RkZ94oKnGw3+hDRrNJc6qfD9x3zdGtPqGAdl5CHFiig1fMXLctmiCyEUrCMm3vUla KkxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=sjab8NUtyjy7A2QDJ5EJm8tKiQk79yMcDvt2JCTAsw0=; b=jeXx6SGPXFcP6/k0keb1tP8CYmVtyJj8MueWrm6jrjpVW7NjwZLQLPLnSXri+zBUli pb4+DYEwzxWQYOzoBV89YmWhndlfIq/2m6zSsyKA28dfzai5zhypdmxxUW4b6RcfwxQ/ cuwQy6apEvGReZ7kbQCkX1IaFC3Mfbfwhccs+zYUs/VvT5pPCJLb7dWagyWloxYFqOhq MTeLKLA16um0dAZbj7WtzJdIbj1kWg0C42I7R1yX1G4FgyCYdNhZreYyddt5SF0Tu+tu 9kvnf/nG/m9If7UQk47ElCt4eBXDo3O2LJvvfpBQq5v8eNy1pbcqiyePMTBHAfKh3tgs GstQ== X-Gm-Message-State: ACgBeo0bdkeqFrD4+Oau+LB6pok+V1omk4q46cQqmidaeX3LHYJFD5lJ LhB+ihjNhT/1CVzioSlaBv0= X-Google-Smtp-Source: AA6agR5ubTKoly0OfbXLwy3n8TdouvblHS8E8zj9EhjHj5NhxTjqsHOBQPBQaviIotcIKnLCur+qSQ== X-Received: by 2002:a17:902:7612:b0:16d:c805:7d4d with SMTP id k18-20020a170902761200b0016dc8057d4dmr17776805pll.171.1659391775531; Mon, 01 Aug 2022 15:09:35 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id g15-20020a1709029f8f00b001637529493esm10136969plq.66.2022.08.01.15.09.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Aug 2022 15:09:35 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Rob Herring , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH v3 1/3] dt-bindings: memory-controller: Document Broadcom STB MEMC Date: Mon, 1 Aug 2022 15:09:29 -0700 Message-Id: <20220801220931.181531-2-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220801220931.181531-1-f.fainelli@gmail.com> References: <20220801220931.181531-1-f.fainelli@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220801_150939_433456_F0A55DE6 X-CRM114-Status: GOOD ( 16.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Document the Broadcom STB memory controller which is a trivial binding for now with a set of compatible strings and single register. Since we introduce this binding, the section in Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt is removed and this binding is referenced instead. Reviewed-by: Rob Herring Signed-off-by: Florian Fainelli --- .../bindings/arm/bcm/brcm,brcmstb.txt | 11 +--- .../brcm,brcmstb-memc-ddr.yaml | 52 +++++++++++++++++++ 2 files changed, 54 insertions(+), 9 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt index 104cc9b41df4..e797d2f69f3b 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt @@ -187,15 +187,8 @@ Required properties: Sequencer DRAM parameters and control registers. Used for Self-Refresh Power-Down (SRPD), among other things. -Required properties: -- compatible : should contain one of these - "brcm,brcmstb-memc-ddr-rev-b.2.1" - "brcm,brcmstb-memc-ddr-rev-b.2.2" - "brcm,brcmstb-memc-ddr-rev-b.2.3" - "brcm,brcmstb-memc-ddr-rev-b.3.0" - "brcm,brcmstb-memc-ddr-rev-b.3.1" - "brcm,brcmstb-memc-ddr" -- reg : the MEMC DDR register range +See Documentation/devicetree/bindings/memory-controllers/brcm,memc.yaml for a +full list of supported compatible strings and properties. Example: diff --git a/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml b/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml new file mode 100644 index 000000000000..4b072c879b02 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/brcm,brcmstb-memc-ddr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Memory controller (MEMC) for Broadcom STB + +maintainers: + - Florian Fainelli + +properties: + compatible: + items: + - enum: + - brcm,brcmstb-memc-ddr-rev-b.1.x + - brcm,brcmstb-memc-ddr-rev-b.2.0 + - brcm,brcmstb-memc-ddr-rev-b.2.1 + - brcm,brcmstb-memc-ddr-rev-b.2.2 + - brcm,brcmstb-memc-ddr-rev-b.2.3 + - brcm,brcmstb-memc-ddr-rev-b.2.5 + - brcm,brcmstb-memc-ddr-rev-b.2.6 + - brcm,brcmstb-memc-ddr-rev-b.2.7 + - brcm,brcmstb-memc-ddr-rev-b.2.8 + - brcm,brcmstb-memc-ddr-rev-b.3.0 + - brcm,brcmstb-memc-ddr-rev-b.3.1 + - brcm,brcmstb-memc-ddr-rev-c.1.0 + - brcm,brcmstb-memc-ddr-rev-c.1.1 + - brcm,brcmstb-memc-ddr-rev-c.1.2 + - brcm,brcmstb-memc-ddr-rev-c.1.3 + - brcm,brcmstb-memc-ddr-rev-c.1.4 + - const: brcm,brcmstb-memc-ddr + + reg: + maxItems: 1 + + clock-frequency: + description: DDR PHY frequency in Hz + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + memory-controller@9902000 { + compatible = "brcm,brcmstb-memc-ddr-rev-c.1.1", "brcm,brcmstb-memc-ddr"; + reg = <0x9902000 0x600>; + clock-frequency = <2133000000>; + }; From patchwork Mon Aug 1 22:09:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12934150 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59F11C00144 for ; Mon, 1 Aug 2022 22:11:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=OBwXW+NdlDKhoUz2grZHXjJvLNsf4rHxl4s0AMhLWHE=; b=yWew5Ryessy0zI 6Fj0LQ1Iy40UBRX/XSYCb+vS4nJbpMextYUB1bwLpVzTJdGLLIveMATsWoPsaSQFBNxmgN60Foby6 IpGm3k9CvYne1+ReDGIzAfPttEuxQOmNKfoBhweg6iAhFgfsmc4WxgqAo1j88Br+GwE/OozZzRHwF h3lQpbiDAxJoerk77b6t/+2WhLTp2wJ83g2ZTzBwgscE0+Jap2BD/oZ3y8U7X3EG9a+48asBdcd6i qNnHfyP5j01Fo+fBuE5PC+LPM/pukdYtX4bj2amrMOJ45HxTIdf8BLfr69onJ5Mfo8O7YZPJLFCgh 7A8oqOdSeWfiJFsPOSSg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oIdbg-00BG5o-R5; Mon, 01 Aug 2022 22:09:48 +0000 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oIdbX-00BFyJ-Bi for linux-arm-kernel@lists.infradead.org; Mon, 01 Aug 2022 22:09:40 +0000 Received: by mail-pf1-x42a.google.com with SMTP id f192so2411770pfa.9 for ; Mon, 01 Aug 2022 15:09:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=QGLoUgJ2TVf85FNO9ppA71x6uLHjiN5oNLDyUkLBWZY=; b=d17UTAAusi4TBrUbIR23vHVok0T2hvu6Y3UqOXgIdu9XjfmaFkav7NLPJlA4rrQ51l A6WbBQrWXUeaY9kjPHHjRAWv1OyUf6VE19+9gkfihXBtphKEcFD/biOE1KROZWcnyGqk WSEtWUC4EjSTvLNEOibR1+/Y9IKTxd1skcrNkofc7j2ItYRUS0z6JOkHRWQu0ptSwplO pQxtgUX1ZzpTtXOF+OA4yh/qYmr+nw810M4RLAViQkHTYrKlkfjlcvEe4wr033c0R3pd vzvGD9PIXpjLRR1TQQ++Pq3M0yH4FePMwc0kTmsDKX/HQRy4BF5UubcgEhEucXSU51MX mWUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=QGLoUgJ2TVf85FNO9ppA71x6uLHjiN5oNLDyUkLBWZY=; b=U75c6FPtLbSLtWfvppXcdl6M1wJV1diibl+9SbjbMSB1A65ov41/w3fjcArBo5zkoj RrXjAVFcU+EVBtHOEt5th0/UpUb55L31K78kJ7kY+eFlhp+G9z49dXf7WvmvM3ZK3IYv t90nCD1HhwnL97UqCY/XZWKNDM5kztHpHbwz+CBWWSCBGAVRrEY/qfyxBMppwSdHcxn3 278izasRCEROflhqpXjLlEq/YFHxxIL1T11SJjQ6PLRViqv68UJ0yDG/R1scNtBzI/qN GUQkJ6NyRniSTqN/lnZ+1oy0ocY3zceXQQ8J/kRnKWYIL0h0/Ru8Uucv63GEBEuFCYZW sUWw== X-Gm-Message-State: ACgBeo3PWyKYBV2Lk2Ld/GtAj/B1DH2AVMXYI35Bz7/71fF1WChyr6RF tBnH4AfgwtetILBg69yO4GY= X-Google-Smtp-Source: AA6agR5p/8/L7QGjOX3paswtlMvKpAhdmTYJkzqy7UoM1PMVtFVUInrh/cP4uqSIy/1hUQWRetqzNA== X-Received: by 2002:a05:6a00:e1a:b0:52d:9c84:24c1 with SMTP id bq26-20020a056a000e1a00b0052d9c8424c1mr4366312pfb.13.1659391776705; Mon, 01 Aug 2022 15:09:36 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id g15-20020a1709029f8f00b001637529493esm10136969plq.66.2022.08.01.15.09.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Aug 2022 15:09:36 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH v3 2/3] Documentation: sysfs: Document Broadcom STB memc sysfs knobs Date: Mon, 1 Aug 2022 15:09:30 -0700 Message-Id: <20220801220931.181531-3-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220801220931.181531-1-f.fainelli@gmail.com> References: <20220801220931.181531-1-f.fainelli@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220801_150939_427296_9C8D6ABB X-CRM114-Status: GOOD ( 13.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Document the "srpd" and "frequency" sysfs attributes exposed by the brcmstb_memc driver. Signed-off-by: Florian Fainelli --- .../ABI/testing/sysfs-platform-brcmstb-memc | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-platform-brcmstb-memc diff --git a/Documentation/ABI/testing/sysfs-platform-brcmstb-memc b/Documentation/ABI/testing/sysfs-platform-brcmstb-memc new file mode 100644 index 000000000000..2f2b750ac2fd --- /dev/null +++ b/Documentation/ABI/testing/sysfs-platform-brcmstb-memc @@ -0,0 +1,15 @@ +What: /sys/bus/platform/devices/*/srpd +Date: July 2022 +KernelVersion: 5.21 +Contact: Florian Fainelli +Description: + Self Refresh Power Down (SRPD) inactivity timeout counted in + internal DDR controller clock cycles. Possible values range + from 0 (disable inactivity timeout) to 65535 (0xffff). + +What: /sys/bus/platform/devices/*/frequency +Date: July 2022 +KernelVersion: 5.21 +Contact: Florian Fainelli +Description: + DDR PHY frequency in Hz. From patchwork Mon Aug 1 22:09:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12934153 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4FD39C00144 for ; Mon, 1 Aug 2022 22:11:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MBkV3IDBKOGxcBd5SRAPPg+uUgtZV9v7XxREj+b6r10=; b=nUUJQs7VHT2jdx 7JemuNsmxarbjV0/zQFLHGaTT7MFevZMPuantwiiO4W+b0zuFKt1ykdbRDpRTglsFRKPpscHuzZfl 44QyGurdePz5MNPDmICSTQQPA3d37J8RcfG31eiBUUfvjKHxNnYHdsi1Zm4hj1drvh5tyuC+szyVf or9tdQHXsLaVYtMMRZvWTK2kNkLKejls6p+xboe4vD3N/Lg4nht+1mIthNpeF/ktRq7hi2867lcTC f8rnVlCgvYpH8cmZahl8oS8ZWXkAQzAtUHFwgLtG+0lJMXUXJRmexnkWhQ0R6x/BYsCZ4rA+pLd7u IG0NoTDIUXHxHzUnmTsw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oIdby-00BGGB-T0; Mon, 01 Aug 2022 22:10:07 +0000 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oIdbZ-00BFyn-1x for linux-arm-kernel@lists.infradead.org; Mon, 01 Aug 2022 22:09:43 +0000 Received: by mail-pj1-x102a.google.com with SMTP id p14-20020a17090a74ce00b001f4d04492faso7288431pjl.4 for ; Mon, 01 Aug 2022 15:09:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=RU1FbrBJr/X5C2fv3CbgZ52enehMfwrLIwTRu81oqKc=; b=Fc7B2ZUd5A9TsCrmOgh15oxPJycZWjrMCLB66jLJmfpMyUjTYJMv6NDPJrBQXwUi0v cwVAupmkKQ3of4+CBkN5ocbHbNIGpfLUH/dAcEwd667vpI78cN2bPvKxvgb9cAbnnJUv oLTSfsrI9sUeNvxvJigyalzmLGOPVXeQygA0HGtL8NkIAzLQcQI1RWo3oPtC0QGMg8Z8 /RnZEljK63wbrKo5Pv7easYRTVshnPjUT0eIv70hDOvlqGuT0/i3mdnTipec8UVxOfSt d0DSqiO12X2of455kwFEY+jc+bsin1YRSK+1PlUj1EDCEw1E8fJH7Xar6wKdLtxteQp+ nsaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=RU1FbrBJr/X5C2fv3CbgZ52enehMfwrLIwTRu81oqKc=; b=r8Tj49qfkKAxPta1Sk8PK5T6DME3WCqjiA3VFeDMxGsyXjbv6EEUhwlKh2NgXxKUp/ x42JNebB0Z8vzlxL688ZnHjRYfjV1DN4vzyV+2LzrMPpjH63pYiiP24eOZwMIpIaqs1e spzgYwiXBI7LRVOarI49Im8T8yEQD0E5zaGugLtJig86uJJwCldY7XHLH5coFcTeDjhs b+MfwOH1zeXg14snw96Mi+Qi/a8+nxePwcCIoVRseQwid4Vyb2VmBmaeR804W1QNMzdy M4LZnW6q61ASdNHAcJyljJlcqVTkAqWVh/MKQPdb6T+3gpAeMUD47NxVUe7fP0K08YII 9swA== X-Gm-Message-State: ACgBeo1ku44/JEq+CDsUa7qCGZhAKNrORh9LE5DigoRrVmFKvgxS1SJp FwB7MWpMrv3n7hKd5smoV5M= X-Google-Smtp-Source: AA6agR7fQ51Q+/e1LAipO+90SGxf2M8RCI9fN2hScWp2XrH8xA9CixtfVcY0i4Zibqp6YvfpnUTLsw== X-Received: by 2002:a17:902:8302:b0:16d:d74f:e5cc with SMTP id bd2-20020a170902830200b0016dd74fe5ccmr16012360plb.6.1659391777953; Mon, 01 Aug 2022 15:09:37 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id g15-20020a1709029f8f00b001637529493esm10136969plq.66.2022.08.01.15.09.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Aug 2022 15:09:37 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Broadcom internal kernel review list , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH v3 3/3] memory: Add Broadcom STB memory controller driver Date: Mon, 1 Aug 2022 15:09:31 -0700 Message-Id: <20220801220931.181531-4-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220801220931.181531-1-f.fainelli@gmail.com> References: <20220801220931.181531-1-f.fainelli@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220801_150941_137195_C25D4485 X-CRM114-Status: GOOD ( 29.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for configuring the Self Refresh Power Down (SRPD) inactivity timeout on Broadcom STB chips. This is used to conserve power when the DRAM activity is reduced. Signed-off-by: Florian Fainelli --- drivers/memory/Kconfig | 9 + drivers/memory/Makefile | 1 + drivers/memory/brcmstb_memc.c | 302 ++++++++++++++++++++++++++++++++++ 3 files changed, 312 insertions(+) create mode 100644 drivers/memory/brcmstb_memc.c diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index ac1a411648d8..fac290e48e0b 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -66,6 +66,15 @@ config BRCMSTB_DPFE for the DRAM's temperature. Slower refresh rate means cooler RAM, higher refresh rate means hotter RAM. +config BRCMSTB_MEMC + tristate "Broadcom STB MEMC driver" + default ARCH_BRCMSTB + depends on ARCH_BRCMSTB || COMPILE_TEST + help + This driver provides a way to configure the Broadcom STB memory + controller and specifically control the Self Refresh Power Down + (SRPD) inactivity timeout. + config BT1_L2_CTL bool "Baikal-T1 CM2 L2-RAM Cache Control Block" depends on MIPS_BAIKAL_T1 || COMPILE_TEST diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index bc7663ed1c25..e148f636c082 100644 --- a/drivers/memory/Makefile +++ b/drivers/memory/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_ARM_PL172_MPMC) += pl172.o obj-$(CONFIG_ATMEL_SDRAMC) += atmel-sdramc.o obj-$(CONFIG_ATMEL_EBI) += atmel-ebi.o obj-$(CONFIG_BRCMSTB_DPFE) += brcmstb_dpfe.o +obj-$(CONFIG_BRCMSTB_MEMC) += brcmstb_memc.o obj-$(CONFIG_BT1_L2_CTL) += bt1-l2-ctl.o obj-$(CONFIG_TI_AEMIF) += ti-aemif.o obj-$(CONFIG_TI_EMIF) += emif.o diff --git a/drivers/memory/brcmstb_memc.c b/drivers/memory/brcmstb_memc.c new file mode 100644 index 000000000000..9b993343d447 --- /dev/null +++ b/drivers/memory/brcmstb_memc.c @@ -0,0 +1,302 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * DDR Self-Refresh Power Down (SRPD) support for Broadcom STB SoCs + * + */ + +#include +#include +#include +#include +#include +#include + +#define REG_MEMC_CNTRLR_CONFIG 0x00 +#define CNTRLR_CONFIG_LPDDR4_SHIFT 5 +#define CNTRLR_CONFIG_MASK 0xf +#define REG_MEMC_SRPD_CFG_21 0x20 +#define REG_MEMC_SRPD_CFG_20 0x34 +#define REG_MEMC_SRPD_CFG_1x 0x3c +#define INACT_COUNT_SHIFT 0 +#define INACT_COUNT_MASK 0xffff +#define SRPD_EN_SHIFT 16 + +struct brcmstb_memc_data { + u32 srpd_offset; +}; + +struct brcmstb_memc { + struct device *dev; + void __iomem *ddr_ctrl; + unsigned int timeout_cycles; + u32 frequency; + u32 srpd_offset; +}; + +static int brcmstb_memc_uses_lpddr4(struct brcmstb_memc *memc) +{ + void __iomem *config = memc->ddr_ctrl + REG_MEMC_CNTRLR_CONFIG; + u32 reg; + + reg = readl_relaxed(config) & CNTRLR_CONFIG_MASK; + + return reg == CNTRLR_CONFIG_LPDDR4_SHIFT; +} + +static int brcmstb_memc_srpd_config(struct brcmstb_memc *memc, + unsigned int cycles) +{ + void __iomem *cfg = memc->ddr_ctrl + memc->srpd_offset; + u32 val; + + /* Max timeout supported in HW */ + if (cycles > INACT_COUNT_MASK) + return -EINVAL; + + memc->timeout_cycles = cycles; + + val = (cycles << INACT_COUNT_SHIFT) & INACT_COUNT_MASK; + if (cycles) + val |= BIT(SRPD_EN_SHIFT); + + writel_relaxed(val, cfg); + /* Ensure the write is committed to the controller */ + (void)readl_relaxed(cfg); + + return 0; +} + +static ssize_t frequency_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct brcmstb_memc *memc = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", memc->frequency); +} + +static ssize_t srpd_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct brcmstb_memc *memc = dev_get_drvdata(dev); + + return sprintf(buf, "%d\n", memc->timeout_cycles); +} + +static ssize_t srpd_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + struct brcmstb_memc *memc = dev_get_drvdata(dev); + unsigned int val; + int ret; + + /* + * Cannot change the inactivity timeout on LPDDR4 chips because the + * dynamic tuning process will also get affected by the inactivity + * timeout, thus making it non functional. + */ + if (brcmstb_memc_uses_lpddr4(memc)) + return -EOPNOTSUPP; + + ret = kstrtouint(buf, 10, &val); + if (ret < 0) + return ret; + + ret = brcmstb_memc_srpd_config(memc, val); + if (ret) + return ret; + + return count; +} + +static DEVICE_ATTR_RO(frequency); +static DEVICE_ATTR_RW(srpd); + +static struct attribute *dev_attrs[] = { + &dev_attr_frequency.attr, + &dev_attr_srpd.attr, + NULL, +}; + +static struct attribute_group dev_attr_group = { + .attrs = dev_attrs, +}; + +static const struct of_device_id brcmstb_memc_of_match[]; + +static int brcmstb_memc_probe(struct platform_device *pdev) +{ + const struct brcmstb_memc_data *memc_data; + const struct of_device_id *of_id; + struct device *dev = &pdev->dev; + struct brcmstb_memc *memc; + int ret; + + memc = devm_kzalloc(dev, sizeof(*memc), GFP_KERNEL); + if (!memc) + return -ENOMEM; + + dev_set_drvdata(dev, memc); + + of_id = of_match_device(brcmstb_memc_of_match, dev); + memc_data = of_id->data; + memc->srpd_offset = memc_data->srpd_offset; + + memc->ddr_ctrl = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(memc->ddr_ctrl)) + return PTR_ERR(memc->ddr_ctrl); + + of_property_read_u32(pdev->dev.of_node, "clock-frequency", + &memc->frequency); + + ret = sysfs_create_group(&dev->kobj, &dev_attr_group); + if (ret) + return ret; + + return 0; +} + +static int brcmstb_memc_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + + sysfs_remove_group(&dev->kobj, &dev_attr_group); + + return 0; +} + +enum brcmstb_memc_hwtype { + BRCMSTB_MEMC_V21, + BRCMSTB_MEMC_V20, + BRCMSTB_MEMC_V1X, +}; + +static const struct brcmstb_memc_data brcmstb_memc_versions[] = { + { .srpd_offset = REG_MEMC_SRPD_CFG_21 }, + { .srpd_offset = REG_MEMC_SRPD_CFG_20 }, + { .srpd_offset = REG_MEMC_SRPD_CFG_1x }, +}; + +static const struct of_device_id brcmstb_memc_of_match[] = { + { + .compatible = "brcm,brcmstb-memc-ddr-rev-b.1.x", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V1X] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.0", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V20] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.1", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.2", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.3", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.5", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.6", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.7", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-b.2.8", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-b.3.0", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-b.3.1", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-c.1.0", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-c.1.1", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-c.1.2", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-c.1.3", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + { + .compatible = "brcm,brcmstb-memc-ddr-rev-c.1.4", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V21] + }, + /* default to the original offset */ + { + .compatible = "brcm,brcmstb-memc-ddr", + .data = &brcmstb_memc_versions[BRCMSTB_MEMC_V1X] + }, + {} +}; + +static int __maybe_unused brcmstb_memc_suspend(struct device *dev) +{ + struct brcmstb_memc *memc = dev_get_drvdata(dev); + void __iomem *cfg = memc->ddr_ctrl + memc->srpd_offset; + u32 val; + + if (memc->timeout_cycles == 0) + return 0; + + /* + * Disable SRPD prior to suspending the system since that can + * cause issues with other memory clients managed by the ARM + * trusted firmware to access memory. + */ + val = readl_relaxed(cfg); + val &= ~BIT(SRPD_EN_SHIFT); + writel_relaxed(val, cfg); + /* Ensure the write is committed to the controller */ + (void)readl_relaxed(cfg); + + return 0; +} + +static int __maybe_unused brcmstb_memc_resume(struct device *dev) +{ + struct brcmstb_memc *memc = dev_get_drvdata(dev); + + if (memc->timeout_cycles == 0) + return 0; + + return brcmstb_memc_srpd_config(memc, memc->timeout_cycles); +} + +static SIMPLE_DEV_PM_OPS(brcmstb_memc_pm_ops, brcmstb_memc_suspend, + brcmstb_memc_resume); + +static struct platform_driver brcmstb_memc_driver = { + .probe = brcmstb_memc_probe, + .remove = brcmstb_memc_remove, + .driver = { + .name = "brcmstb_memc", + .owner = THIS_MODULE, + .of_match_table = brcmstb_memc_of_match, + .pm = &brcmstb_memc_pm_ops, + }, +}; +module_platform_driver(brcmstb_memc_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("DDR SRPD driver for Broadcom STB chips");