From patchwork Thu Aug 4 19:08:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 12936617 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F2DFC19F21 for ; Thu, 4 Aug 2022 19:09:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232130AbiHDTJA (ORCPT ); Thu, 4 Aug 2022 15:09:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231248AbiHDTJA (ORCPT ); Thu, 4 Aug 2022 15:09:00 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id AD1B86C11D; Thu, 4 Aug 2022 12:08:56 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.93,216,1654527600"; d="scan'208";a="128538023" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 05 Aug 2022 04:08:55 +0900 Received: from localhost.localdomain (unknown [10.226.92.63]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 21B9540F09CF; Fri, 5 Aug 2022 04:08:52 +0900 (JST) From: Phil Edworthy To: Geert Uytterhoeven Cc: Phil Edworthy , Rob Herring , Krzysztof Kozlowski , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Lad Prabhakar Subject: [PATCH] arm64: dts: renesas: r9a09g011: Add pinctrl node Date: Thu, 4 Aug 2022 20:08:46 +0100 Message-Id: <20220804190846.128370-1-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Signed-off-by: Phil Edworthy Reviewed-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi index d4cc5459fbb7..44e1e288343c 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi @@ -132,6 +132,56 @@ uart0: serial@a4040000 { clock-names = "sclk", "pclk"; status = "disabled"; }; + + pinctrl: pinctrl@b6250000 { + compatible = "renesas,r9a09g011-pinctrl"; + reg = <0 0xb6250000 0 0x800>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 352>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&cpg CPG_MOD R9A09G011_PFC_PCLK>; + power-domains = <&cpg>; + resets = <&cpg R9A09G011_PFC_PRESETN>; + }; }; timer {