From patchwork Tue Jan 15 08:20:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 10764085 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BF0F413B5 for ; Tue, 15 Jan 2019 08:21:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B1A9B2B50A for ; Tue, 15 Jan 2019 08:21:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A4AD02B511; Tue, 15 Jan 2019 08:21:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4755D2B508 for ; Tue, 15 Jan 2019 08:21:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728085AbfAOIVJ (ORCPT ); Tue, 15 Jan 2019 03:21:09 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:54904 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727703AbfAOIVJ (ORCPT ); Tue, 15 Jan 2019 03:21:09 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0F8L6E9041704; Tue, 15 Jan 2019 02:21:06 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547540466; bh=e9u6/oRVA5rDhpSN2+tMHtY7anlYkelNUh3A15zRnJw=; h=From:To:CC:Subject:Date; b=NDJhTD/7zZHGaM9o6mdnqpzwLN38qIlroVUfk0L2AJfKw6c8x9ESqtqY5YhC9DdoY h/59AWoX39TBRunIGcu0KR5xNkn1/taCNcfLUdAij/GynW/GY4P+RFe88bY0zilT8f RUjqAWkA75Hcnw4fL1Qkp6p8g9vXV3vkZGA/0Ufs= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0F8L6hT083208 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 15 Jan 2019 02:21:06 -0600 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Tue, 15 Jan 2019 02:21:05 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Tue, 15 Jan 2019 02:21:05 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0F8L2VR004469; Tue, 15 Jan 2019 02:21:03 -0600 From: Tero Kristo To: , CC: , , Nishanth Menon Subject: [PATCH] pinctrl: ti: iodelay: Lower the priority of prints Date: Tue, 15 Jan 2019 10:20:59 +0200 Message-ID: <1547540459-14548-1-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Nishanth Menon Dont print every single iodelay register configuration - this is just plain noise. Since this is useful debug information, just lower to debug Signed-off-by: Nishanth Menon Signed-off-by: Tero Kristo Acked-by: Tony Lindgren --- drivers/pinctrl/ti/pinctrl-ti-iodelay.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/ti/pinctrl-ti-iodelay.c b/drivers/pinctrl/ti/pinctrl-ti-iodelay.c index 92d18c6..7035ed4 100644 --- a/drivers/pinctrl/ti/pinctrl-ti-iodelay.c +++ b/drivers/pinctrl/ti/pinctrl-ti-iodelay.c @@ -263,9 +263,9 @@ static int ti_iodelay_pinconf_set(struct ti_iodelay_device *iod, reg_val |= reg->unlock_val << __ffs(reg->lock_mask); r = regmap_update_bits(iod->regmap, cfg->offset, reg_mask, reg_val); - dev_info(dev, "Set reg 0x%x Delay(a: %d g: %d), Elements(C=%d F=%d)0x%x\n", - cfg->offset, cfg->a_delay, cfg->g_delay, c_elements, - f_elements, reg_val); + dev_dbg(dev, "Set reg 0x%x Delay(a: %d g: %d), Elements(C=%d F=%d)0x%x\n", + cfg->offset, cfg->a_delay, cfg->g_delay, c_elements, + f_elements, reg_val); return r; }