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[2a01:c23:c1a2:1a00:2049:10ba:dbb:6620]) by smtp.googlemail.com with ESMTPSA id gv11-20020a170906f10b00b0072af4af2f46sm3325740ejb.74.2022.08.14.14.29.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 14 Aug 2022 14:29:39 -0700 (PDT) Message-ID: <22f1d799-a3bb-3d71-a3fd-f6128b205231@gmail.com> Date: Sun, 14 Aug 2022 23:29:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 From: Heiner Kallweit Subject: [PATCH] clk: meson: pll: adjust timeout in meson_clk_pll_wait_lock() To: Neil Armstrong , Jerome Brunet , Michael Turquette , Stephen Boyd , Kevin Hilman , Martin Blumenstingl Cc: "open list:ARM/Amlogic Meson..." , linux-clk@vger.kernel.org, "linux-arm-kernel@lists.infradead.org" Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Currently we loop over meson_parm_read() up to 24mln times. This results in a unpredictable timeout period. In my case it's over 5s on a S905X4-based system. Make the timeout period predictable and set it to 100ms. Whilst we're at it: All callers of this function return -EIO in case of failure, therefore we can return this value directly in the timeout case. Signed-off-by: Heiner Kallweit --- drivers/clk/meson/clk-pll.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c index daa025b6d..d70bee331 100644 --- a/drivers/clk/meson/clk-pll.c +++ b/drivers/clk/meson/clk-pll.c @@ -277,17 +277,17 @@ static int meson_clk_pll_wait_lock(struct clk_hw *hw) { struct clk_regmap *clk = to_clk_regmap(hw); struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); - int delay = 24000000; + int delay = 5000; do { - /* Is the clock locked now ? */ + /* Is the clock locked now ? Time out after 100ms. */ if (meson_parm_read(clk->map, &pll->l)) return 0; - delay--; - } while (delay > 0); + udelay(20); + } while (--delay); - return -ETIMEDOUT; + return -EIO; } static int meson_clk_pll_init(struct clk_hw *hw) @@ -350,10 +350,7 @@ static int meson_clk_pll_enable(struct clk_hw *hw) /* Take the pll out reset */ meson_parm_write(clk->map, &pll->rst, 0); - if (meson_clk_pll_wait_lock(hw)) - return -EIO; - - return 0; + return meson_clk_pll_wait_lock(hw); } static void meson_clk_pll_disable(struct clk_hw *hw)