From patchwork Tue Aug 16 18:25:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12945204 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CA46C2BB41 for ; Tue, 16 Aug 2022 18:26:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237100AbiHPS0J (ORCPT ); Tue, 16 Aug 2022 14:26:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237065AbiHPS0G (ORCPT ); Tue, 16 Aug 2022 14:26:06 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 16EEE86B63 for ; Tue, 16 Aug 2022 11:25:58 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id bu15so5112023wrb.7 for ; Tue, 16 Aug 2022 11:25:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=conchuod.ie; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=d9TppbXdiWPs+48x7U6F2RLRbtXIB7UvU4Wm4rVvtl0=; b=f2AlxGScpJunozXwr3OLri+tVAp8DP91ryrotY2//J2fi1OUCt1LNagskuDqphhkZT YrquLa/5e3kZ0mNDTpe8BZPCqsenNm2Iz6veDpmpJ2eS1/XvlY9RG0X5z1/PE71xJM/z T89NIgNPpq6E+d39MQKxfD7TWO20cghUHmkysLjgO3lWV5s7Rl+R6uqjodyd8Uo9Phd8 3Jpqpdld6ng03AVC6cciJzWfKieF0XVANREG8RAcZlM+uEsFPf0miZbDNl9GDQcXyNWL 1Gy9OFXRx+voQGCrcVvklEEfQh2gOjJjjJeoID3OXAAvB/6mk0/QFGfKnDLEXI1kcD03 MiRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=d9TppbXdiWPs+48x7U6F2RLRbtXIB7UvU4Wm4rVvtl0=; b=smESEcxayVeDVRmbYaaqwd56/bWSJJ+ZrtdTAb9U6S9CMgaFos/HKUzCVhh2UoNo2Q 1uUUj3Ki9DMQ4LWpMwRfm8KI8ELxO0n0/L5gdd+nc//z+RKkThY4FSLhjlxxcOBXPJh2 yR8Ea6sCMiuOb9SP9CT2IZZ2w7kQjqLXW5jllLsrmR/VucmuHJeFM7gJJBV+9SQyo9vn 39rmchNEpbBY1WBT+quhRnZ9pLuBbO9HcMvGHZcRLwZZCs+M/0A/mlzbgmqwJ59X9nVn DVC8Zn/S3IW9rsnolqsRsAmt5Gqkj27b4qcxHk2m0m5JcGFt1rX2LnXHExtHUF0P2BHL EDiA== X-Gm-Message-State: ACgBeo08zsR5rxx3PKeXPo1CE/kF8Vhvgdj/0VwCuv84sEyV22cZnBtJ w98JsIyXZOeuNmx2GnO//1yPEQ== X-Google-Smtp-Source: AA6agR5I+KbBV3e/0Gh9/t5/+sRspQ2mbNFQlQO0aX1NckIqMfw5q/VrA8Cv5/N3BXLfG6j4FPECGg== X-Received: by 2002:a05:6000:1152:b0:220:6421:ccdc with SMTP id d18-20020a056000115200b002206421ccdcmr12322712wrx.61.1660674356514; Tue, 16 Aug 2022 11:25:56 -0700 (PDT) Received: from henark71.. ([109.76.58.63]) by smtp.gmail.com with ESMTPSA id s17-20020a1cf211000000b003a603fbad5bsm4015482wmc.45.2022.08.16.11.25.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 11:25:55 -0700 (PDT) From: Conor Dooley To: Daire McNamara , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Greentime Hu , Palmer Dabbelt , Albert Ou , Lorenzo Pieralisi , Conor Dooley Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 1/6] dt-bindings: PCI: fu740-pci: fix missing clock-names Date: Tue, 16 Aug 2022 19:25:43 +0100 Message-Id: <20220816182547.3454843-2-mail@conchuod.ie> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220816182547.3454843-1-mail@conchuod.ie> References: <20220816182547.3454843-1-mail@conchuod.ie> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Conor Dooley The commit b92225b034c0 ("dt-bindings: PCI: designware: Fix 'unevaluatedProperties' warnings") removed the clock-names property as a requirement and from the example as it triggered unevaluatedProperty warnings. dtbs_check was not able to pick up on this at the time, but now can: arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb: pcie@e00000000: Unevaluated properties are not allowed ('clock-names' was unexpected) From schema: linux/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml The property was already in use by the FU740 DTS and the clock must be enabled. The Linux driver does not use this property, but outside of the kernel this property may have users. Re-add the property and its "clocks" dependency. Fixes: b92225b034c0 ("dt-bindings: PCI: designware: Fix 'unevaluatedProperties' warnings") Fixes: 43cea116be0b ("dt-bindings: PCI: Add SiFive FU740 PCIe host controller") Signed-off-by: Conor Dooley --- v2022.08 of dt-schema is required. --- .../devicetree/bindings/pci/sifive,fu740-pcie.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml b/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml index 195e6afeb169..c7a9a2dc0fa6 100644 --- a/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml @@ -51,6 +51,12 @@ properties: description: A phandle to the PCIe power up reset line. maxItems: 1 + clocks: + maxItems: 1 + + clock-names: + const: pcie_aux + pwren-gpios: description: Should specify the GPIO for controlling the PCI bus device power on. maxItems: 1 From patchwork Tue Aug 16 18:25:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12945203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62499C32773 for ; Tue, 16 Aug 2022 18:26:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236600AbiHPS0J (ORCPT ); Tue, 16 Aug 2022 14:26:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237068AbiHPS0G (ORCPT ); Tue, 16 Aug 2022 14:26:06 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 381EF86B7B for ; Tue, 16 Aug 2022 11:25:59 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id h1so5619285wmd.3 for ; Tue, 16 Aug 2022 11:25:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=conchuod.ie; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=FMkAjTRxFynoKfy/JBCi5zISG1GRJIQTYNHeDvaDnhc=; b=edWE/8Om/5nhi4bDasv/LIbOVfF6WqJ+jyLjdV2U57/KWwkiAZLjuSgliTEtKV3eDm 2Ib2XEp6RLOwpim0ssuftuMa6c6upQpytEDq0mFmszL6W3YVjVEPD1R/hNMvKUef16id hxV655Qk8bLCNbcVyuJIgjbIMupSeJe8pcOU3EM8Ia1PoJd31xFM8MY+1qviVmLIk0hJ ub5tfTuqSHLH2meS7KyNVIA0QPr6gv9/xIVaRZj2P4CiDOnfovYMg8VUp6PtTF9sYRbA AEqW8lHeTMVn4k0kEyt7trr4QxLSHIS6ShpD3Nu/yRwub/Ip6BbP6ZmISwP/IYQJnODt JmrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=FMkAjTRxFynoKfy/JBCi5zISG1GRJIQTYNHeDvaDnhc=; b=mMUX2f98oCM/jWTW4CsUhqt0iK/whhxz2lCLWfCd8tn5+L3KUHJf022sIP5aKNJ4E1 UpLnxw2yxRp4t0Wgw8VBuRP/XzVvbXajbzPuZL+MuwIx2t7QrsHAgSPC1pVIf5fo/g7H HRpsBxP3y6MfxMaY6CVYOja6mAsxHjpd3mE64aOc8rJlN2Q2r2LMTT5FmPRoGQObz6Qv iJtYXRL8vF3ZXZTeiekNy/QVessgZCFy0BoFOgQc0Ir7oy6WS9spQPnYJBZABw68JVTO qzCL4tYTfzZbNAnS0AN3dFNMdE8ppVYEFLGdOrOIz7xEDvSvHrttAznERZVUEYDeWaF8 y05w== X-Gm-Message-State: ACgBeo2iLKg93E2sLgghhSgEjh2BoLAMG+nG3sDW52tyENEVBIBwQZKH O1rKmSMI9Xy5Yb7S6OzCi3Ffkw== X-Google-Smtp-Source: AA6agR5KC3j+XouQHP1FxiS6VJD6PbM4GQLhS+ON8+YKaVfbQ51bYX6+5FkVajNHT2pNc6KNfsSAjw== X-Received: by 2002:a05:600c:1898:b0:3a5:b467:c3ef with SMTP id x24-20020a05600c189800b003a5b467c3efmr19356925wmp.178.1660674357641; Tue, 16 Aug 2022 11:25:57 -0700 (PDT) Received: from henark71.. ([109.76.58.63]) by smtp.gmail.com with ESMTPSA id s17-20020a1cf211000000b003a603fbad5bsm4015482wmc.45.2022.08.16.11.25.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 11:25:57 -0700 (PDT) From: Conor Dooley To: Daire McNamara , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Greentime Hu , Palmer Dabbelt , Albert Ou , Lorenzo Pieralisi , Conor Dooley Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 2/6] dt-bindings: PCI: microchip,pcie-host: fix missing clocks properties Date: Tue, 16 Aug 2022 19:25:44 +0100 Message-Id: <20220816182547.3454843-3-mail@conchuod.ie> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220816182547.3454843-1-mail@conchuod.ie> References: <20220816182547.3454843-1-mail@conchuod.ie> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Conor Dooley Recent versions of dt-schema warn about unevaluatedProperties: arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: pcie@2000000000: Unevaluated properties are not allowed ('clock-names', 'clocks', 'legacy-interrupt-controller', 'microchip,axi-m-atr0' were unexpected) From schema: Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml The clocks are required to enable interfaces between the FPGA fabric and the core complex, so add them to the binding. Fixes: 6ee6c89aac35 ("dt-bindings: PCI: microchip: Add Microchip PolarFire host binding") Signed-off-by: Conor Dooley --- dt-schema v2022.08 is required to replicate --- .../bindings/pci/microchip,pcie-host.yaml | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml index edb4f81253c8..6bbde8693ef8 100644 --- a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml +++ b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml @@ -25,6 +25,31 @@ properties: - const: cfg - const: apb + clocks: + description: + Fabric Interface Controllers, FICs, are the interface between the FPGA + fabric and the core complex on PolarFire SoC. The FICs require two clocks, + one from each side of the interface. The "FIC clocks" described by this + property are on the core complex side & communication through a FIC is not + possible unless it's corresponding clock is enabled. A clock must be + enabled for each of the interfaces the root port is connected through. + This could in theory be all 4 interfaces, one interface or any combination + in between. + minItems: 1 + items: + - description: FIC0's clock + - description: FIC1's clock + - description: FIC2's clock + - description: FIC3's clock + + clock-names: + description: + As any FIC connection combination is possible, the names should match the + order in the clocks property and take the form "ficN" where N is a number + 0-3 + minItems: 1 + maxItems: 4 + interrupts: minItems: 1 items: From patchwork Tue Aug 16 18:25:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12945205 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1FAF4C32772 for ; Tue, 16 Aug 2022 18:26:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235754AbiHPS0K (ORCPT ); Tue, 16 Aug 2022 14:26:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45622 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237074AbiHPS0G (ORCPT ); Tue, 16 Aug 2022 14:26:06 -0400 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B873868BC for ; Tue, 16 Aug 2022 11:26:00 -0700 (PDT) Received: by mail-wr1-x434.google.com with SMTP id ba1so3039458wrb.5 for ; Tue, 16 Aug 2022 11:26:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=conchuod.ie; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=vN0DGeJfb4elpBHq3mALobUym6adR42yLX1wd+NKgEE=; b=PEQa+TuOt73fuVOb7T3+1Hy22N+kDixRACSlic+zJdWgAlesuDfvE1jahD01g/8cdj JtjLszP3D/e60G+3P/Rt5/iBz9VWfQF602riMmjeed8yuXTxodssttItwsAyz0GrBQZo 6LmHwXV6CqeUfz64pE5IPXKtJ1n9S1FreF+47P+iL8HB8IR1vVJdH5psvqQJAAo3dCRq DL/y+a0eof3Bq6c8BzMHERC/3fGHJeLd1TPzHyp3//AleEyFOUblv3dKavXn72ZfaRSc 07f2TgjpW+yB32DviJVBg2Kdf2NeR/iovjRACiByAy90F94WBIc+It5pE/ThbMRTHttV 4HTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=vN0DGeJfb4elpBHq3mALobUym6adR42yLX1wd+NKgEE=; b=btZhC62nO/IcHj8b7bZVwF8362UHdGhPNgcLRJhaW8Su4GU8kcCvqPxo4MGYBqqU6I DlrOMDrnhsVzHsFKGAz2hQa4z6n7QXpdGrmTbsTJSqgtxBJiEXmBGSevL6JOcCQUv0sF BVW4DYfCOrif/RXzygiCtDwY9a2Sjxo4F3nw8ptTlv5rJb6hnFfgZ6iEFu5oCvG1HOzz gbXmTScuP0+x354bVo8QH47vvolz6ueBalytOJZe+mPsfv4/mnwVTR1yYNxuO+92o2hx 8Lc3MJZC4okdvE35SabKnTCkJoUmWEGXeHF7UtqxplXQf/F/KVXl0mvQvU8Otq5V+XzA 4ztA== X-Gm-Message-State: ACgBeo1I84Binbwh4KLb4wnDBx7Dx5xVxdJYiBOobfx0wwwwtOnhE6R+ ZPNiFU/YV4Y+Rw9ndlbace8hAw== X-Google-Smtp-Source: AA6agR7sTCd254G+0o5Cw9GOa0R6pQiko3YyBwBowV/CViwJLAAOXwkNioukcNooVtKoYy4ChxnydA== X-Received: by 2002:a5d:5081:0:b0:220:6262:be0b with SMTP id a1-20020a5d5081000000b002206262be0bmr11725612wrt.228.1660674358778; Tue, 16 Aug 2022 11:25:58 -0700 (PDT) Received: from henark71.. ([109.76.58.63]) by smtp.gmail.com with ESMTPSA id s17-20020a1cf211000000b003a603fbad5bsm4015482wmc.45.2022.08.16.11.25.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 11:25:58 -0700 (PDT) From: Conor Dooley To: Daire McNamara , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Greentime Hu , Palmer Dabbelt , Albert Ou , Lorenzo Pieralisi , Conor Dooley Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 3/6] riscv: dts: microchip: mpfs: fix incorrect pcie child node name Date: Tue, 16 Aug 2022 19:25:45 +0100 Message-Id: <20220816182547.3454843-4-mail@conchuod.ie> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220816182547.3454843-1-mail@conchuod.ie> References: <20220816182547.3454843-1-mail@conchuod.ie> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Conor Dooley Recent versions of dt-schema complain about the PCIe controller's child node name: arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: pcie@2000000000: Unevaluated properties are not allowed ('clock-names', 'clocks', 'legacy-interrupt-controller', 'microchip,axi-m-atr0' were unexpected) From schema: Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml Make the dts match the correct property name in the dts. Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree") Signed-off-by: Conor Dooley --- v2022.08 of dt-schema is required to replicate. --- arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index 499c2e63ad35..e69322f56516 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -487,7 +487,7 @@ pcie: pcie@2000000000 { msi-controller; microchip,axi-m-atr0 = <0x10 0x0>; status = "disabled"; - pcie_intc: legacy-interrupt-controller { + pcie_intc: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; From patchwork Tue Aug 16 18:25:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12945206 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65318C32793 for ; Tue, 16 Aug 2022 18:26:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236078AbiHPS0M (ORCPT ); Tue, 16 Aug 2022 14:26:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237077AbiHPS0H (ORCPT ); Tue, 16 Aug 2022 14:26:07 -0400 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9515E86C18 for ; Tue, 16 Aug 2022 11:26:01 -0700 (PDT) Received: by mail-wr1-x42f.google.com with SMTP id n7so2404606wrv.4 for ; Tue, 16 Aug 2022 11:26:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=conchuod.ie; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=1LGGHQ6p+mDphp3bmxn1t5fZUfaS0Whf3Mk8geT3R/0=; b=TiOXfR9UekVJZRu7evd3xJo1JSSbcUbx/ZgBAE+jckIRBaEzCO5PwmG3rqD5z5zN53 0AUtBwvF39Nfxva12oH0R9WNAVRfcWT1zluLWip42kfP2Hl7UgGxAJ6crW2lEvSFh5BH nkX9NvPQ9x7JlYkKi6K9YqcEPT+ZrEhwFYF3Sh+XQk/v4JsMDMpF1KlZJMBZzl2JqKqY ScVfYOAfRcm+1+wC0uA049NWyCbH8DO4s6/azpjdBZmnMp7G1Er0FoZk4zWi70CfKRvD mCACPBrFGx1PgSbm7sBofXPHA98a4rFi0Ogtd/hFKf1Qc3YKLpdXqsljBHFCzwBR1hWI 3shg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=1LGGHQ6p+mDphp3bmxn1t5fZUfaS0Whf3Mk8geT3R/0=; b=Oi63yZ1T82juOPi2Z422RKtlGnTlsEvjUrlDW3DU2svhtq3uJA1Hy7QaArmNq5zNtK rvWil9JoEJBm3pEahYTMFmAroidG2urSvfWByHQJdLDj697QVOPF3x0rgRa/AKblhh3C iEzh8SU6O2ef/NxA5YCZu74gD8j2SzMCjLAzJ0Ig+NF6sqS9g9P0/Y1cbgSd/tJJEDT4 IeEjYud0xED031obzWDHiqALZg53YSv/JdIzLscQgagf0Mc8vp5mjDpi1jxbxjfZe/Cv IqeuOfgJ/RBCw5oM71geZcMC4Zt5RB+/tnxUjl5QL2pOgtPli5xJKF/KRImCOyWMQCb1 ZcJw== X-Gm-Message-State: ACgBeo1W+g+DbHXliAEW/mKhh/7hg6hREPjW7+XWzoNoGEkKHKCMhGb8 LYrsHShhvHb618YmFq/k/9HV0g== X-Google-Smtp-Source: AA6agR40opo+7mClW53ltFMT6yiRmc3Yot2+VJrAVQqciuJ53cfMm+Ju4S49z0oFptPwsbaT26fANQ== X-Received: by 2002:a5d:588d:0:b0:220:73d3:997e with SMTP id n13-20020a5d588d000000b0022073d3997emr11899733wrf.546.1660674360051; Tue, 16 Aug 2022 11:26:00 -0700 (PDT) Received: from henark71.. ([109.76.58.63]) by smtp.gmail.com with ESMTPSA id s17-20020a1cf211000000b003a603fbad5bsm4015482wmc.45.2022.08.16.11.25.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 11:25:59 -0700 (PDT) From: Conor Dooley To: Daire McNamara , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Greentime Hu , Palmer Dabbelt , Albert Ou , Lorenzo Pieralisi , Conor Dooley Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 4/6] riscv: dts: microchip: mpfs: remove ti,fifo-depth property Date: Tue, 16 Aug 2022 19:25:46 +0100 Message-Id: <20220816182547.3454843-5-mail@conchuod.ie> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220816182547.3454843-1-mail@conchuod.ie> References: <20220816182547.3454843-1-mail@conchuod.ie> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Conor Dooley Recent versions of dt-schema warn about a previously undetected undocument property on the icicle & polarberry devicetrees: arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: ethernet@20112000: ethernet-phy@8: Unevaluated properties are not allowed ('ti,fifo-depth' was unexpected) From schema: Documentation/devicetree/bindings/net/cdns,macb.yaml I know what you're thinking, the binding doesn't look to be the problem and I agree. I am not sure why a TI vendor property was ever actually added since it has no meaning... just get rid of it. Fixes: bc47b2217f24 ("riscv: dts: microchip: add the sundance polarberry") Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board") Signed-off-by: Conor Dooley --- v2022.08 or later of dt-schema is required. --- arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts | 2 -- arch/riscv/boot/dts/microchip/mpfs-polarberry.dts | 2 -- 2 files changed, 4 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts index 044982a11df5..ee548ab61a2a 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts @@ -84,12 +84,10 @@ &mac1 { phy1: ethernet-phy@9 { reg = <9>; - ti,fifo-depth = <0x1>; }; phy0: ethernet-phy@8 { reg = <8>; - ti,fifo-depth = <0x1>; }; }; diff --git a/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts b/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts index 82c93c8f5c17..dc11bb8fc833 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts +++ b/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts @@ -54,12 +54,10 @@ &mac1 { phy1: ethernet-phy@5 { reg = <5>; - ti,fifo-depth = <0x01>; }; phy0: ethernet-phy@4 { reg = <4>; - ti,fifo-depth = <0x01>; }; }; From patchwork Tue Aug 16 18:25:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12945207 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2570BC32773 for ; Tue, 16 Aug 2022 18:26:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231820AbiHPS0N (ORCPT ); Tue, 16 Aug 2022 14:26:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237083AbiHPS0H (ORCPT ); Tue, 16 Aug 2022 14:26:07 -0400 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54D7986C39 for ; Tue, 16 Aug 2022 11:26:03 -0700 (PDT) Received: by mail-wr1-x434.google.com with SMTP id n4so13575203wrp.10 for ; Tue, 16 Aug 2022 11:26:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=conchuod.ie; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=qOyz6Sg85RbWT2/Ms96NRUeJwTK6SHK6KdVqomRoy/M=; b=KrY4rxTH3L2TNT0Tj7Ea3n6H60cPP7wN7CFj0YwfZL3/tcHo7JcjAQR1cc9nCseY1Q CvSDX4Df1TuJvhRh0FUuNmuoYgfcd89WAuYpiQrxgJ36llVyw9SsimpFpQWVu02nWXcT GP9mZWjTux2x2gc3JPak5n3rBobhufro0EeesPdqdBTidWMJ+++fPtnXFwpd1jRaQ5uC AdM9UySn5X8nhrYKXkCGiq3sgYwQu5bBzjyBUZLqbo0GGVQfxEfmjHcQYruR4qw0hSOm qQQhOVUcytvQsE2/9LnFust0O3PVqEWZT76F7BbyLUy+nlQFXQ/WJkUS2M6MKFTbAD49 f7XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=qOyz6Sg85RbWT2/Ms96NRUeJwTK6SHK6KdVqomRoy/M=; b=Rl83/t2+1RuNDk631kgjrS4ZrTPVsBffYTRkSIW3fjjky4VLblvkNJ9z2qHOQkkJ6B HKtSiYIPx/7nKoeOj2QFr4NlA3a6y/LPWyyfw4ffouTjWbJ9T1XiNlTLo/1XcsYgnZ0O jEQOQFmtq8S1t/plAcKvHhgOciQP0Dx9ete16Po/VT6nPmofGDad7UZ/kTYkRaAM3wxc a8c/4A+ec7MODTvJELokU4AIO4tQqyBpTH0V7HDcg11IGTQT4fICvvLa2GDqglleGWUN dE3li+6cFxiwrRPVQNWsSftWjy/nBbLeggDfu41L1Zr9IY1FGpb+n5t3rl+6p1l6KdoD yAfA== X-Gm-Message-State: ACgBeo3Kef6/WC+JNmn83lLR/HDVG9Agsv6eDgHxbfviO8XD3CbrnfSI O7tQxqJpykmfiTXVZkDsX4CSLA== X-Google-Smtp-Source: AA6agR5Eq/Dh2TGsSUxt13F3p2fStw1nzu0BqbZ6aF8bKxqUzWnpGd8AlGfuE2KkOMjcylA72rOhbQ== X-Received: by 2002:a5d:4a84:0:b0:225:20e3:3ba6 with SMTP id o4-20020a5d4a84000000b0022520e33ba6mr881999wrq.306.1660674361600; Tue, 16 Aug 2022 11:26:01 -0700 (PDT) Received: from henark71.. ([109.76.58.63]) by smtp.gmail.com with ESMTPSA id s17-20020a1cf211000000b003a603fbad5bsm4015482wmc.45.2022.08.16.11.26.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 11:26:00 -0700 (PDT) From: Conor Dooley To: Daire McNamara , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Greentime Hu , Palmer Dabbelt , Albert Ou , Lorenzo Pieralisi , Conor Dooley Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 5/6] riscv: dts: microchip: mpfs: remove bogus card-detect-delay Date: Tue, 16 Aug 2022 19:25:47 +0100 Message-Id: <20220816182547.3454843-6-mail@conchuod.ie> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220816182547.3454843-1-mail@conchuod.ie> References: <20220816182547.3454843-1-mail@conchuod.ie> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Conor Dooley Recent versions of dt-schema warn about a previously undetected undocumented property: arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: mmc@20008000: Unevaluated properties are not allowed ('card-detect-delay' was unexpected) From schema: Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml There are no GPIOs connected to MSSIO6B4 pin K3 so adding the common cd-debounce-delay-ms property makes no sense. The Cadence IP has a register that sets the card detect delay as "DP * tclk". On MPFS, this clock frequency is not configurable (it must be 200 MHz) & the FPGA comes out of reset with this register already set. Fixes: bc47b2217f24 ("riscv: dts: microchip: add the sundance polarberry") Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board") Signed-off-by: Conor Dooley --- v2022.08 or later of dt-schema is required. --- arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts | 1 - arch/riscv/boot/dts/microchip/mpfs-polarberry.dts | 1 - 2 files changed, 2 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts index ee548ab61a2a..f3f87ed2007f 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts @@ -100,7 +100,6 @@ &mmc { disable-wp; cap-sd-highspeed; cap-mmc-highspeed; - card-detect-delay = <200>; mmc-ddr-1_8v; mmc-hs200-1_8v; sd-uhs-sdr12; diff --git a/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts b/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts index dc11bb8fc833..c87cc2d8fe29 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts +++ b/arch/riscv/boot/dts/microchip/mpfs-polarberry.dts @@ -70,7 +70,6 @@ &mmc { disable-wp; cap-sd-highspeed; cap-mmc-highspeed; - card-detect-delay = <200>; mmc-ddr-1_8v; mmc-hs200-1_8v; sd-uhs-sdr12; From patchwork Tue Aug 16 18:25:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12945208 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1DB4C3F6B0 for ; Tue, 16 Aug 2022 18:26:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236559AbiHPS0R (ORCPT ); Tue, 16 Aug 2022 14:26:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237090AbiHPS0I (ORCPT ); Tue, 16 Aug 2022 14:26:08 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7CA6F86C3F for ; Tue, 16 Aug 2022 11:26:03 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id v3so13646899wrp.0 for ; Tue, 16 Aug 2022 11:26:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=conchuod.ie; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=0menBycPydf3OF4brxfxIM8hwmBUp4QdVL5XPrXyre0=; b=cq/wfBYlh9TNFle3AyyvA6aRqw5tapsXhJ5VOkQTJzEV+SvWLBxc0M7sv8kJVNFdJ5 5JncrYyhkUkDXQWKF8FAx4sOG+2Ex6/MC0HoGJhU8vOvxPOwd8YhEMi9IQCLhhDbmhUD 5joEaePchEDaqh7S5PvvzvcmKFLRa3Wqpo562J+IcuT6DJ4Rc6YKoH3AOuH7ki/Avy3R hLP2aCDDBDn0P/4xlwEI29MsDEgyaxsNArRWr+Y9os15aApcQqcS3ANBUaBPIP9sDbWh yow8teObOTaeHu0HIjh+iczV/cqIcV45gESM0bCY/PkvniEAUabK6pe1YdzVVW39fcvQ JHBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=0menBycPydf3OF4brxfxIM8hwmBUp4QdVL5XPrXyre0=; b=oFY+pzHsNYwC+5LpH7iOZhRovIgmtGou47N9VDR0PB8oOtp1TQz416tHvM62lNsg5T RJrMm+2vup4uRoXLrYw69mStzIb8WAARHdyIcQjmMP9FJaQpjRY0Ur8bAO+XM3BPM+NL JjItaQ/v/sNUQbsqtJZTllZgFR/nQQFPc4NQPrTObvm4RX+ei3sYOQVYKFV6E60y19Af DFli6H1E4JjlB2dpA14GN1OUqxKNN6xlJxRULfoAKgfPhWa566+WM9Sll5JivsiEpA/p ru7/6l8Gf1eY4ClQTUt6ndYs/DS0hykPzTGBIjPCX1FoMMg5XKQqFAF1Cuc4P26WpmnQ fGCw== X-Gm-Message-State: ACgBeo29r4/HcRLCs8KExTcbG1Dz7gCEq6z4xKOMPkQbECLFsrqLkDTn LDe/JGg3d7sxMJJfBF1LtAgIDxEmjMjkkx79 X-Google-Smtp-Source: AA6agR6kxEpAlsWHGGaIsHWoq0lgu/Z8DXmzz/tOaQf+JXZgc8EJhMGnIovPSVPfRDBgUP5kkbMmOQ== X-Received: by 2002:a5d:4d4d:0:b0:225:fbf:fbac with SMTP id a13-20020a5d4d4d000000b002250fbffbacmr4093198wru.623.1660674362913; Tue, 16 Aug 2022 11:26:02 -0700 (PDT) Received: from henark71.. ([109.76.58.63]) by smtp.gmail.com with ESMTPSA id s17-20020a1cf211000000b003a603fbad5bsm4015482wmc.45.2022.08.16.11.26.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 11:26:02 -0700 (PDT) From: Conor Dooley To: Daire McNamara , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Greentime Hu , Palmer Dabbelt , Albert Ou , Lorenzo Pieralisi , Conor Dooley Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 6/6] riscv: dts: microchip: mpfs: remove pci axi address translation property Date: Tue, 16 Aug 2022 19:25:48 +0100 Message-Id: <20220816182547.3454843-7-mail@conchuod.ie> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220816182547.3454843-1-mail@conchuod.ie> References: <20220816182547.3454843-1-mail@conchuod.ie> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Conor Dooley An AXI master address translation table property was inadvertently added to the device tree & this was not caught by dtbs_check at the time. Remove the property - it should not be in mpfs.dtsi anyway as it would be more suitable in -fabric.dtsi nor does it actually apply to the version of the reference design we are using for upstream. Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree") Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/microchip/mpfs.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index e69322f56516..a1176260086a 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -485,7 +485,6 @@ pcie: pcie@2000000000 { ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>; msi-parent = <&pcie>; msi-controller; - microchip,axi-m-atr0 = <0x10 0x0>; status = "disabled"; pcie_intc: interrupt-controller { #address-cells = <0>;