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Wed, 17 Aug 2022 10:05:59 -0500 Received: from xhdipdslab49.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.28 via Frontend Transport; Wed, 17 Aug 2022 10:05:51 -0500 From: Nipun Gupta To: , , , , , , , , , , , , , , , , , , , , CC: , , , , , Nipun Gupta Subject: [RFC PATCH v2 1/6] Documentation: DT: Add entry for CDX controller Date: Wed, 17 Aug 2022 20:35:37 +0530 Message-ID: <20220817150542.483291-2-nipun.gupta@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220817150542.483291-1-nipun.gupta@amd.com> References: <20220803122655.100254-1-nipun.gupta@amd.com> <20220817150542.483291-1-nipun.gupta@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 89a9516e-c658-4727-1804-08da8062002a X-MS-TrafficTypeDiagnostic: DM4PR12MB5069:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: hAhCkTuD+aIThYlYC4WKeMdKxD5eH0rBlo4EaDRh4bFaiwgjXEtsI6xqzBA8KcyoaZeD+UuSoMY/vLu622gFAImbAB8jaUvF4w0Ivqw4JMzy3/bKswYfJbyv7cHdHujaxVlnHbesr18PVTRlVcrqEBKjeQ6Zt/owybNPXQc/oB/96ErH+m4MkTpi621CDmRGVdoGZQCQLkQ5452PtOLth759n5l12c7qcV9RW+Wm+kMusZmp7KMEEgE5eHiisRPEyOWpxFWd6f2+g0g6H5OTk1EcEQzcNpn/vRJgMNmMSKzRPcF/4Iat4Ca9FNbOReZvTqMuzEePd3UFQUtc79+GpoovIjNpOtnREvlTq3IfPUoRJJMNC8zBZK9Jfj3UJK64+mL2sry5uFqTci8K9AB4vnKkYnf3Spe+0sARnK2VqIJL4QreNpGjDLzFxGkVyv6677lxW8GpHm/ZrqCXv4TBLu5CEt1J8ZBwc59vHd3Dhi1lrMNgEz4URYrQgl8SVw+qrCaXHd131+dZMGvsVTEF1xlwzTCKEzpyNnVT2ssYOetGj62SEsSbgjfknEVdU3MFAHvxNDQBEHCfeqNFrGZE2eLEIezzeFzZ2wnLmtPIv+zde/pX9QfklbpYFQLKy3g4jEUPnfajksCIjqG+Mm1pZPbENffGj/r4V+67XFdXiBHKpWtj6QV7WL0vlS6lCcBu2k6FJm8+kxsQjNnrTDNnyiJKrvrVNZ9PHPJYxvXGGC0RizLz3ailk8/rhqes8dxzQ3VMwAJNwKs/LgSV3W84cWK4dxyfnqxQMsMRysv37ZQA52PejTJf1jMgPKnZJLvN0gEbRzZxyMAcDXbRsFlovAVHVd8tDcXNm2Mf7jJPVqjgcerrBGjqXGnXVqKlkEs++km7vGF/NjRALIa2V5GIV0GiAteMgbk2vFXV56Vy20j1KeOGJSJCLN2h2/jBOLNkVwAgx46+yrNHOuRCUMF9Z8ExRElmnCB0chzMI5i68Pg= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(376002)(396003)(136003)(346002)(39860400002)(36840700001)(40470700004)(46966006)(26005)(41300700001)(478600001)(2616005)(1076003)(186003)(336012)(426003)(47076005)(2906002)(6666004)(82310400005)(966005)(5660300002)(8936002)(7416002)(356005)(83380400001)(86362001)(54906003)(316002)(81166007)(921005)(40460700003)(40480700001)(70586007)(70206006)(110136005)(4326008)(36756003)(8676002)(44832011)(82740400003)(36860700001)(36900700001)(2101003)(83996005);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Aug 2022 15:06:02.1755 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 89a9516e-c658-4727-1804-08da8062002a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT073.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5069 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org This patch adds a devicetree binding documentation for CDX controller. CDX bus controller dynamically detects CDX bus and the devices on these bus using CDX firmware. Signed-off-by: Nipun Gupta --- .../devicetree/bindings/bus/xlnx,cdx.yaml | 108 ++++++++++++++++++ MAINTAINERS | 6 + 2 files changed, 114 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/xlnx,cdx.yaml diff --git a/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml b/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml new file mode 100644 index 000000000000..4247a1cff3c1 --- /dev/null +++ b/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml @@ -0,0 +1,108 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/xlnx,cdx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx CDX bus controller + +description: | + CDX bus controller for Xilinx devices is implemented to + dynamically detect CDX bus and devices on these bus using the + firmware. The CDX bus manages multiple FPGA based hardware + devices, which can support network, crypto or any other specialized + type of device. These FPGA based devices can be added/modified + dynamically on run-time. + + All devices on the CDX bus will have a unique streamid (for IOMMU) + and a unique device ID (for MSI) corresponding to a requestor ID + (one to one associated with the device). The streamid and deviceid + are used to configure SMMU and GIC-ITS respectively. + + iommu-map property is used to define the set of stream ids + corresponding to each device and the associated IOMMU. + + For generic IOMMU bindings, see: + Documentation/devicetree/bindings/iommu/iommu.txt. + + For arm-smmu binding, see: + Documentation/devicetree/bindings/iommu/arm,smmu.yaml. + + The MSI writes are accompanied by sideband data (Device ID). + The msi-map property is used to associate the devices with the + device ID as well as the associated ITS controller. + + For generic MSI bindings, see: + Documentation/devicetree/bindings/interrupt-controller/msi.txt. + + For GICv3 and GIC ITS bindings, see: + Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml. + +maintainers: + - Nipun Gupta + - Nikhil Agarwal + +properties: + compatible: + const: "xlnx,cdxbus-controller-1.0" + + reg: + description: | + specifies the CDX firmware region shared memory accessible by the + ARM cores. + + iommu-map: + description: | + Maps device Requestor ID to a stream ID and associated IOMMU. The + property is an arbitrary number of tuples of + (rid-base,iommu,streamid-base,length). + + Any Requestor ID i in the interval [rid-base, rid-base + length) is + associated with the listed IOMMU, with the iommu-specifier + (i - streamid-base + streamid-base). + + msi-map: + description: + Maps an Requestor ID to a GIC ITS and associated msi-specifier + data (device ID). The property is an arbitrary number of tuples of + (rid-base,gic-its,deviceid-base,length). + + Any Requestor ID in the interval [rid-base, rid-base + length) is + associated with the listed GIC ITS, with the msi-specifier + (i - rid-base + deviceid-base). + +required: + - compatible + - reg + - iommu-map + - msi-map + +additionalProperties: false + +examples: + - | + smmu@ec000000 { + compatible = "arm,smmu-v3"; + #iommu-cells = <1>; + ... + }; + + gic@e2000000 { + compatible = "arm,gic-v3"; + interrupt-controller; + ... + its: gic-its@e2040000 { + compatible = "arm,gic-v3-its"; + msi-controller; + ... + } + }; + + cdxbus: cdxbus@@4000000 { + compatible = "xlnx,cdxbus-controller-1.0"; + reg = <0x00000000 0x04000000 0 0x1000>; + /* define map for RIDs 250-259 */ + iommu-map = <250 &smmu 250 10>; + /* define msi map for RIDs 250-259 */ + msi-map = <250 &its 250 10>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 8a5012ba6ff9..32c5be3d6a53 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22296,6 +22296,12 @@ S: Maintained F: Documentation/devicetree/bindings/net/can/xilinx,can.yaml F: drivers/net/can/xilinx_can.c +XILINX CDX BUS DRIVER +M: Nipun Gupta +M: Nikhil Agarwal +S: Maintained +F: Documentation/devicetree/bindings/bus/xlnx,cdx.yaml + XILINX GPIO DRIVER M: Shubhrajyoti Datta R: Srinivas Neeli From patchwork Wed Aug 17 15:05:38 2022 Content-Type: text/plain; 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Wed, 17 Aug 2022 10:06:00 -0500 From: Nipun Gupta To: , , , , , , , , , , , , , , , , , , , , CC: , , , , , Nipun Gupta Subject: [RFC PATCH v2 2/6] bus/cdx: add the cdx bus driver Date: Wed, 17 Aug 2022 20:35:38 +0530 Message-ID: <20220817150542.483291-3-nipun.gupta@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220817150542.483291-1-nipun.gupta@amd.com> References: <20220803122655.100254-1-nipun.gupta@amd.com> <20220817150542.483291-1-nipun.gupta@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 74002ad6-3c20-49dc-a8e3-08da8062043f X-MS-TrafficTypeDiagnostic: PH7PR12MB6859:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 20qPYbDfgdCpIo3sg0XSp7rN0BXA9TpGUmliRgP/S2nWMNhVCDKuThMApOnefvMKlZ5RPHIpULuBt3mh9hQczbQ342nvPD3Bv+rGI4vPhlM2oBcgRtkjL1MQ2hgtLScp3b6ZlXN+t05Xb4pjGXXUCYzwzdgiByV3rjnLd49t4W/KCuUIyXxn08jBlkpYuuPFCVwvmTX+B7yuMDOjMQc+38n01I+zE/v3/UNu2yImC0LEdnV4iuE3oIEEi9BWdyrikyy+LSh9u4UPLqAqHwARTpwVW5qPpQcaPOMFSpaECvs/8kVRC58iH8qEyfWcvW6pfwmDy3t54InRX11ft4sEWgLIq7n0V52R5h20bQ5zY0yoCvtutcpdWkkFXJsaIazxqPcahSHoTmrj+OQw62byYuSAJ34dn795AneXbnkLQDTtOhI1yZnHK0SDYXaRFDtvuuWSVpBMy8WoaGHqAThxYp88BvN73fb1Hin0NZPKgeuRDvkHdZxXUXRAUQzQtUv3zrd8Vd9PgMUzWZwu2shW9lN2CNdm9Rw6zuL7VN76CZvJOUyJJlAW5WZTuzitkFBViAzFJjJTLGS39gf88yeyggpZWVuROP6R9LFTM4rDCT7lajlxv285ya5iSkOSNAKixxQJkz+6JwxQLqt3yhchU2ibdlP4y6vnZX6PrbvXhjf+hmyQqRxssixYksFnV+FYrHCDvzf22Dwj1sfUmDmBVFm9Q5mUZZxms7rr/s8GR/XqCHhGusqGrlAvOufUnDn1mn/gdh4QtLJau9O5Xnjr3DkMRFOtDuAjCyb5IbhTavIfleFU8jNeNdGVHKNYQYQaKDslTAxu37PaO7WyA9/wM6uECa0lsJtasLLHAHU8peyQs1GdoW1YbJHHG7vXVMbN7Ag2RGZPwWn8/QPYr8y37A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(39860400002)(376002)(346002)(136003)(396003)(46966006)(40470700004)(36840700001)(30864003)(47076005)(83380400001)(336012)(1076003)(426003)(921005)(81166007)(82740400003)(356005)(70586007)(70206006)(316002)(5660300002)(186003)(8676002)(44832011)(82310400005)(2616005)(6666004)(2906002)(4326008)(26005)(54906003)(110136005)(478600001)(36756003)(36860700001)(7416002)(41300700001)(40480700001)(86362001)(8936002)(40460700003)(36900700001)(2101003)(83996005);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Aug 2022 15:06:09.0902 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 74002ad6-3c20-49dc-a8e3-08da8062043f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT083.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6859 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org CDX bus driver manages the scanning and populating FPGA based devices present on the CDX bus. The bus driver sets up the basic infrastructure and fetches the device related information from the firmware. These devices are registered as platform devices. CDX bus is capable of scanning devices dynamically, supporting rescanning of dynamically added, removed or updated devices. Signed-off-by: Nipun Gupta --- Please NOTE: This is a RFC change which does not yet support the CDX bus firmware interface as it is under development, and this series aims to get an early feedback from the community. There are TODO items mentioned in this patch which needs to be updated once firmware support is complete. MAINTAINERS | 1 + drivers/bus/Kconfig | 1 + drivers/bus/Makefile | 3 + drivers/bus/cdx/Kconfig | 7 ++ drivers/bus/cdx/Makefile | 3 + drivers/bus/cdx/cdx.c | 241 ++++++++++++++++++++++++++++++++++++ drivers/bus/cdx/cdx.h | 35 ++++++ include/linux/cdx/cdx_bus.h | 26 ++++ 8 files changed, 317 insertions(+) create mode 100644 drivers/bus/cdx/Kconfig create mode 100644 drivers/bus/cdx/Makefile create mode 100644 drivers/bus/cdx/cdx.c create mode 100644 drivers/bus/cdx/cdx.h create mode 100644 include/linux/cdx/cdx_bus.h diff --git a/MAINTAINERS b/MAINTAINERS index 32c5be3d6a53..b0eea32dbb39 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22301,6 +22301,7 @@ M: Nipun Gupta M: Nikhil Agarwal S: Maintained F: Documentation/devicetree/bindings/bus/xlnx,cdx.yaml +F: drivers/bus/cdx/* XILINX GPIO DRIVER M: Shubhrajyoti Datta diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig index 7bfe998f3514..b0324efb9a6a 100644 --- a/drivers/bus/Kconfig +++ b/drivers/bus/Kconfig @@ -251,5 +251,6 @@ config DA8XX_MSTPRI source "drivers/bus/fsl-mc/Kconfig" source "drivers/bus/mhi/Kconfig" +source "drivers/bus/cdx/Kconfig" endmenu diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile index d90eed189a65..88649111c395 100644 --- a/drivers/bus/Makefile +++ b/drivers/bus/Makefile @@ -20,6 +20,9 @@ obj-$(CONFIG_INTEL_IXP4XX_EB) += intel-ixp4xx-eb.o obj-$(CONFIG_MIPS_CDMM) += mips_cdmm.o obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o +#CDX bus +obj-$(CONFIG_CDX_BUS) += cdx/ + # Interconnect bus driver for OMAP SoCs. obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o diff --git a/drivers/bus/cdx/Kconfig b/drivers/bus/cdx/Kconfig new file mode 100644 index 000000000000..ae3f2ee5a768 --- /dev/null +++ b/drivers/bus/cdx/Kconfig @@ -0,0 +1,7 @@ +config CDX_BUS + bool "CDX Bus platform driver" + help + Driver to enable CDX Bus infrastructure. CDX bus is + capable of scanning devices dynamically, supporting + rescanning of dynamically added, removed or updated + devices. diff --git a/drivers/bus/cdx/Makefile b/drivers/bus/cdx/Makefile new file mode 100644 index 000000000000..c9cee5b6fa8a --- /dev/null +++ b/drivers/bus/cdx/Makefile @@ -0,0 +1,3 @@ +obj-$(CONFIG_CDX_BUS) += cdx-bus-device-driver.o + +cdx-bus-device-driver-objs := cdx.o diff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c new file mode 100644 index 000000000000..f28329770af8 --- /dev/null +++ b/drivers/bus/cdx/cdx.c @@ -0,0 +1,241 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Platform driver for CDX bus. + * + * Copyright(C) 2022 Xilinx Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cdx.h" + +static struct cdx_device_types_t dev_types[MAX_CDX_DEVICE_TYPES] = { + {"cdx-cdma-1.0", "xlnx,cdx-cdma-1.0"} +}; + +static int cdx_populate_one(struct platform_device *pdev_parent, + struct cdx_dev_params_t *dev_params) +{ + struct platform_device *new_pdev; + struct fwnode_handle *swnode; + struct platform_device_info pdevinfo; + struct cdx_device_data dev_data; + int ret = 0; + struct property_entry port_props[] = { + PROPERTY_ENTRY_STRING("compatible", + dev_types[dev_params->dev_type_idx].compat), + { } + }; + + swnode = fwnode_create_software_node(port_props, NULL); + if (IS_ERR(swnode)) { + ret = PTR_ERR(swnode); + dev_err(&pdev_parent->dev, + "fwnode_create_software_node() failed: %d\n", ret); + goto out; + } + + dev_data.bus_id = dev_params->bus_id; + dev_data.func_id = dev_params->func_id; + + memset(&pdevinfo, 0, sizeof(pdevinfo)); + pdevinfo.fwnode = swnode; + pdevinfo.parent = &pdev_parent->dev; + pdevinfo.name = dev_params->name; + pdevinfo.id = (dev_params->bus_id << 16) | (dev_params->func_id); + pdevinfo.res = dev_params->res; + pdevinfo.num_res = dev_params->res_cnt; + pdevinfo.data = &dev_data; + pdevinfo.size_data = sizeof(struct cdx_device_data); + pdevinfo.dma_mask = DMA_BIT_MASK(64); + new_pdev = platform_device_register_full(&pdevinfo); + if (IS_ERR(new_pdev)) { + ret = PTR_ERR(new_pdev); + dev_err(&pdev_parent->dev, + "platform_device_register_full() failed: %d\n", ret); + goto out; + } + + /* Configure the IOMMU */ + ret = of_dma_configure_id(&new_pdev->dev, pdev_parent->dev.of_node, + 1, &dev_params->stream_id); + if (ret) { + if (ret != -EPROBE_DEFER) + dev_err(&pdev_parent->dev, + "of_dma_configure_id() failed: %d\n", ret); + goto out; + } + + return 0; + +out: + if (new_pdev != NULL && !IS_ERR(new_pdev)) + platform_device_unregister(new_pdev); + + if (swnode != NULL && IS_ERR(swnode)) + fwnode_remove_software_node(swnode); + + return ret; +} + +static int cdx_unregister_device(struct device *dev, + void * __always_unused data) +{ + struct platform_device *pdev = to_platform_device(dev); + + platform_device_unregister(pdev); + fwnode_remove_software_node(pdev->dev.fwnode); + + return 0; +} + +void cdx_unregister_devices(struct device *parent_dev) +{ + device_for_each_child(parent_dev, NULL, cdx_unregister_device); +} + +static int cdx_bus_device_discovery(struct platform_device *pdev) +{ + int num_cdx_bus = 0, num_cdx_func = 0; + int bus_id = 0, func_id = 0; + struct device_node *np = pdev->dev.of_node; + int ret; + + /* TODO: Get number of busses from firmware */ + num_cdx_bus = 1; + + for (bus_id = 0; bus_id < num_cdx_bus; bus_id++) { + /* TODO: Get number of functions/devices on the bus + * from firmware + */ + num_cdx_func = 1; + + for (func_id = 0; func_id < num_cdx_func; func_id++) { + struct cdx_dev_params_t dev_params; + u64 mmio_size; /* MMIO size */ + u64 mmio_addr; /* MMIO address */ + u32 req_id; /* requester ID */ + + /* TODO: Read device configuration from the firmware + * and remove the hardcoded configuration parameters. + */ + mmio_addr = 0xe4020000; + mmio_size = 0x1000; + req_id = 0x250; + + memset(&dev_params, 0, sizeof(dev_params)); + + /* Populate device parameters */ + ret = of_map_id(np, req_id, "iommu-map", "iommu-map-mask", + NULL, &dev_params.stream_id); + if (ret != 0) { + dev_err(&pdev->dev, + "of_map_id failed for IOMMU: %d\n", + ret); + goto fail; + } + + dev_params.dev_type_idx = 0; + dev_params.res_cnt = 1; + + /* Populate dev_type_idx */ + dev_params.dev_type_idx = 0; + + /* Populate resource */ + dev_params.res->start = (u64)mmio_addr; + dev_params.res->end = (u64)(mmio_addr + mmio_size - 1); + dev_params.res->flags = IORESOURCE_MEM; + + dev_params.bus_id = bus_id; + dev_params.func_id = func_id; + + strncpy(dev_params.name, dev_types[dev_params.dev_type_idx].name, + sizeof(dev_params.name)); + + ret = cdx_populate_one(pdev, &dev_params); + if (ret == -EPROBE_DEFER) { + goto fail; + } else if (ret) { + dev_err(&pdev->dev, + "registering cdx dev: %d failed: %d\n", + func_id, ret); + goto fail; + } else { + dev_info(&pdev->dev, + "CDX dev: %d on cdx bus: %d created\n", + func_id, bus_id); + } + } + } + + return 0; +fail: + cdx_unregister_devices(&pdev->dev); + return ret; +} + +static int cdx_probe(struct platform_device *pdev) +{ + int ret; + + /* TODO: Firmware path initialization */ + + ret = cdx_bus_device_discovery(pdev); + if (ret) + return ret; + + return 0; +} + +static void cdx_shutdown(struct platform_device *pdev) +{ + /* TODO: add shutdown for CDX bus*/ +} + +static int cdx_remove(struct platform_device *pdev) +{ + /* TODO: add remove of CDX bus */ + return 0; +} + +static const struct of_device_id cdx_match_table[] = { + {.compatible = "xlnx,cdxbus-controller-1.0",}, + { }, +}; + +MODULE_DEVICE_TABLE(of, cdx_match_table); + +static struct platform_driver cdx_driver = { + .driver = { + .name = "cdx-bus", + .pm = NULL, + .of_match_table = cdx_match_table, + }, + .probe = cdx_probe, + .remove = cdx_remove, + .shutdown = cdx_shutdown, +}; + +static int __init cdx_driver_init(void) +{ + int error; + + error = platform_driver_register(&cdx_driver); + if (error < 0) { + pr_err("platform_driver_register() failed: %d\n", error); + return error; + } + + return 0; +} +postcore_initcall(cdx_driver_init); diff --git a/drivers/bus/cdx/cdx.h b/drivers/bus/cdx/cdx.h new file mode 100644 index 000000000000..7db8b06de9cd --- /dev/null +++ b/drivers/bus/cdx/cdx.h @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Header file for the CDX Bus + * + * Copyright(c) 2022 Xilinx Inc. + */ + +#ifndef _CDX_H_ +#define _CDX_H_ + +#define CDX_DEV_NUM_RESOURCES 4 +#define CDX_NAME_LEN 64 + +struct cdx_dev_params_t { + char name[CDX_NAME_LEN]; + u32 bus_id; + u32 func_id; + u32 dev_type_idx; + struct resource res[CDX_DEV_NUM_RESOURCES]; + int res_cnt; + u32 stream_id; +}; + +/** + * struct cdx_device_data_t - private data associated with the + * CDX device. + * @bus_id: Bus ID for reset + * @func_id: Function ID for reset + */ +struct cdx_device_data { + u32 bus_id; + u32 func_id; +}; + +#endif /* _CDX_H_ */ diff --git a/include/linux/cdx/cdx_bus.h b/include/linux/cdx/cdx_bus.h new file mode 100644 index 000000000000..7c6ad7dfe97a --- /dev/null +++ b/include/linux/cdx/cdx_bus.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * CDX bus public interface + * + * Copyright(C) 2022 Xilinx Inc. + * + */ +#ifndef _CDX_BUS_H_ +#define _CDX_BUS_H_ + +#define MAX_CDX_DEVICE_TYPES 16 +#define MAX_CDX_COMPAT_LEN 64 +#define MAX_CDX_NAME_LEN 64 + +/** + * struct cdx_device_type_t - info on CDX devices type. + * @compatible: Describes the specific binding, to which + * the devices of a particular type complies. It is used + * for driver binding. + */ +struct cdx_device_types_t { + char name[MAX_CDX_NAME_LEN]; + char compat[MAX_CDX_COMPAT_LEN]; +}; + +#endif /* _CDX_H_ */ From patchwork Wed Aug 17 15:05:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nipun Gupta X-Patchwork-Id: 12946115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65BC4C32772 for ; Wed, 17 Aug 2022 15:06:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237086AbiHQPGd (ORCPT ); Wed, 17 Aug 2022 11:06:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59996 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240791AbiHQPGa (ORCPT ); Wed, 17 Aug 2022 11:06:30 -0400 Received: from NAM02-DM3-obe.outbound.protection.outlook.com (mail-dm3nam02on2062.outbound.protection.outlook.com [40.107.95.62]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 25FD0642F6; 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Wed, 17 Aug 2022 10:06:08 -0500 From: Nipun Gupta To: , , , , , , , , , , , , , , , , , , , , CC: , , , , , Nipun Gupta Subject: [RFC PATCH v2 3/6] bus/cdx: add cdx-MSI domain with gic-its domain as parent Date: Wed, 17 Aug 2022 20:35:39 +0530 Message-ID: <20220817150542.483291-4-nipun.gupta@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220817150542.483291-1-nipun.gupta@amd.com> References: <20220803122655.100254-1-nipun.gupta@amd.com> <20220817150542.483291-1-nipun.gupta@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: bbf0ef30-0df3-4fc2-7a1d-08da80620b9c X-MS-TrafficTypeDiagnostic: BL0PR12MB4945:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 6NdsGKParlVDpOmqiByxatPl7zQ+brCrtk2u2wFLQNHlak0xeurR1aquznEdOqwe+f6QDvo3beD5801jIUunzGZZDFqm0x3LatW4ldxo/OdTvoy4GR+AUTWvy4GwZbu0rh6+/MFRdj/G97iM3/Sw1I3RYilRJwwOQ69kk16L9P1Ruv8kLyR0nOS9eybxX7WFCfWpq0dKv/3JKYQt70k6i7HDRRtvNsuCvdc284BiXmX62sUlCi47gUVkOPD340YjR3j5ho0jXneMmaFkSO0h8tyZl+uFRP+Hb4MlWlQ8ViyISjrHXi8BZo11xJHl4qM1JbVE3ozkk0AbxLh6e8GNboNlHh9A5sMZzBkPXZZC2RFhdROxcyau/BmZyadtPDHIF9VaCPXRxOWlv2zMpiATfigEcKrbcKQ3DNBTu2OY56jY/MMdoRKzpWjYiqKOHAf9sCRXAVflPEEGyO+oeodp15t3144MpueRJfmwIdZZ4uxL1yMdY6qqSUHiRPf4SVKLs4N5xn81O1A5Rm1eAMD89EqEr3BkwC5WekYRWJEQaUEHZpdY/1v+2HiDAjR1r6m4E3cFVQDdUR+Ah7qSI1F4fguaXQkq1C6K9d1kN2jbcbFnMk2BZaQBVkIk3uxL+BrcrbPAnQrFATlrCgGBbbjQsz5Bv9ktGu0cBNR+p9SF6Z1jDhcjj6/qSvT2xLPBTxHpyl6FeJNY+M3n3dSZ8JIq6OV9ac4ziNzv378bYyXW7jLldOy6B6K+OfgyHqLy9Zoc4mIuwNxB85n15HDqF4B/Mwg5PAbwxoH7ukmQchmrSm1eSEmrt6mNMaLY80P6MCTHc3Tp3vKhTd80s93KIhR29d/Ben3O0ts/CjMR3RcCl3cQvLrgxFMRyf4ngxd7PQEqlNFZLg9VUtZb23E66NrihA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(346002)(39860400002)(376002)(396003)(136003)(46966006)(40470700004)(36840700001)(8676002)(316002)(4326008)(36860700001)(54906003)(70206006)(40480700001)(70586007)(40460700003)(2906002)(82740400003)(44832011)(8936002)(82310400005)(7416002)(81166007)(921005)(5660300002)(356005)(36756003)(86362001)(186003)(41300700001)(47076005)(336012)(426003)(6666004)(26005)(1076003)(83380400001)(478600001)(110136005)(2616005)(83996005)(2101003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Aug 2022 15:06:21.4426 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bbf0ef30-0df3-4fc2-7a1d-08da80620b9c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT091.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB4945 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Devices on cdx bus are dynamically detected and registered using platform_device_register API. As these devices are not linked to of node they need a separate MSI domain for handling device ID to be provided to the GIC ITS domain. Signed-off-by: Nipun Gupta Signed-off-by: Nikhil Agarwal --- drivers/bus/cdx/Makefile | 2 +- drivers/bus/cdx/cdx.c | 31 +++++++++++ drivers/bus/cdx/cdx.h | 16 ++++++ drivers/bus/cdx/cdx_msi_domain.c | 90 ++++++++++++++++++++++++++++++++ 4 files changed, 138 insertions(+), 1 deletion(-) create mode 100644 drivers/bus/cdx/cdx_msi_domain.c diff --git a/drivers/bus/cdx/Makefile b/drivers/bus/cdx/Makefile index c9cee5b6fa8a..5dc7874530f5 100644 --- a/drivers/bus/cdx/Makefile +++ b/drivers/bus/cdx/Makefile @@ -1,3 +1,3 @@ obj-$(CONFIG_CDX_BUS) += cdx-bus-device-driver.o -cdx-bus-device-driver-objs := cdx.o +cdx-bus-device-driver-objs := cdx.o cdx_msi_domain.o diff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c index f28329770af8..cd916ef5f2bc 100644 --- a/drivers/bus/cdx/cdx.c +++ b/drivers/bus/cdx/cdx.c @@ -15,7 +15,9 @@ #include #include #include +#include #include +#include "cdx.h" #include "cdx.h" @@ -47,6 +49,8 @@ static int cdx_populate_one(struct platform_device *pdev_parent, dev_data.bus_id = dev_params->bus_id; dev_data.func_id = dev_params->func_id; + dev_data.dev_id = dev_params->msi_device_id; + dev_data.num_msi = dev_params->num_msi; memset(&pdevinfo, 0, sizeof(pdevinfo)); pdevinfo.fwnode = swnode; @@ -76,6 +80,10 @@ static int cdx_populate_one(struct platform_device *pdev_parent, goto out; } + /* Set the MSI domain */ + dev_set_msi_domain(&new_pdev->dev, + irq_find_host(pdev_parent->dev.of_node)); + return 0; out: @@ -109,8 +117,22 @@ static int cdx_bus_device_discovery(struct platform_device *pdev) int num_cdx_bus = 0, num_cdx_func = 0; int bus_id = 0, func_id = 0; struct device_node *np = pdev->dev.of_node; + struct irq_domain *cdx_msi_domain; int ret; + /* If CDX MSI domain is not created, create one. */ + cdx_msi_domain = irq_find_host(pdev->dev.of_node); + if (!cdx_msi_domain) { + np = pdev->dev.of_node; + + ret = cdx_msi_domain_init(&pdev->dev, np->full_name); + if (ret != 0) { + dev_err(&pdev->dev, + "cdx_msi_domain_init() failed: %d", ret); + return ret; + } + } + /* TODO: Get number of busses from firmware */ num_cdx_bus = 1; @@ -144,7 +166,16 @@ static int cdx_bus_device_discovery(struct platform_device *pdev) ret); goto fail; } + ret = of_map_id(np, req_id, "msi-map", "msi-map-mask", + NULL, &dev_params.msi_device_id); + if (ret != 0) { + dev_err(&pdev->dev, + "of_map_id failed for MSI: %d\n", + ret); + goto fail; + } + dev_params.num_msi = 2; dev_params.dev_type_idx = 0; dev_params.res_cnt = 1; diff --git a/drivers/bus/cdx/cdx.h b/drivers/bus/cdx/cdx.h index 7db8b06de9cd..da2c282d4d93 100644 --- a/drivers/bus/cdx/cdx.h +++ b/drivers/bus/cdx/cdx.h @@ -19,6 +19,8 @@ struct cdx_dev_params_t { struct resource res[CDX_DEV_NUM_RESOURCES]; int res_cnt; u32 stream_id; + u32 msi_device_id; + u32 num_msi; }; /** @@ -26,10 +28,24 @@ struct cdx_dev_params_t { * CDX device. * @bus_id: Bus ID for reset * @func_id: Function ID for reset + * @dev_id: Device ID for MSI. + * @num_msi: Number of MSI supported by the device */ struct cdx_device_data { u32 bus_id; u32 func_id; + u32 dev_id; + u32 num_msi; }; +/** + * cdx_msi_domain_init - Init the CDX bus MSI domain. + * @cbus_dev: Device of the CDX bus + * @name: Name to be assigned to the newly created domain + * + * Return 0 on success, <0 on failure + */ +int cdx_msi_domain_init(struct device *cdev_bus, + const char *name); + #endif /* _CDX_H_ */ diff --git a/drivers/bus/cdx/cdx_msi_domain.c b/drivers/bus/cdx/cdx_msi_domain.c new file mode 100644 index 000000000000..44472ae02d1c --- /dev/null +++ b/drivers/bus/cdx/cdx_msi_domain.c @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * CDX bus driver MSI support + * + * Copyright(c) 2022 Xilinx. + * + */ + +#include +#include +#include +#include +#include +#include + +#include "cdx.h" + +static struct irq_chip cdx_msi_irq_chip = { + .name = "CDX-MSI", + .irq_mask = irq_chip_mask_parent, + .irq_unmask = irq_chip_unmask_parent, + .irq_eoi = irq_chip_eoi_parent, + .irq_set_affinity = msi_domain_set_affinity +}; + +static int cdx_msi_prepare(struct irq_domain *msi_domain, + struct device *dev, + int nvec, msi_alloc_info_t *info) +{ + struct msi_domain_info *msi_info; + struct cdx_device_data *dev_data; + u32 dev_id; + + /* Retrieve device ID from platform data */ + dev_data = dev->platform_data; + dev_id = dev_data->dev_id; + + /* Set the device Id to be passed to the GIC-ITS */ + info->scratchpad[0].ul = dev_id; + + msi_info = msi_get_domain_info(msi_domain->parent); + + /* Allocate at least 32 MSIs, and always as a power of 2 */ + nvec = max_t(int, 32, roundup_pow_of_two(nvec)); + return msi_info->ops->msi_prepare(msi_domain->parent, dev, nvec, info); +} + +static struct msi_domain_ops cdx_msi_ops __ro_after_init = { + .msi_prepare = cdx_msi_prepare, +}; + +static struct msi_domain_info cdx_msi_domain_info = { + .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS), + .ops = &cdx_msi_ops, + .chip = &cdx_msi_irq_chip, +}; + +int cdx_msi_domain_init(struct device *cbus_dev, + const char *name) +{ + struct irq_domain *parent; + struct irq_domain *cdx_msi_domain; + struct fwnode_handle *fwnode_handle; + struct device_node *parent_node; + struct device_node *np; + + np = cbus_dev->of_node; + parent_node = of_parse_phandle(np, "msi-map", 1); + + parent = irq_find_matching_fwnode(of_node_to_fwnode(parent_node), + DOMAIN_BUS_NEXUS); + if (!parent || !msi_get_domain_info(parent)) { + dev_err(cbus_dev, "%s: unable to locate ITS domain\n", name); + return -ENODEV; + } + + fwnode_handle = of_node_to_fwnode(np); + cdx_msi_domain = platform_msi_create_irq_domain(fwnode_handle, + &cdx_msi_domain_info, + parent); + if (!cdx_msi_domain) { + dev_err(cbus_dev, "%s: unable to create cdx bus domain\n", + name); + return -1; + } + + dev_info(cbus_dev, "cdx bus MSI: %s domain created\n", name); + + return 0; +} From patchwork Wed Aug 17 15:05:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nipun Gupta X-Patchwork-Id: 12946124 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDFE0C3F6B0 for ; Wed, 17 Aug 2022 15:07:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240661AbiHQPHD (ORCPT ); Wed, 17 Aug 2022 11:07:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240817AbiHQPGs (ORCPT ); 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Wed, 17 Aug 2022 10:06:23 -0500 Received: from xhdipdslab49.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.28 via Frontend Transport; Wed, 17 Aug 2022 10:06:16 -0500 From: Nipun Gupta To: , , , , , , , , , , , , , , , , , , , , CC: , , , , , Nipun Gupta Subject: [RFC PATCH v2 4/6] bus/cdx: add rescan and reset support Date: Wed, 17 Aug 2022 20:35:40 +0530 Message-ID: <20220817150542.483291-5-nipun.gupta@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220817150542.483291-1-nipun.gupta@amd.com> References: <20220803122655.100254-1-nipun.gupta@amd.com> <20220817150542.483291-1-nipun.gupta@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0173809e-8eb4-4a24-dce3-08da806214cf X-MS-TrafficTypeDiagnostic: BN6PR12MB1203:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bd67jDz+h8gzPhdQK2T4bUwiGUO50Qs0pnZfq2lj0LG31LqLlIaXMzWHIQQAu2M/ARCTxNK26G+YycBA8hm409PE4K7R+gket6/UEs55vwbxbcgdOgKQSnolAfK/ghkFnXReLeBtF/Sp+Wxi/ZECtYsE5XRdRm0tBl7dgBWd0ejwzPhaSzSoyyqS3uYI7dkDvKqryXMXzlQ95d3OLTS9Zo1b4LuYkPoam3l9OHu75ZCJmttrE9nesZ2xO20jovhxCnd/2GdfHHoa3zwWU+7+3PRAH8PDIm8ito9hs+fWwHoLP9oiYxhGis9BSpVV2lQUVZ0mnliPg1S5FXWompnzB/72hjnaSVAlv16KCWBJQvaIGQOwgWwT1py4J7MSMmRFLIkX8vpn9KofcVV1oOJzc7ob210bNZpkCs3FhjJBaWBZMksRrMdLkLNKYU+rP6gDjMjzrqox+ysi79VJoCMfqhUlp1yxpwRJ4g6y03f1hDQkc7BMTBSL33LrRmpQTyL9tad3QJzPM5BsEeWfqIYhpC9Nc5NFBoU79U5s2QOUCWwClHY4++K3fYD2kFElAaVDeRwy3H4OnODCHFE/PNIara+emEr4M80reiG3/HvQkrRZ0dPWILaCpjJqofnszfmzffGw+Lt9+3uIoCBlP0qvr3vUeUEBGA+q7fsOtzrhRaRhdd+xXQec7JbCQihyDEpyfPwktZHVfTr4dancLo9UiLLa0FaOltKXaR0DmR8ZATzjkLtExvjX97GIjRUTpfAVdg3ciU3vFbt2SnWVS/5pvnmOROcgMXowseNUr0sNWYbpuEUu4u8TBEjJB4qNxJmAGzzkxuVPpfgMqp3w2umfQNKkYxm19srDmx+SX9eFA1lT0UfmJ86Ztcn9SUj5ajP+Gco98zYSjzzzpA433+z/+A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(396003)(136003)(376002)(346002)(39860400002)(36840700001)(46966006)(40470700004)(54906003)(478600001)(6666004)(26005)(36756003)(110136005)(41300700001)(8936002)(2906002)(86362001)(40480700001)(82310400005)(40460700003)(7416002)(70586007)(8676002)(70206006)(4326008)(44832011)(316002)(36860700001)(5660300002)(186003)(83380400001)(356005)(82740400003)(81166007)(1076003)(2616005)(336012)(921005)(426003)(47076005)(83996005)(2101003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Aug 2022 15:06:36.8788 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0173809e-8eb4-4a24-dce3-08da806214cf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT091.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1203 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org This change adds te support for rescanning and reset of the CDX buses, as well as option to optionally reset any devices on the bus. Sysfs entries are provided in CDX controller: - rescan of the CDX controller. - reset all the devices present on CDX buses. Sysfs entry is provided in each of the platform device detected by the CDX controller - reset of the device. Signed-off-by: Puneet Gupta Signed-off-by: Nipun Gupta --- Documentation/ABI/testing/sysfs-bus-cdx | 34 +++++++++++ drivers/bus/cdx/cdx.c | 81 ++++++++++++++++++++++++- 2 files changed, 113 insertions(+), 2 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-cdx diff --git a/Documentation/ABI/testing/sysfs-bus-cdx b/Documentation/ABI/testing/sysfs-bus-cdx new file mode 100644 index 000000000000..8a20b50a449f --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-cdx @@ -0,0 +1,34 @@ +What: /sys/devices/platform/cdxbus/rescan +Date: August 2022 +Contact: puneet.gupta@amd.com +Description: + Writing 1 to this would cause rescan of the bus + and devices on the CDX bus. Any new devices would + be scanned and added to the list of linux devices + and any devices removed are also deleted from linux. + + For example:: + + # echo 1 > /sys/devices/platform/cdxbus/rescan + +What: /sys/devices/platform/cdxbus/reset_all +Date: August 2022 +Contact: puneet.gupta@amd.com +Description: + Writing 1 to this would reset all the devices present + on the CDX bus + + For example:: + + # echo 1 > /sys/devices/platform/cdxbus/reset_all + +What: /sys/devices/platform/cdxbus//reset +Date: August 2022 +Contact: puneet.gupta@amd.com +Description: + Writing 1 to this would reset the specific device + for which the reset is set. + + For example:: + + # echo 1 > /sys/devices/platform/cdxbus/.../reset diff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c index cd916ef5f2bc..5fb9a99b3c97 100644 --- a/drivers/bus/cdx/cdx.c +++ b/drivers/bus/cdx/cdx.c @@ -25,10 +25,57 @@ static struct cdx_device_types_t dev_types[MAX_CDX_DEVICE_TYPES] = { {"cdx-cdma-1.0", "xlnx,cdx-cdma-1.0"} }; +static int reset_cdx_device(struct device *dev, void * __always_unused data) +{ + struct platform_device *cdx_bus_pdev = to_platform_device(dev->parent); + struct cdx_device_data *dev_data = dev->platform_data; + + /* TODO: Call reset from firmware using dev_data->bus_id and + * dev_data->dev_id. + */ + return 0; +} + +static ssize_t reset_all_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret = 0; + bool reset = count > 0 && *buf != '0'; + + if (!reset) + return count; + + /* Reset all the devices attached to cdx bus */ + ret = device_for_each_child(dev, NULL, reset_cdx_device); + if (ret) + return ret; + + return count; +} +static DEVICE_ATTR_WO(reset_all); + +static ssize_t reset_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret = 0; + bool reset = count > 0 && *buf != '0'; + + if (!reset) + return count; + + ret = reset_cdx_device(dev, NULL); + if (ret) + return ret; + + return count; +} +static DEVICE_ATTR_WO(reset); + static int cdx_populate_one(struct platform_device *pdev_parent, - struct cdx_dev_params_t *dev_params) + struct cdx_dev_params_t *dev_params) { - struct platform_device *new_pdev; + struct platform_device *new_pdev = NULL; struct fwnode_handle *swnode; struct platform_device_info pdevinfo; struct cdx_device_data dev_data; @@ -84,6 +131,9 @@ static int cdx_populate_one(struct platform_device *pdev_parent, dev_set_msi_domain(&new_pdev->dev, irq_find_host(pdev_parent->dev.of_node)); + /* Creating reset entry */ + device_create_file(&new_pdev->dev, &dev_attr_reset); + return 0; out: @@ -101,6 +151,7 @@ static int cdx_unregister_device(struct device *dev, { struct platform_device *pdev = to_platform_device(dev); + device_remove_file(dev, &dev_attr_reset); platform_device_unregister(pdev); fwnode_remove_software_node(pdev->dev.fwnode); @@ -215,6 +266,28 @@ static int cdx_bus_device_discovery(struct platform_device *pdev) return ret; } +static ssize_t rescan_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret = 0; + struct platform_device *pdev = to_platform_device(dev); + bool rescan = count > 0 && *buf != '0'; + + if (!rescan) + return count; + + /* Unregister all the devices */ + cdx_unregister_devices(dev); + + /* do the device discovery again */ + ret = cdx_bus_device_discovery(pdev); + if (ret) + return ret; + + return count; +} +static DEVICE_ATTR_WO(rescan); + static int cdx_probe(struct platform_device *pdev) { int ret; @@ -225,6 +298,10 @@ static int cdx_probe(struct platform_device *pdev) if (ret) return ret; + /* Creating reset_all entry */ + device_create_file(&pdev->dev, &dev_attr_reset_all); + device_create_file(&pdev->dev, &dev_attr_rescan); + return 0; } From patchwork Wed Aug 17 15:05:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nipun Gupta X-Patchwork-Id: 12946116 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C3FEC3F6B0 for ; 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Wed, 17 Aug 2022 10:06:24 -0500 From: Nipun Gupta To: , , , , , , , , , , , , , , , , , , , , CC: , , , , , Nipun Gupta Subject: [RFC PATCH v2 5/6] vfio: platform: reset: add reset for cdx devices Date: Wed, 17 Aug 2022 20:35:41 +0530 Message-ID: <20220817150542.483291-6-nipun.gupta@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220817150542.483291-1-nipun.gupta@amd.com> References: <20220803122655.100254-1-nipun.gupta@amd.com> <20220817150542.483291-1-nipun.gupta@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7b8a3961-c4f5-4fd7-928b-08da80621348 X-MS-TrafficTypeDiagnostic: DM6PR12MB4960:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 9SRtwl9Jlfh73ikpRk+hC4ovAeHcKOpNDh9WkQpspkwqNUBYoe3krXCTJloGgpuiBeaVwvEOLJw5R7L258AjsyqVFzqYrMWwqey3r/GGmBvZfndbmRw7WpeY8qQWrfki0mdkQk8O3d2eQZeQhVdHLcPR0/2c60O42LaW6KhHgZE++gocZlX/fsU1vpAbbbWiKuopnf3W5VZfxEhyU3axVTni5ocEeaMF0XEWwmUCCPCrtCCrM8KGlhtEJ7DgFwrOMDdlsRlwvgBvEwmKs7hoA4hywKHuDym4VEfbdWnquMkByBQSxH9f/GMW2y7iEbZKw/wYzpWuQgPJfnmYAEB7w1XyOrMhawqOC/S2gslUSpZmJsr2ZkyTuEvXqg8Q7o/YVBBruxU2nIu0Ys54I1Q2SFAZSo6vZGy+PhrsI7Tngc1/5c2svVbQNEYb65I3sObwkn/kV4U+WzIf8FXhHPAQuAFXSEFMgvh3YEh/3XnnTqWls9EmsRrVq57gL0Nz8bTdxeQBkUJvwLxQxLIJVsMl6FS6t8EbaeecHAzXZT0NgNZNkC6tbQvO0awF/oW2LWqmvbe6IAxYtrQuZpvhjNjyXmn6Leu/wx5z40wDV1QtGH35JSWpaWPSD/xz5AtSfqtNhZOp8UH3/c3BbB7xwjPeOqjQPOc21poX/DxwZ6Jj489KBh1arRsBs9hgavxW3cAOw2s9lj9eJGDPsIjQ10rXHW51WGifohcBh2DxvWWwuMDaTtovqziaK6PJuWJAB3THqjpar9B38i1STppXePqUBdLXRbcoANlAXDt27pXRqbyh74E3tC4KslgxBOGH+6tlY93I/hI6y7wQ86yppKATIqFfbTeo0ci8aMv8nrSD8veGDn1ZKPHDK5HzkbcilqkxliGTSSB3GsLMXzVNEnXhRA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(346002)(376002)(39860400002)(396003)(136003)(46966006)(40470700004)(36840700001)(7416002)(44832011)(2906002)(82310400005)(70586007)(4326008)(8676002)(70206006)(110136005)(54906003)(86362001)(316002)(81166007)(921005)(5660300002)(40480700001)(356005)(36756003)(83380400001)(8936002)(36860700001)(478600001)(336012)(426003)(47076005)(26005)(1076003)(41300700001)(82740400003)(6666004)(186003)(2616005)(40460700003)(36900700001)(83996005)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Aug 2022 15:06:34.3145 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7b8a3961-c4f5-4fd7-928b-08da80621348 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT012.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4960 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org This patch adds a VFIO reset module that registers and implements basic reset functionality for CDX based platform devices. It interfaces with the CDX bus controller to register all the types of devices supported on the CDX bus, and uses CDX bus interface to reset the device. Signed-off-by: Nipun Gupta --- MAINTAINERS | 1 + drivers/bus/cdx/cdx.c | 42 +++++++ drivers/vfio/platform/reset/Kconfig | 8 ++ drivers/vfio/platform/reset/Makefile | 1 + .../vfio/platform/reset/vfio_platform_cdx.c | 106 ++++++++++++++++++ include/linux/cdx/cdx_bus.h | 27 +++++ 6 files changed, 185 insertions(+) create mode 100644 drivers/vfio/platform/reset/vfio_platform_cdx.c diff --git a/MAINTAINERS b/MAINTAINERS index b0eea32dbb39..4794401f07c1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22302,6 +22302,7 @@ M: Nikhil Agarwal S: Maintained F: Documentation/devicetree/bindings/bus/xlnx,cdx.yaml F: drivers/bus/cdx/* +F: drivers/vfio/platform/reset/vfio_platform_cdx.c XILINX GPIO DRIVER M: Shubhrajyoti Datta diff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c index 5fb9a99b3c97..262db9071108 100644 --- a/drivers/bus/cdx/cdx.c +++ b/drivers/bus/cdx/cdx.c @@ -72,6 +72,48 @@ static ssize_t reset_store(struct device *dev, struct device_attribute *attr, } static DEVICE_ATTR_WO(reset); +int cdx_get_num_device_types(void) +{ + int i; + + for (i = 0; i < MAX_CDX_DEVICE_TYPES; i++) + if (strlen(dev_types[i].compat) == 0) + break; + + return i; +} + +int cdx_get_device_types(struct cdx_device_types_t *cdx_dev_types) +{ + int num_dev_types; + + if (cdx_dev_types == NULL) { + pr_err("Invalid argument to %s\n", __func__); + return -EINVAL; + } + + num_dev_types = cdx_get_num_device_types(); + + memcpy(cdx_dev_types, &dev_types[0], (num_dev_types * + sizeof(struct cdx_device_types_t))); + + return num_dev_types; +} + +int cdx_dev_reset(struct device *dev) +{ + return reset_cdx_device(dev, NULL); +} + +int cdx_dev_num_msi(struct device *dev) +{ + struct cdx_device_data *dev_data; + + /* Retrieve number of MSI from platform data */ + dev_data = dev->platform_data; + return dev_data->num_msi; +} + static int cdx_populate_one(struct platform_device *pdev_parent, struct cdx_dev_params_t *dev_params) { diff --git a/drivers/vfio/platform/reset/Kconfig b/drivers/vfio/platform/reset/Kconfig index 12f5f3d80387..bbbee3f7f5ca 100644 --- a/drivers/vfio/platform/reset/Kconfig +++ b/drivers/vfio/platform/reset/Kconfig @@ -21,3 +21,11 @@ config VFIO_PLATFORM_BCMFLEXRM_RESET Enables the VFIO platform driver to handle reset for Broadcom FlexRM If you don't know what to do here, say N. + +config VFIO_PLATFORM_CDXDEV_RESET + tristate "VFIO support for cdx devices reset" + default n + help + Enables the VFIO platform driver to handle reset for devices on CDX bus + + If you don't know what to do here, say N. diff --git a/drivers/vfio/platform/reset/Makefile b/drivers/vfio/platform/reset/Makefile index 7294c5ea122e..1b1f65945934 100644 --- a/drivers/vfio/platform/reset/Makefile +++ b/drivers/vfio/platform/reset/Makefile @@ -5,3 +5,4 @@ vfio-platform-amdxgbe-y := vfio_platform_amdxgbe.o obj-$(CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET) += vfio-platform-calxedaxgmac.o obj-$(CONFIG_VFIO_PLATFORM_AMDXGBE_RESET) += vfio-platform-amdxgbe.o obj-$(CONFIG_VFIO_PLATFORM_BCMFLEXRM_RESET) += vfio_platform_bcmflexrm.o +obj-$(CONFIG_VFIO_PLATFORM_CDXDEV_RESET) += vfio_platform_cdx.o diff --git a/drivers/vfio/platform/reset/vfio_platform_cdx.c b/drivers/vfio/platform/reset/vfio_platform_cdx.c new file mode 100644 index 000000000000..10bb27379205 --- /dev/null +++ b/drivers/vfio/platform/reset/vfio_platform_cdx.c @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * VFIO platform driver specialized for reset of devices on AMD CDX bus. + * + * Copyright(C) 2022 Xilinx Inc. + */ + +#include +#include +#include +#include +#include +#include + +#include "../vfio_platform_private.h" + +static int vfio_platform_cdxdev_reset(struct vfio_platform_device *vdev) +{ + return cdx_dev_reset(vdev->device); +} + +static struct vfio_platform_reset_node *vfio_platform_cdxdev_reset_nodes; + +static int __init vfio_platform_cdxdev_reset_module_init(void) +{ + struct cdx_device_types_t *cdx_dev_types; + struct vfio_platform_reset_node *reset_node; + int num_dev_types, ret, i; + + ret = cdx_get_num_device_types(); + if (ret < 0) { + pr_err("cdx_get_num_device_types failed: %d\n", ret); + return ret; + } + num_dev_types = ret; + + vfio_platform_cdxdev_reset_nodes = kcalloc(num_dev_types, + sizeof(struct vfio_platform_reset_node), GFP_KERNEL); + if (IS_ERR_OR_NULL(vfio_platform_cdxdev_reset_nodes)) { + pr_err("memory allocation for cdxdev_reset_nodes failed\n"); + return -ENOMEM; + } + + cdx_dev_types = kcalloc(num_dev_types, + sizeof(struct cdx_device_types_t), GFP_KERNEL); + if (IS_ERR_OR_NULL(cdx_dev_types)) { + pr_err("memory allocation for cdx_dev_types failed\n"); + kfree(vfio_platform_cdxdev_reset_nodes); + return -ENOMEM; + } + + ret = cdx_get_device_types(cdx_dev_types); + if (ret < 0) { + pr_err("cdx_get_devices_info failed: %d\n", ret); + kfree(vfio_platform_cdxdev_reset_nodes); + kfree(cdx_dev_types); + return ret; + } + + for (i = 0; i < num_dev_types; i++) { + reset_node = &vfio_platform_cdxdev_reset_nodes[i]; + reset_node->owner = THIS_MODULE; + + reset_node->compat = + kzalloc(strlen(cdx_dev_types[i].compat + 1), + GFP_KERNEL); + memcpy(reset_node->compat, cdx_dev_types[i].compat, + MAX_CDX_COMPAT_LEN); + + reset_node->of_reset = vfio_platform_cdxdev_reset; + + __vfio_platform_register_reset(reset_node); + } + kfree(cdx_dev_types); + + return 0; +} + +static void __exit vfio_platform_cdxdev_reset_module_exit(void) +{ + struct vfio_platform_reset_node *reset_node; + int num_dev_types, ret, i; + + ret = cdx_get_num_device_types(); + if (ret < 0) { + pr_err("cdx_get_num_device_types failed: %d\n", ret); + return; + } + + num_dev_types = ret; + for (i = 0; i < num_dev_types; i++) { + reset_node = &vfio_platform_cdxdev_reset_nodes[i]; + vfio_platform_unregister_reset(reset_node->compat, + vfio_platform_cdxdev_reset); + kfree(reset_node->compat); + } + kfree(vfio_platform_cdxdev_reset_nodes); +} + +module_init(vfio_platform_cdxdev_reset_module_init); +module_exit(vfio_platform_cdxdev_reset_module_exit); + +MODULE_VERSION("0.1"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nipun Gupta"); +MODULE_DESCRIPTION("Reset support for cdx devices"); diff --git a/include/linux/cdx/cdx_bus.h b/include/linux/cdx/cdx_bus.h index 7c6ad7dfe97a..47c60edb49fd 100644 --- a/include/linux/cdx/cdx_bus.h +++ b/include/linux/cdx/cdx_bus.h @@ -23,4 +23,31 @@ struct cdx_device_types_t { char compat[MAX_CDX_COMPAT_LEN]; }; +/** + * cdx_get_num_device_types - Get total number of CDX device types. + * + * Return number of types of devices, -errno on failure + */ +int cdx_get_num_device_types(void); + +/** + * cdx_get_device_types - Get info related to all types of devices + * supported on the CDX bus. + * @cdx_dev_types: Pointer to cdx_devices_type_t structure. + * Memory for this structure should be allocated by the + * caller, where the memory allocated should be more than + * available_device_types * sizeof(struct cdx_device_types_t). + * + * Return number of types of devices, -errno on failure + */ +int cdx_get_device_types(struct cdx_device_types_t *cdx_dev_types); + +/** + * cdx_dev_reset - Reset CDX device + * @dev: device pointer + * + * Return 0 for success, -errno on failure + */ +int cdx_dev_reset(struct device *dev); + #endif /* _CDX_H_ */ From patchwork Wed Aug 17 15:05:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nipun Gupta X-Patchwork-Id: 12946125 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4B51C25B08 for ; Wed, 17 Aug 2022 15:07:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240748AbiHQPHE (ORCPT ); Wed, 17 Aug 2022 11:07:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240746AbiHQPGt (ORCPT ); Wed, 17 Aug 2022 11:06:49 -0400 Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2074.outbound.protection.outlook.com [40.107.237.74]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 925579E2E6; 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Wed, 17 Aug 2022 08:06:40 -0700 Received: from xhdipdslab49.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.28 via Frontend Transport; Wed, 17 Aug 2022 10:06:32 -0500 From: Nipun Gupta To: , , , , , , , , , , , , , , , , , , , , CC: , , , , , Nipun Gupta Subject: [RFC PATCH v2 6/6] driver core: add compatible string in sysfs for platform devices Date: Wed, 17 Aug 2022 20:35:42 +0530 Message-ID: <20220817150542.483291-7-nipun.gupta@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220817150542.483291-1-nipun.gupta@amd.com> References: <20220803122655.100254-1-nipun.gupta@amd.com> <20220817150542.483291-1-nipun.gupta@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 95b58235-45c0-4cd4-8875-08da80621772 X-MS-TrafficTypeDiagnostic: DS7PR12MB6048:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: cjMtkrE2JUlt4UKpUUkRZGXH6jKmhiDetmjhr7jwBJMesPulQvyBNsBDSm/vv19Zlq2la9cyn0bxxiR6id1UfPP5gTiMtWZmy48CbzENXuLcMXIoaVavHFxaIVZqBNRR71Wt2MO0m20Z41Rmg62OuCWcfzzPyUIFLV0tBNuiTKROvnvVsvqYqEJaqa2HglsvS6FHqBvL6lvdpyCb0h1fSdjUoUBQRgusorKYjJGJUAQpEijrM4v3wZEaUPuK+8UjKeW4BsyHxqNIJ2xpHYUPS8/H/0UtyI2HlzYpDvdpkqtNrf5VSPz3xGPxtvT2brn6yA+7b9r9mCEftqkydTmKjDvxU324erfTo59I39WMSEAAczqvc8G6oC7X07a+KumDux/XPt7Jtdv8ol0sJ9rfa3yPubeDl707KcRaC/X4kOgPmA7FJcNLWDZ1ImwA3p0jS20l+AyG2FErpbMeQ8n6Geskj0kVR5R0nmr7dLUyif6y5+fYjbxL9iknti/ZJ0lGYmdWlS5kFxAKEQlb9kIFi27KfG6rzbZg9AS2h3XnXgApOEnJMMVMe7IyMcFPBvCByW750PWu55ytSlY9X/H0Tds5nF8R5SY/hkHHQKaeIYX/xx51/jJS2TzAhKxzqVuH/rIUCxXThf2e9wwaLupY05pq5jwD30XJtvTs2rWvlSMLQeX0mrUgQUHz2gGyZ+IssrGX+lnhnCqhQbb8Mfc1UcP8TZ03Ii3x2LkUnNAptEgA3EnIwWD3WTGNZKXCWQHp+B7xQ/eqJ/Sb9I3zH//nXH6RKa4tl3i+h+dKGpbVRnxBZlFCWN1Fyn0ju5fpJxSJIRZCB74P+lBF8rG7/MdIsFC1eL7L9ZLlKFSH1Rj+FVIBixcqZNBHpS2va5SxRZxbGsMkPS4iS7hECy9J1ULpRg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(396003)(39860400002)(376002)(136003)(346002)(46966006)(40470700004)(36840700001)(54906003)(47076005)(336012)(1076003)(2616005)(40480700001)(6666004)(186003)(86362001)(36860700001)(36756003)(26005)(110136005)(40460700003)(82310400005)(316002)(4326008)(426003)(41300700001)(70206006)(44832011)(70586007)(478600001)(5660300002)(2906002)(81166007)(921005)(82740400003)(8676002)(356005)(8936002)(7416002)(36900700001)(83996005)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Aug 2022 15:06:41.3003 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 95b58235-45c0-4cd4-8875-08da80621772 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT091.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6048 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org This change adds compatible string for the platform based devices. Signed-off-by: Nipun Gupta --- Documentation/ABI/testing/sysfs-bus-platform | 8 +++++++ drivers/base/platform.c | 23 ++++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-platform b/Documentation/ABI/testing/sysfs-bus-platform index c4dfe7355c2d..d95ff83d768c 100644 --- a/Documentation/ABI/testing/sysfs-bus-platform +++ b/Documentation/ABI/testing/sysfs-bus-platform @@ -54,3 +54,11 @@ Description: Other platform devices use, instead: - platform:`driver name` + +What: /sys/bus/platform/devices/.../compatible +Date: August 2022 +Contact: Nipun Gupta +Description: + compatible string associated with the device. This is + a read only and is visible if the device have "compatible" + property associated with it. diff --git a/drivers/base/platform.c b/drivers/base/platform.c index 51bb2289865c..94c33efaa9b8 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -1289,10 +1289,25 @@ static ssize_t driver_override_store(struct device *dev, } static DEVICE_ATTR_RW(driver_override); +static ssize_t compatible_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + const char *compat; + int ret; + + ret = device_property_read_string(dev, "compatible", &compat); + if (ret != 0) + return 0; + + return sysfs_emit(buf, "%s", compat); +} +static DEVICE_ATTR_RO(compatible); + static struct attribute *platform_dev_attrs[] = { &dev_attr_modalias.attr, &dev_attr_numa_node.attr, &dev_attr_driver_override.attr, + &dev_attr_compatible.attr, NULL, }; @@ -1300,11 +1315,19 @@ static umode_t platform_dev_attrs_visible(struct kobject *kobj, struct attribute int n) { struct device *dev = container_of(kobj, typeof(*dev), kobj); + const char *compat; + int ret; if (a == &dev_attr_numa_node.attr && dev_to_node(dev) == NUMA_NO_NODE) return 0; + if (a == &dev_attr_compatible.attr) { + ret = device_property_read_string(dev, "compatible", &compat); + if (ret != 0) + return 0; + } + return a->mode; }