From patchwork Fri Aug 26 09:52:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaojuan Yang X-Patchwork-Id: 12955790 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 722BCECAAD2 for ; Fri, 26 Aug 2022 09:55:21 +0000 (UTC) Received: from localhost ([::1]:38272 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oRW3c-00009F-Gn for qemu-devel@archiver.kernel.org; Fri, 26 Aug 2022 05:55:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50936) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oRW1J-0006Z2-4g for qemu-devel@nongnu.org; Fri, 26 Aug 2022 05:52:57 -0400 Received: from mail.loongson.cn ([114.242.206.163]:52018 helo=loongson.cn) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oRW1F-0005vb-Lo for qemu-devel@nongnu.org; Fri, 26 Aug 2022 05:52:56 -0400 Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx72vslwhjn00KAA--.42825S3; Fri, 26 Aug 2022 17:52:45 +0800 (CST) From: Xiaojuan Yang To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, gaosong@loongson.cn, maobibo@loongson.cn, imammedo@redhat.com Subject: [PATCH v1 1/2] hw/loongarch: Support memory hotplug Date: Fri, 26 Aug 2022 17:52:43 +0800 Message-Id: <20220826095244.613426-2-yangxiaojuan@loongson.cn> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220826095244.613426-1-yangxiaojuan@loongson.cn> References: <20220826095244.613426-1-yangxiaojuan@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx72vslwhjn00KAA--.42825S3 X-Coremail-Antispam: 1UD129KBjvJXoW3JryUCr1Dtr4fWFW5Gw4DArb_yoW3Zr4rpa 1UZF90vr4UWFnxZ3s3tr98WF1rAr4Ika4jqF1IyrWkKFnrWryDAryFk34Yga4UJ34kXF15 u3s8Ja12ga13JrJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: p1dqw5xldry3tdq6z05rqj20fqof0/ Received-SPF: pass client-ip=114.242.206.163; envelope-from=yangxiaojuan@loongson.cn; helo=loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add hotplug/unplug interface for memory device. Signed-off-by: Xiaojuan Yang --- hw/loongarch/Kconfig | 2 + hw/loongarch/acpi-build.c | 32 +++++++++--- hw/loongarch/virt.c | 105 +++++++++++++++++++++++++++++++++++++- 3 files changed, 132 insertions(+), 7 deletions(-) diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig index fef55c5638..17d15b6c90 100644 --- a/hw/loongarch/Kconfig +++ b/hw/loongarch/Kconfig @@ -4,6 +4,7 @@ config LOONGARCH_VIRT select PCI_EXPRESS_GENERIC_BRIDGE imply VIRTIO_VGA imply PCI_DEVICES + imply NVDIMM select ISA_BUS select SERIAL select SERIAL_ISA @@ -18,3 +19,4 @@ config LOONGARCH_VIRT select ACPI_PCI select ACPI_HW_REDUCED select FW_CFG_DMA + select DIMM diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c index 95e30975a8..92ee62c11a 100644 --- a/hw/loongarch/acpi-build.c +++ b/hw/loongarch/acpi-build.c @@ -186,6 +186,12 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine) build_srat_memory(table_data, VIRT_HIGHMEM_BASE, machine->ram_size - VIRT_LOWMEM_SIZE, 0, MEM_AFFINITY_ENABLED); + if (ms->device_memory) { + build_srat_memory(table_data, ms->device_memory->base, + memory_region_size(&ms->device_memory->mr), + 0, MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED); + } + acpi_table_end(linker, &table); } @@ -335,6 +341,25 @@ static void build_uart_device_aml(Aml *table) aml_append(table, scope); } +static void +build_la_ged_aml(Aml *dsdt, MachineState *machine) +{ + uint32_t event; + LoongArchMachineState *lams = LOONGARCH_MACHINE(machine); + + build_ged_aml(dsdt, "\\_SB."GED_DEVICE, + HOTPLUG_HANDLER(lams->acpi_ged), + VIRT_SCI_IRQ, AML_SYSTEM_MEMORY, + VIRT_GED_EVT_ADDR); + event = object_property_get_uint(OBJECT(lams->acpi_ged), + "ged-event", &error_abort); + if (event & ACPI_GED_MEM_HOTPLUG_EVT) { + build_memory_hotplug_aml(dsdt, machine->ram_slots, "\\_SB", NULL, + AML_SYSTEM_MEMORY, + VIRT_GED_MEM_ADDR); + } +} + /* build DSDT */ static void build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine) @@ -364,12 +389,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine) build_gpex_pci0_int(dsdt); build_uart_device_aml(dsdt); - if (lams->acpi_ged) { - build_ged_aml(dsdt, "\\_SB."GED_DEVICE, - HOTPLUG_HANDLER(lams->acpi_ged), - VIRT_SCI_IRQ, AML_SYSTEM_MEMORY, - VIRT_GED_EVT_ADDR); - } + build_la_ged_aml(dsdt, machine); scope = aml_scope("\\_SB.PCI0"); /* Build PCI0._CRS */ diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 1e1dc699ef..a81db29384 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -40,6 +40,7 @@ #include "hw/core/sysbus-fdt.h" #include "hw/platform-bus.h" #include "hw/display/ramfb.h" +#include "hw/mem/pc-dimm.h" static void create_fdt(LoongArchMachineState *lams) { @@ -719,6 +720,35 @@ static void loongarch_init(MachineState *machine) machine->ram, offset, highram_size); memory_region_add_subregion(address_space_mem, 0x90000000, &lams->highmem); memmap_add_entry(0x90000000, highram_size, 1); + + /* initialize device memory address space */ + if (machine->ram_size < machine->maxram_size) { + machine->device_memory = g_malloc0(sizeof(*machine->device_memory)); + ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; + + if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { + error_report("unsupported amount of memory slots: %"PRIu64, + machine->ram_slots); + exit(EXIT_FAILURE); + } + + if (QEMU_ALIGN_UP(machine->maxram_size, + TARGET_PAGE_SIZE) != machine->maxram_size) { + error_report("maximum memory size must by aligned to multiple of " + "%d bytes", TARGET_PAGE_SIZE); + exit(EXIT_FAILURE); + } + /* device memory base is the top of high memory address. */ + machine->device_memory->base = 0x90000000 + highram_size; + machine->device_memory->base = + ROUND_UP(machine->device_memory->base, 1 * GiB); + + memory_region_init(&machine->device_memory->mr, OBJECT(lams), + "device-memory", device_mem_size); + memory_region_add_subregion(address_space_mem, machine->device_memory->base, + &machine->device_memory->mr); + } + /* Add isa io region */ memory_region_init_alias(&lams->isa_io, NULL, "isa-io", get_system_io(), 0, VIRT_ISA_IO_SIZE); @@ -805,6 +835,73 @@ static void loongarch_machine_initfn(Object *obj) lams->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); } +static bool memhp_type_supported(DeviceState *dev) +{ + /* we only support pc dimm now */ + return object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) && + !object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); +} + +static void virt_mem_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, + Error **errp) +{ + pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), NULL, errp); +} + +static void virt_machine_device_pre_plug(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ + if (memhp_type_supported(dev)) { + virt_mem_pre_plug(hotplug_dev, dev, errp); + } +} + +static void virt_mem_unplug_request(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ + LoongArchMachineState *lams = LOONGARCH_MACHINE(hotplug_dev); + + /* the acpi ged is always exist */ + hotplug_handler_unplug_request(HOTPLUG_HANDLER(lams->acpi_ged), dev, + errp); +} + +static void virt_machine_device_unplug_request(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ + if (memhp_type_supported(dev)) { + virt_mem_unplug_request(hotplug_dev, dev, errp); + } +} + +static void virt_mem_unplug(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ + LoongArchMachineState *lams = LOONGARCH_MACHINE(hotplug_dev); + + hotplug_handler_unplug(HOTPLUG_HANDLER(lams->acpi_ged), dev, errp); + pc_dimm_unplug(PC_DIMM(dev), MACHINE(lams)); + qdev_unrealize(dev); +} + +static void virt_machine_device_unplug(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ + if (memhp_type_supported(dev)) { + virt_mem_unplug(hotplug_dev, dev, errp); + } +} + +static void virt_mem_plug(HotplugHandler *hotplug_dev, + DeviceState *dev, Error **errp) +{ + LoongArchMachineState *lams = LOONGARCH_MACHINE(hotplug_dev); + + pc_dimm_plug(PC_DIMM(dev), MACHINE(lams)); + hotplug_handler_plug(HOTPLUG_HANDLER(lams->acpi_ged), + dev, &error_abort); +} + static void loongarch_machine_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { @@ -816,6 +913,8 @@ static void loongarch_machine_device_plug_cb(HotplugHandler *hotplug_dev, platform_bus_link_device(PLATFORM_BUS_DEVICE(lams->platform_bus_dev), SYS_BUS_DEVICE(dev)); } + } else if (memhp_type_supported(dev)) { + virt_mem_plug(hotplug_dev, dev, errp); } } @@ -824,7 +923,8 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine, { MachineClass *mc = MACHINE_GET_CLASS(machine); - if (device_is_dynamic_sysbus(mc, dev)) { + if (device_is_dynamic_sysbus(mc, dev) || + memhp_type_supported(dev)) { return HOTPLUG_HANDLER(machine); } return NULL; @@ -848,6 +948,9 @@ static void loongarch_class_init(ObjectClass *oc, void *data) mc->no_cdrom = 1; mc->get_hotplug_handler = virt_machine_get_hotplug_handler; hc->plug = loongarch_machine_device_plug_cb; + hc->pre_plug = virt_machine_device_pre_plug; + hc->unplug_request = virt_machine_device_unplug_request; + hc->unplug = virt_machine_device_unplug; object_class_property_add(oc, "acpi", "OnOffAuto", loongarch_get_acpi, loongarch_set_acpi, From patchwork Fri Aug 26 09:52:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaojuan Yang X-Patchwork-Id: 12955789 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D5126ECAAD6 for ; Fri, 26 Aug 2022 09:55:19 +0000 (UTC) Received: from localhost ([::1]:38276 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oRW3a-0000B9-Df for qemu-devel@archiver.kernel.org; Fri, 26 Aug 2022 05:55:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50934) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oRW1I-0006Yy-78 for qemu-devel@nongnu.org; Fri, 26 Aug 2022 05:52:56 -0400 Received: from mail.loongson.cn ([114.242.206.163]:52020 helo=loongson.cn) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oRW1E-0005va-N2 for qemu-devel@nongnu.org; Fri, 26 Aug 2022 05:52:55 -0400 Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx72vslwhjn00KAA--.42825S4; Fri, 26 Aug 2022 17:52:46 +0800 (CST) From: Xiaojuan Yang To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, gaosong@loongson.cn, maobibo@loongson.cn, imammedo@redhat.com Subject: [PATCH v1 2/2] hw/loongarch: Improve acpi dsdt table Date: Fri, 26 Aug 2022 17:52:44 +0800 Message-Id: <20220826095244.613426-3-yangxiaojuan@loongson.cn> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220826095244.613426-1-yangxiaojuan@loongson.cn> References: <20220826095244.613426-1-yangxiaojuan@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx72vslwhjn00KAA--.42825S4 X-Coremail-Antispam: 1UD129KBjvJXoW3ArW3tF4UuFW3Gr4rZFy7Jrb_yoW3AFWxp3 ya9FWYvr15GrnFq3yfA3W5WF1UArn7G34qqasxArs2kFZFkr10qry8C393WF1Yy3s3tFWU XrZY934UCw4kJr7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: p1dqw5xldry3tdq6z05rqj20fqof0/ Received-SPF: pass client-ip=114.242.206.163; envelope-from=yangxiaojuan@loongson.cn; helo=loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Cleanup the previous pci information in acpi dsdt table. And using the common acpi_dsdt_add_gpex function to build the gpex and pci information. Signed-off-by: Xiaojuan Yang --- hw/loongarch/acpi-build.c | 159 +++++------------------------------- hw/loongarch/virt.c | 1 + include/hw/loongarch/virt.h | 1 + 3 files changed, 21 insertions(+), 140 deletions(-) diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c index 92ee62c11a..378a6d9d38 100644 --- a/hw/loongarch/acpi-build.c +++ b/hw/loongarch/acpi-build.c @@ -30,6 +30,7 @@ #include "qom/qom-qobject.h" #include "hw/acpi/generic_event_device.h" +#include "hw/pci-host/gpex.h" #define ACPI_BUILD_ALIGN_SIZE 0x1000 #define ACPI_BUILD_TABLE_SIZE 0x20000 @@ -206,108 +207,6 @@ struct AcpiBuildState { MemoryRegion *linker_mr; } AcpiBuildState; -static void build_gpex_pci0_int(Aml *table) -{ - Aml *sb_scope = aml_scope("_SB"); - Aml *pci0_scope = aml_scope("PCI0"); - Aml *prt_pkg = aml_varpackage(128); - int slot, pin; - - for (slot = 0; slot < PCI_SLOT_MAX; slot++) { - for (pin = 0; pin < PCI_NUM_PINS; pin++) { - Aml *pkg = aml_package(4); - aml_append(pkg, aml_int((slot << 16) | 0xFFFF)); - aml_append(pkg, aml_int(pin)); - aml_append(pkg, aml_int(0)); - aml_append(pkg, aml_int(80 + (slot + pin) % 4)); - aml_append(prt_pkg, pkg); - } - } - aml_append(pci0_scope, aml_name_decl("_PRT", prt_pkg)); - aml_append(sb_scope, pci0_scope); - aml_append(table, sb_scope); -} - -static void build_dbg_aml(Aml *table) -{ - Aml *field; - Aml *method; - Aml *while_ctx; - Aml *scope = aml_scope("\\"); - Aml *buf = aml_local(0); - Aml *len = aml_local(1); - Aml *idx = aml_local(2); - - aml_append(scope, - aml_operation_region("DBG", AML_SYSTEM_IO, aml_int(0x0402), 0x01)); - field = aml_field("DBG", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); - aml_append(field, aml_named_field("DBGB", 8)); - aml_append(scope, field); - - method = aml_method("DBUG", 1, AML_NOTSERIALIZED); - - aml_append(method, aml_to_hexstring(aml_arg(0), buf)); - aml_append(method, aml_to_buffer(buf, buf)); - aml_append(method, aml_subtract(aml_sizeof(buf), aml_int(1), len)); - aml_append(method, aml_store(aml_int(0), idx)); - - while_ctx = aml_while(aml_lless(idx, len)); - aml_append(while_ctx, - aml_store(aml_derefof(aml_index(buf, idx)), aml_name("DBGB"))); - aml_append(while_ctx, aml_increment(idx)); - aml_append(method, while_ctx); - aml_append(method, aml_store(aml_int(0x0A), aml_name("DBGB"))); - aml_append(scope, method); - aml_append(table, scope); -} - -static Aml *build_osc_method(void) -{ - Aml *if_ctx; - Aml *if_ctx2; - Aml *else_ctx; - Aml *method; - Aml *a_cwd1 = aml_name("CDW1"); - Aml *a_ctrl = aml_local(0); - - method = aml_method("_OSC", 4, AML_NOTSERIALIZED); - aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1")); - - if_ctx = aml_if(aml_equal( - aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766"))); - aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2")); - aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); - aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl)); - - /* - * Always allow native PME, AER (no dependencies) - * Allow SHPC (PCI bridges can have SHPC controller) - */ - aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1F), a_ctrl)); - - if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1)))); - /* Unknown revision */ - aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1)); - aml_append(if_ctx, if_ctx2); - - if_ctx2 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl))); - /* Capabilities bits were masked */ - aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1)); - aml_append(if_ctx, if_ctx2); - - /* Update DWORD3 in the buffer */ - aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3"))); - aml_append(method, if_ctx); - - else_ctx = aml_else(); - /* Unrecognized UUID */ - aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1)); - aml_append(method, else_ctx); - - aml_append(method, aml_return(aml_arg(3))); - return method; -} - static void build_uart_device_aml(Aml *table) { Aml *dev; @@ -360,57 +259,37 @@ build_la_ged_aml(Aml *dsdt, MachineState *machine) } } +static void build_pci_device_aml(Aml *scope, LoongArchMachineState *lams) +{ + struct GPEXConfig cfg = { + .mmio64.base = VIRT_PCI_MEM_BASE, + .mmio64.size = VIRT_PCI_MEM_SIZE, + .pio.base = VIRT_PCI_IO_BASE, + .pio.size = VIRT_PCI_IO_SIZE, + .ecam.base = VIRT_PCI_CFG_BASE, + .ecam.size = VIRT_PCI_CFG_SIZE, + .irq = PCH_PIC_IRQ_OFFSET + VIRT_DEVICE_IRQS, + .bus = lams->pci_bus, + }; + + acpi_dsdt_add_gpex(scope, &cfg); +} + /* build DSDT */ static void build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine) { - Aml *dsdt, *sb_scope, *scope, *dev, *crs, *pkg; - int root_bus_limit = 0x7F; + Aml *dsdt, *scope, *pkg; LoongArchMachineState *lams = LOONGARCH_MACHINE(machine); AcpiTable table = { .sig = "DSDT", .rev = 1, .oem_id = lams->oem_id, .oem_table_id = lams->oem_table_id }; acpi_table_begin(&table, table_data); - dsdt = init_aml_allocator(); - - build_dbg_aml(dsdt); - - sb_scope = aml_scope("_SB"); - dev = aml_device("PCI0"); - aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08"))); - aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03"))); - aml_append(dev, aml_name_decl("_ADR", aml_int(0))); - aml_append(dev, aml_name_decl("_BBN", aml_int(0))); - aml_append(dev, aml_name_decl("_UID", aml_int(1))); - aml_append(dev, build_osc_method()); - aml_append(sb_scope, dev); - aml_append(dsdt, sb_scope); - - build_gpex_pci0_int(dsdt); build_uart_device_aml(dsdt); + build_pci_device_aml(dsdt, lams); build_la_ged_aml(dsdt, machine); - scope = aml_scope("\\_SB.PCI0"); - /* Build PCI0._CRS */ - crs = aml_resource_template(); - aml_append(crs, - aml_word_bus_number(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE, - 0x0000, 0x0, root_bus_limit, - 0x0000, root_bus_limit + 1)); - aml_append(crs, - aml_dword_io(AML_MIN_FIXED, AML_MAX_FIXED, - AML_POS_DECODE, AML_ENTIRE_RANGE, - 0x0000, 0x0000, 0xFFFF, 0x18000000, 0x10000)); - aml_append(crs, - aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED, - AML_CACHEABLE, AML_READ_WRITE, - 0, VIRT_PCI_MEM_BASE, - VIRT_PCI_MEM_BASE + VIRT_PCI_MEM_SIZE - 1, - 0, VIRT_PCI_MEM_BASE)); - aml_append(scope, aml_name_decl("_CRS", crs)); - aml_append(dsdt, scope); - /* System State Package */ scope = aml_scope("\\"); pkg = aml_package(4); diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index a81db29384..e90f9fccf3 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -388,6 +388,7 @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState * d = SYS_BUS_DEVICE(gpex_dev); sysbus_realize_and_unref(d, &error_fatal); pci_bus = PCI_HOST_BRIDGE(gpex_dev)->bus; + lams->pci_bus = pci_bus; /* Map only part size_ecam bytes of ECAM space */ ecam_alias = g_new0(MemoryRegion, 1); diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index 64c90b80d2..09f1c88ee5 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -50,6 +50,7 @@ struct LoongArchMachineState { DeviceState *acpi_ged; int fdt_size; DeviceState *platform_bus_dev; + PCIBus *pci_bus; }; #define TYPE_LOONGARCH_MACHINE MACHINE_TYPE_NAME("virt")