From patchwork Tue Aug 30 06:51:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 12958817 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 598A7ECAAD1 for ; Tue, 30 Aug 2022 06:52:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=811jkoaSW+uuLl7wH6X2BSh3GJ1VdnadYkUSV1JwaE4=; b=uydOsi3KCMZlgb hundrYgx7nyXhDpRl8sXKHmvBLFc+nBFhOacZ3B8Bpsa+Z3J2f3pUEjohUWe6IhLA6OXgQv0LnHGA cUMFtbREJIPNqFJoWWiB0kTYh/0ayWSTEHTHESZyeLxPbUI7uAudOfsdsGQIY+4TOh4L1jstnzqBn VZqyDaLIEEAHYjzEH7TCzjk7gWT6pJAGtaKTox06rjStMD6BQKxl8kgHNY5vdrvvBSVPEI9RNufYO JBxeioIJ5FV0066orryeEo4YtVrKEssrzdNMPjPHQE5s6bzKGH2mi0wsPbZL1/syHW+qGiTJUFoTe +0eLgNVjPLZgNVBSaJHw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oSv6B-00EYG6-4E; Tue, 30 Aug 2022 06:51:47 +0000 Received: from mail-pl1-x636.google.com ([2607:f8b0:4864:20::636]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oSv68-00EYEQ-05 for linux-rockchip@lists.infradead.org; Tue, 30 Aug 2022 06:51:45 +0000 Received: by mail-pl1-x636.google.com with SMTP id m2so10211882pls.4 for ; Mon, 29 Aug 2022 23:51:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc; bh=7pxVuvZKnwCDX91eUIsx5zUNymHQHE5pWZq79BjPPME=; b=FCVYb2ZQwZQNPJQozcEHmqfO6JFfs9qBPKLDVUhZ4w48DJpcaWEM3OKmFe8WtlaM6b Ey9wk/P1cP0eiqTy11S9Zvr4dr09rjMgbDZQix8qOdyB+rCzn77g7hL9Oof5SbGiKRa8 6uNeiiv+CUGO/jFdn13/WyMV00/CmwP4OLgYg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc; bh=7pxVuvZKnwCDX91eUIsx5zUNymHQHE5pWZq79BjPPME=; b=fNkq0ssIi+uiJYHIwQgv+6h15B7w1OtjFBzI5c+s4BS8d0ECzk7EutM0wZW5fNeasv AFcJEy7GSuIgYjlT7kv+rA0cDS8C5uMpgMRDmWB/nAy4BtDp0SA25uq5fT11raP0C5Gi sG4A3f40k3w51t1yTtoJQTik5LL4NIMSPG4IYVPQOWx1kTDYmUCwglUQRMLHZ3qD693B xgrYpUO430fsf19pX6EWaJn5I723rRubRwbfUWMIIPLC83k9dRhe3bzAXqPiIKNEyGSh 1M4+3JbwdAbv1ba2+Yz8u8MqGDOfj3v1hc0THI6lvhHhG7d8pLMkixSavCt96RwDkhEe 6DaQ== X-Gm-Message-State: ACgBeo3e/QI7r0SVhnoSHeKr0/vm/h6cqIY4LreE24LyQtD9lU0+EhMR 1Kql6G5q5xdYbhyP1MFSGSBgHw== X-Google-Smtp-Source: AA6agR5cLaGfSLe3iLKW6006pUym5HdJ5DrsoVZHTbIrLxWxLRp+iY4sErPfZmNn169Iy3WpFg9TrA== X-Received: by 2002:a17:90a:bc8d:b0:1fd:f4f1:d5da with SMTP id x13-20020a17090abc8d00b001fdf4f1d5damr4853360pjr.205.1661842300923; Mon, 29 Aug 2022 23:51:40 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c00a:a073:8d7b:a73a:5272:1b81]) by smtp.gmail.com with ESMTPSA id x14-20020a1709027c0e00b0016c78f9f024sm8854460pll.104.2022.08.29.23.51.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Aug 2022 23:51:40 -0700 (PDT) From: Jagan Teki To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski Cc: FUKAUMI Naoki , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , Krzysztof Kozlowski Subject: [PATCH v3 1/3] dt-bindings: arm: rockchip: Document Radxa ROCK 4C+ Date: Tue, 30 Aug 2022 12:21:17 +0530 Message-Id: <20220830065119.120844-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220829_235144_068161_413D38F8 X-CRM114-Status: UNSURE ( 9.51 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Document the dt-bindings for Radxa ROCK 4C+ SBC. Key differences of 4C+ compared to previous ROCK Pi 4. - Rockchip RK3399-T SoC - DP from 4C replaced with micro HDMI 2K@60fps - 4-lane MIPI DSI with 1920*1080 - RK817 Audio codec Also, an official naming convention from Radxa mention to remove Pi from board name, so this 4C+ is named as Radxa ROCK 4C+ not Radxa ROCK Pi 4C+. Acked-by: Krzysztof Kozlowski Signed-off-by: Jagan Teki --- Changes for v3: - updated commit message Changes for v2: - fix line wrapping - collect Krzysztof Ack Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 7811ba64149c..ec3525fb1e60 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -537,6 +537,11 @@ properties: - const: radxa,rockpi4 - const: rockchip,rk3399 + - description: Radxa ROCK 4C+ + items: + - const: radxa,rock-4c-plus + - const: rockchip,rk3399 + - description: Radxa ROCK Pi E items: - const: radxa,rockpi-e From patchwork Tue Aug 30 06:51:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 12958818 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CD68BECAAD1 for ; Tue, 30 Aug 2022 06:52:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=H1GZENKrfeCESs2vn0P/uCv6ezi2seZdKts8cHwHRrI=; b=dueatkjIIBiyo4 coxMfKX0ep5PlTe54PNhBJexfLOkL9pmp3Br5kGS3SHe169SGIE+6npyQA+N15dfDnwEse6v6/OSD a/iXJ1JnO5cFe328pGzNHN1x7XMlMLvMM3FZgJYCW/e3clKm7tkAGGTyhp5cVkHLVThUK2EWqQ/KY bLMOKrVODWmXiPvQl68+3wYsVZ6bgnaYbDT3DIk76uVmmubVxx594JAIjKcLYSBDtPMLZFuabnr5b v2f09/0r4GmFO1uPzYZfBu2jMkoAVUuctXlwXMc8kaKHXekYhG19FYoqkwF+7CeKuMC5AOCJNo1zF h517MXHIgZQANcJwzbgw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oSv6S-00EYMe-Lv; Tue, 30 Aug 2022 06:52:04 +0000 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oSv6M-00EYJ1-Q6 for linux-rockchip@lists.infradead.org; Tue, 30 Aug 2022 06:52:02 +0000 Received: by mail-pj1-x1032.google.com with SMTP id j9-20020a17090a3e0900b001fd9568b117so7268161pjc.3 for ; Mon, 29 Aug 2022 23:51:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=FhUz9eJE2XOu3UgXEAzPMUljoPBJG7NhYNYPepyAZw0=; b=oQRMAyIeAMFn4DY4zJ3Ik0osz4EPpbLiOJiMDfLctyRtLfvfLBbizSX7JFHe10q9a7 /He4aWOJVN9coTY7m1NgWAAFV90txARa80wHJ6ZQOhB7ZiWWDQI2mg85hcFpVMvEY6hl RMYkw+NOtzyc+NC07/kPDUhW/Izt5PCZLqsaM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=FhUz9eJE2XOu3UgXEAzPMUljoPBJG7NhYNYPepyAZw0=; b=fmVcfkh0hqh6rBneG5+bjeav1QhQaZwSec/Svlz4zNOcK5oEDaA1R5aHKiBlI6+6cT /Zok2+EUGq0A9cIBK3GGTn4bFvaVtYsuHKGWp1y6959tdNnzpo6SBFbFbakhkiA+GJEw 9m2dm1xcyajRkHcT/rqMT0GTsJftLpOq3o5fQ/jJiz0+4DwB8fSEnUET6NUdZGwNjtEq ecDpRFKZq28MxCd38lGEwihaxW90UJJZKJFc70g8P2TWwvRI9qM2Cl977RL7ZTDXtG0g MW0ZIZMtI+WpkGRcnwW2k8bImuNaqoBk5xlg18QmG8cLcGAB6wEydfmnqhbMLgXR8zDv lAtA== X-Gm-Message-State: ACgBeo3Is6hh51AN4PovcMJEgDrrZqIaeHvbGyscc5ebMnLzjlwTnX8L 7471/5iWP+ijTvGDe2x+GIB0Zg== X-Google-Smtp-Source: AA6agR6XZYkNzdx6alsztuL0LBPi4vUoo/o+qOCworvgIncDm1t08KUm8Aty1z6QmgAhNfzXwZMpEQ== X-Received: by 2002:a17:902:f711:b0:170:9e3c:1540 with SMTP id h17-20020a170902f71100b001709e3c1540mr19537990plo.22.1661842315093; Mon, 29 Aug 2022 23:51:55 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c00a:a073:8d7b:a73a:5272:1b81]) by smtp.gmail.com with ESMTPSA id x14-20020a1709027c0e00b0016c78f9f024sm8854460pll.104.2022.08.29.23.51.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Aug 2022 23:51:54 -0700 (PDT) From: Jagan Teki To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski Cc: FUKAUMI Naoki , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v3 2/3] arm64: dts: rockchip: Add RK3399-T OPP table Date: Tue, 30 Aug 2022 12:21:18 +0530 Message-Id: <20220830065119.120844-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220830065119.120844-1-jagan@amarulasolutions.com> References: <20220830065119.120844-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220829_235201_202575_1378430B X-CRM114-Status: GOOD ( 13.18 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org RK3399-T is down-clocked version of RK3399 SoC operated at 1.5GHz. Add CPU operating points table for it. Signed-off-by: FUKAUMI Naoki Signed-off-by: Jagan Teki --- Changes for v3: - new patch .../arm64/boot/dts/rockchip/rk3399-t-opp.dtsi | 114 ++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi diff --git a/arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi new file mode 100644 index 000000000000..b41c765bd07b --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-t-opp.dtsi @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd + * Copyright (c) 2022 Radxa Limited + */ + +/ { + cluster0_opp: opp-table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <875000 875000 1250000>; + clock-latency-ns = <40000>; + }; + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <875000 875000 1250000>; + }; + opp02 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <900000 900000 1250000>; + }; + opp03 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <975000 975000 1250000>; + }; + }; + + cluster1_opp: opp-table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <875000 875000 1250000>; + clock-latency-ns = <40000>; + }; + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <875000 875000 1250000>; + }; + opp02 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <875000 875000 1250000>; + }; + opp03 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <925000 925000 1250000>; + }; + opp04 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1000000 1000000 1250000>; + }; + opp05 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <1075000 1075000 1250000>; + }; + opp06 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <1150000 1150000 1250000>; + }; + }; + + gpu_opp_table: opp-table2 { + compatible = "operating-points-v2"; + + opp00 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <875000 875000 1150000>; + }; + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <875000 875000 1150000>; + }; + opp02 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <875000 875000 1150000>; + }; + opp03 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <975000 975000 1150000>; + }; + }; +}; + +&cpu_l0 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_l1 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_l2 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_l3 { + operating-points-v2 = <&cluster0_opp>; +}; + +&cpu_b0 { + operating-points-v2 = <&cluster1_opp>; +}; + +&cpu_b1 { + operating-points-v2 = <&cluster1_opp>; +}; + +&gpu { + operating-points-v2 = <&gpu_opp_table>; +}; From patchwork Tue Aug 30 06:51:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 12958819 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 007D2ECAAA1 for ; Tue, 30 Aug 2022 06:52:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=IY+CBxog5NfmKalpHKJPilxyXHk7oHdIDesOS+xm8HQ=; b=MJd33aGgxLx3DO ZJo6AcsNheNDoyoyf1psAdxeUmp5pK3trSY/hJ0b2dPGVXdcgkSw48bCINBfbpFKozJtnWEjc+rAv PRSiOYgSaC79nse0cpjyPz9zbQGw7GJburW95N/HE/kISUjK7iSliIgmaOGgTYQ2u9a/uMrbq4Zxc JwVltBUSsI5DXWO4vZPxWAqAVUNQXRElDM9el/RKu3JlD/p1LYtxcI6xPV2V/ETgQeFU8MroCuAlw BGL9p+/NWyhRLy+h2DcHS2YKz27IZ8iLGBp0ZgIh9mnThLq1OEsfTCoZLz2ooK0W8c4HWQ7gjN9vO uqf9M2Sp6fzK+BOvrtFg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oSv6v-00EYbX-IJ; Tue, 30 Aug 2022 06:52:33 +0000 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oSv6U-00EYMx-KR for linux-rockchip@lists.infradead.org; Tue, 30 Aug 2022 06:52:10 +0000 Received: by mail-pg1-x534.google.com with SMTP id b196so146690pga.7 for ; Mon, 29 Aug 2022 23:52:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=HN8W/ao1oDMk7Qu/3pfC3YhFdv1m1iKqT7yLZB4R+J8=; b=bX3OIOzWuzvjj405LZTvhJM+JKgT6V9DPj439RnYbfLgFkREEif+RMI11YM1R2vaO0 5oXJjvaCBJZmj5ALMhadfQC2aDu1X8ic/L83Gcg4pi91jGXLYxsny68b5dM036B7AI0L /7fIwFfb5e1eddnbm4wY59cgsbpc8MQmBnAaQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=HN8W/ao1oDMk7Qu/3pfC3YhFdv1m1iKqT7yLZB4R+J8=; b=A9DqDzoSDcb5xwLU3MCoFTtlao/hQi2P0gFXzO7yL6Zmzp/1tI7oxNwk+VUaWxuPp4 SIkndBmGRkFhnUomEkzB27EpaTxqbkxFtWePMDFbtyB6cAOIfvUsNbW5vell+/Tjgv0x W0ojG1WuOF2nb5si/UtNXXUXQYlo6HGH49ZZW8ZzZgVZ8XK2T95EAPWzrnw609N2N07b gcHGlbCpfCLMB6RMhmu2t1NuZoGlUjagoQDFiHY7fM5Yco/qGQHMiZYbdmgiwqp9hikt +xCYnOSIytvnGrZ1tNbUc3d6ZHbqQCdqxHIzhp1Rr1bXPZix8F1Ra/r2DHTK+a5W0Bf6 1PGA== X-Gm-Message-State: ACgBeo1azDmJhl3YcvRTweaqmLSiNXLFWn+9DWWA32zlNX5y+f0qoGcD TEPXqH+A7Wf47O7E7MO1GcY+Hw== X-Google-Smtp-Source: AA6agR7QcghtZQ8PLGTEAOzPun2/fs83IR0DhxjSnPMtqDmsguddSICQKYN7idmJTJKoxA0D8V/NYg== X-Received: by 2002:a63:1043:0:b0:429:fd41:b7cb with SMTP id 3-20020a631043000000b00429fd41b7cbmr16467075pgq.442.1661842324781; Mon, 29 Aug 2022 23:52:04 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c00a:a073:8d7b:a73a:5272:1b81]) by smtp.gmail.com with ESMTPSA id x14-20020a1709027c0e00b0016c78f9f024sm8854460pll.104.2022.08.29.23.52.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Aug 2022 23:52:04 -0700 (PDT) From: Jagan Teki To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski Cc: FUKAUMI Naoki , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki , Stephen Chen , Manoj Sai Subject: [PATCH v3 3/3] arm64: dts: rockchip: rk3399: Radxa ROCK 4C+ Date: Tue, 30 Aug 2022 12:21:19 +0530 Message-Id: <20220830065119.120844-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220830065119.120844-1-jagan@amarulasolutions.com> References: <20220830065119.120844-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220829_235207_026573_055F2D4B X-CRM114-Status: GOOD ( 16.53 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add support for Radxa ROCK 4C+ SBC. Key differences of 4C+ compared to previous ROCK Pi 4. - Rockchip RK3399-T SoC - DP from 4C replaced with micro HDMI 2K@60fps - 4-lane MIPI DSI with 1920*1080 - RK817 Audio codec Also, an official naming convention from Radxa mention to remove Pi from board name, so this 4C+ is named as Radxa ROCK 4C+ not Radxa ROCK Pi 4C+. Signed-off-by: Stephen Chen Signed-off-by: Manoj Sai Signed-off-by: Jagan Teki --- Changes for v3: - updated commit message - include sdhci in aliases - add i2s2 - add sdmmc cd-gpios - use rk3399-t-opp.dtsi Changes for v2: - s/vcc-sys/vcc5v0-sys-regulator - used proper node name 'regulator' for syr828 regulator nodes. - fix line wrapping. arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3399-rock-4c-plus.dts | 647 ++++++++++++++++++ 2 files changed, 648 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index ef79a672804a..f92637eb6f90 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -46,6 +46,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-plus.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-4c-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts new file mode 100644 index 000000000000..33c5976d158e --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts @@ -0,0 +1,647 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd + * Copyright (c) 2019 Radxa Limited + * Copyright (c) 2022 Amarula Solutions(India) + */ + +/dts-v1/; +#include "rk3399.dtsi" +#include "rk3399-t-opp.dtsi" + +/ { + model = "Radxa ROCK 4C+"; + compatible = "radxa,rock-4c-plus", "rockchip,rk3399"; + + aliases { + mmc0 = &sdmmc; + mmc1 = &sdhci; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk809 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc5v0_host1: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-name = "vcc5v0_host1"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_host0_s0>; + }; + + vcc5v0_typec: vcc5v0-typec-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_typec0_en>; + regulator-name = "vcc5v0_typec"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_lan: vcc3v3-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_lan"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x2a>; + rx_delay = <0x21>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c3>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "okay"; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + i2c-scl-falling-time-ns = <30>; + i2c-scl-rising-time-ns = <180>; + clock-frequency = <400000>; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio1>; + interrupts = ; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc_buck5>; + vcc6-supply = <&vcc_buck5>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc5v0_sys>; + + regulators { + vdd_log: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_log"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_cpu_l"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-initial-mode = <0x2>; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc3v3_sys: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x2>; + regulator-name = "vcc3v3_sys"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_buck5: DCDC_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_buck5"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_0v9: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vcca_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc0v9_soc: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vcc0v9_soc"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vcca_1v8: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_mipi: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc_mipi"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc_1v5"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v0: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc_3v0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_cam: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_cam"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc5v0_host0_s0: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc5v0_host0_s0"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + lcd_3v3: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "lcd_3v3"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + regulator-compatible = "fan53555-reg"; + pinctrl-0 = <&vsel1_gpio>; + vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + regulator-compatible = "fan53555-reg"; + pinctrl-0 = <&vsel2_gpio>; + vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + regulator-initial-mode = <1>; /* 1:force PWM 2:auto */ + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2s2 { + status = "okay"; +}; + +&io_domains { + bt656-supply = <&vcc_3v0>; + gpio1830-supply = <&vcc_3v0>; + sdmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&pinctrl { + bt { + bt_enable_h: bt-enable-h { + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_host_wake_l: bt-host-wake-l { + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_l: bt-wake-l { + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_gpio: vsel1-gpio { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdmmc { + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = <4 8 1 &pcfg_pull_up_8ma>, + <4 9 1 &pcfg_pull_up_8ma>, + <4 10 1 &pcfg_pull_up_8ma>, + <4 11 1 &pcfg_pull_up_8ma>; + }; + + sdmmc_clk: sdmmc-clk { + rockchip,pins = <4 12 1 &pcfg_pull_none_18ma>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = <4 13 1 &pcfg_pull_up_8ma>; + }; + }; + + usb-typec { + vcc5v0_typec0_en: vcc5v0-typec-en { + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + wifi { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wifi_host_wake_l: wifi-host-wake-l { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + pmu1830-supply = <&vcc_3v0>; + status = "okay"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vcc_1v8>; +}; + +&sdhci { + max-frequency = <150000000>; + bus-width = <8>; + mmc-hs400-1_8v; + supports-emmc; + non-removable; + mmc-hs400-enhanced-strobe; + status = "okay"; +}; + +&sdio0 { + #address-cells = <1>; + #size-cells = <0>; + bus-width = <4>; + clock-frequency = <50000000>; + cap-sdio-irq; + cap-sd-highspeed; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; + sd-uhs-sdr104; + status = "okay"; + + brcmf: wifi@1 { + compatible = "brcm,bcm4329-fmac"; + reg = <1>; + interrupt-parent = <&gpio0>; + interrupts = ; + interrupt-names = "host-wake"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_host_wake_l>; + }; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <800>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&tcphy1 { + status = "okay"; +}; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc5v0_host1>; + status = "okay"; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc5v0_host1>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm4345c5"; + clocks = <&rk809 1>; + clock-names = "lpo"; + device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; + max-speed = <1500000>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; + vbat-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc_1v8>; + }; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + extcon = <&u2phy0>; + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; + dr_mode = "host"; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +};