From patchwork Thu Sep 1 10:17:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 12962239 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F4FBECAAD3 for ; Thu, 1 Sep 2022 10:19:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232374AbiIAKTH (ORCPT ); Thu, 1 Sep 2022 06:19:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39600 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231443AbiIAKTF (ORCPT ); Thu, 1 Sep 2022 06:19:05 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB4C813418F; Thu, 1 Sep 2022 03:19:04 -0700 (PDT) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2819cEEX003472; Thu, 1 Sep 2022 10:18:56 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=qcppdkim1; bh=qS26eoGYtM3IcSGsZUsPpBd5i9/TOIqrcxtJBkrGh0c=; b=AfeOoVgJvMzCwpOGBXDGXb9JNtYrfZE1BdchliKi54ClJdQ2iIK+EeIOwrjpnut9DY4D NRihIc6mIiQx6MiMQAdt8pehi/+fL55Rd3Hr3X+pIotwzSxbB5eIm/jvMSlOkz+NUDS4 wtEPyuhuzcWhvxVYBzNREmBRRZ3fiIB8RMMirsCUWq+lszyQgoqik0DMm9N8LQXvd+aZ l/v8Lxh+iQeytHTymWI2Kjpknlka3Dg+6rQaei11gXQrjqPAb+oay9+Pkp4GPaSFBxMN hkvGqkwfDyGNgDb0QiJA19CPadC5aN6uKD+udW0cIWN2BIMtNOpNON1INe6hsOgaWe+C Gw== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jarc80dej-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 01 Sep 2022 10:18:56 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 281AItjg008396 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 1 Sep 2022 10:18:55 GMT Received: from blr-ubuntu-173.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Thu, 1 Sep 2022 03:18:50 -0700 From: Rajendra Nayak To: , , , , , CC: , , , , , , "Rajendra Nayak" , AngeloGioacchino Del Regno Subject: [PATCH 1/3] clk: qcom: gdsc: Fix the handling of PWRSTS_RET support Date: Thu, 1 Sep 2022 15:47:54 +0530 Message-ID: <20220901101756.28164-1-quic_rjendra@quicinc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: gWh9pBeloEVVZkeVRrPfB-vWvdFEAK64 X-Proofpoint-GUID: gWh9pBeloEVVZkeVRrPfB-vWvdFEAK64 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-09-01_06,2022-08-31_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 adultscore=0 mlxlogscore=987 lowpriorityscore=0 malwarescore=0 clxscore=1011 priorityscore=1501 spamscore=0 mlxscore=0 impostorscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2209010046 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org GDSCs cannot be transitioned into a Retention state in SW. When either the RETAIN_MEM bit, or both the RETAIN_MEM and RETAIN_PERIPH bits are set, and the GDSC is left ON, the HW takes care of retaining the memory/logic for the domain when the parent domain transitions to low power state. The existing logic handling the PWRSTS_RET seems to set the RETAIN_MEM/RETAIN_PERIPH bits but then explicitly turns the GDSC OFF as part of _gdsc_disable(). Fix that by leaving the GDSC in ON state. Signed-off-by: Rajendra Nayak Cc: AngeloGioacchino Del Regno --- There are a few existing users of PWRSTS_RET and I am not sure if they would be impacted with this change 1. mdss_gdsc in mmcc-msm8974.c, I am expecting that the gdsc is actually transitioning to OFF and might be left ON as part of this change, atleast till we hit system wide low power state. If we really leak more power because of this change, the right thing to do would be to update .pwrsts for mdss_gdsc to PWRSTS_OFF_ON instead of PWRSTS_RET_ON I dont have a msm8974 hardware, so if anyone who has can report any issues I can take a look further on how to fix it. 2. gpu_gx_gdsc in gpucc-msm8998.c and gpu_gx_gdsc in gpucc-sdm660.c Both of these seem to add support for 3 power state OFF, RET and ON, however I dont see any logic in gdsc driver to handle 3 different power states. So I am expecting that these are infact just transitioning between ON and OFF and RET state is never really used. The ideal fix for them would be to just update their resp. .pwrsts to PWRSTS_OFF_ON only. drivers/clk/qcom/gdsc.c | 10 ++++++++++ drivers/clk/qcom/gdsc.h | 5 +++++ 2 files changed, 15 insertions(+) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index d3244006c661..ccf63771e852 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -368,6 +368,16 @@ static int _gdsc_disable(struct gdsc *sc) if (sc->pwrsts & PWRSTS_OFF) gdsc_clear_mem_on(sc); + /* + * If the GDSC supports only a Retention state, apart from ON, + * leave it in ON state. + * There is no SW control to transition the GDSC into + * Retention state. This happens in HW when the parent + * domain goes down to a Low power state + */ + if (sc->pwrsts == PWRSTS_RET_ON) + return 0; + ret = gdsc_toggle_logic(sc, GDSC_OFF); if (ret) return ret; diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index 5de48c9439b2..981a12c8502d 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -49,6 +49,11 @@ struct gdsc { const u8 pwrsts; /* Powerdomain allowable state bitfields */ #define PWRSTS_OFF BIT(0) +/* + * There is no SW control to transition a GDSC into + * PWRSTS_RET. This happens in HW when the parent + * domain goes down to a low power state + */ #define PWRSTS_RET BIT(1) #define PWRSTS_ON BIT(2) #define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON) From patchwork Thu Sep 1 10:17:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 12962240 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA10DECAAD1 for ; Thu, 1 Sep 2022 10:19:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233544AbiIAKTM (ORCPT ); Thu, 1 Sep 2022 06:19:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233511AbiIAKTK (ORCPT ); Thu, 1 Sep 2022 06:19:10 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4AD871341AC; Thu, 1 Sep 2022 03:19:06 -0700 (PDT) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2819qrP6030547; Thu, 1 Sep 2022 10:19:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=25BsbImCtNnWO9lR4e02OF0eGNR2JnOck8+12wHkKlk=; b=e0geCy1Eec5wsb7aVWfCypewTi4rs0roUwo8an1g7ZtzzbMQvM9BCasN/9bzFTGtk2AK MetAXzny4ncJXJuO5UHHtX9Ffx8PY2N75JH4WGpYyhhJ8LKP1GPIzD8UpTxlWZIPltNw txRSl/xu9m94Aiw3Uks1c5qgrWDteKrxgUIQEGU2JBvgncF25hu8vWlL7xePRnKxWTkK HFr9KaE2TJoaFlSk8O8Q0KftDve1eTJ89v9eluVEY+bNZ7TgNXR9srcGqjWAdeVKCMJN Jp4b3qilMby7A5Wrs0SdM99d6ZqQ5H3+8sN5EGeUmGMgdT2NSj+bhOYr6pXVCdQJznr0 DA== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3ja79kkkbx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 01 Sep 2022 10:19:00 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 281AIxOJ021822 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 1 Sep 2022 10:18:59 GMT Received: from blr-ubuntu-173.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Thu, 1 Sep 2022 03:18:55 -0700 From: Rajendra Nayak To: , , , , , CC: , , , , , , "Rajendra Nayak" Subject: [PATCH 2/3] clk: qcom: gcc-sc7180: Update the .pwrsts for usb gdsc Date: Thu, 1 Sep 2022 15:47:55 +0530 Message-ID: <20220901101756.28164-2-quic_rjendra@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220901101756.28164-1-quic_rjendra@quicinc.com> References: <20220901101756.28164-1-quic_rjendra@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 9shRz_gaalxWQ0BXgFljjMY3K8JrzI-F X-Proofpoint-ORIG-GUID: 9shRz_gaalxWQ0BXgFljjMY3K8JrzI-F X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-09-01_06,2022-08-31_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 adultscore=0 mlxscore=0 malwarescore=0 suspectscore=0 impostorscore=0 priorityscore=1501 phishscore=0 mlxlogscore=816 bulkscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2209010046 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org USB on sc7180 cannot support wakeups from low power states if the GDSC is turned OFF. Update the .pwrsts for usb GDSC so it only transitions to RET in low power. Signed-off-by: Rajendra Nayak Reviewed-by: Matthias Kaehlcke Tested-by: Matthias Kaehlcke --- drivers/clk/qcom/gcc-sc7180.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c index c2ea09945c47..2d3980251e78 100644 --- a/drivers/clk/qcom/gcc-sc7180.c +++ b/drivers/clk/qcom/gcc-sc7180.c @@ -2224,7 +2224,7 @@ static struct gdsc usb30_prim_gdsc = { .pd = { .name = "usb30_prim_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, }; static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = { From patchwork Thu Sep 1 10:17:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 12962241 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C63CFECAAD3 for ; Thu, 1 Sep 2022 10:19:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231443AbiIAKTZ (ORCPT ); Thu, 1 Sep 2022 06:19:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233850AbiIAKTQ (ORCPT ); Thu, 1 Sep 2022 06:19:16 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 103CB1341AC; Thu, 1 Sep 2022 03:19:14 -0700 (PDT) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2819cuC3029282; Thu, 1 Sep 2022 10:19:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=nl5+N5w0Gna+ISLk8Iq0ey7nUfQ71lyNsOwGjTLa1dg=; b=aTAv03bukRKYkpG5NxA0M5pBOA+EqDgr8/JiW/HbhiwM8UvVMnheoGgTXrGPsxKCmQHu 8LfOHaJngMwYvYpBcsIei6taH+etSRpPbBy8f1fzpD4ed22d4zUKvGakY+m6Y7lbPkWN T8eYZ+C7ztxQPTGYw7j7xLI0G4asKGUx7I73Gwt0LslElOm0MLsXfqQJBbSbswJjyelJ cre8kHNhGMG9OIiGDhE31H6eWNDR9MC1pIS7SmRhHBgVMxaviwKch+N2z6flryHx7QWG vIdrjJclxVhVXGIYAsArs9pLe87OOADlcT9EJhJXKyR7v44qNlPDar7Cde4y24jf9CRZ ow== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jab5gk3qc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 01 Sep 2022 10:19:04 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 281AJ4Ro028316 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 1 Sep 2022 10:19:04 GMT Received: from blr-ubuntu-173.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Thu, 1 Sep 2022 03:18:59 -0700 From: Rajendra Nayak To: , , , , , CC: , , , , , , "Rajendra Nayak" Subject: [PATCH 3/3] clk: qcom: gcc-sc7280: Update the .pwrsts for usb gdsc Date: Thu, 1 Sep 2022 15:47:56 +0530 Message-ID: <20220901101756.28164-3-quic_rjendra@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220901101756.28164-1-quic_rjendra@quicinc.com> References: <20220901101756.28164-1-quic_rjendra@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Ezx6QdFwmhD9B6LfbBEweLcoczIxVoJo X-Proofpoint-GUID: Ezx6QdFwmhD9B6LfbBEweLcoczIxVoJo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-09-01_07,2022-08-31_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 mlxlogscore=760 bulkscore=0 spamscore=0 mlxscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 adultscore=0 phishscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2209010046 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org USB on sc7280 cannot support wakeups from low power states if the GDSC is turned OFF. Update the .pwrsts for usb GDSC so it only transitions to RET in low power. Signed-off-by: Rajendra Nayak Reviewed-by: Matthias Kaehlcke Tested-by: Matthias Kaehlcke --- drivers/clk/qcom/gcc-sc7280.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c index 7ff64d4d5920..de29a034e725 100644 --- a/drivers/clk/qcom/gcc-sc7280.c +++ b/drivers/clk/qcom/gcc-sc7280.c @@ -3126,7 +3126,7 @@ static struct gdsc gcc_usb30_prim_gdsc = { .pd = { .name = "gcc_usb30_prim_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = VOTABLE, };