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Niedermayr" To: , CC: , , , Subject: [PATCH 1/3] memory: omap-gpmc: allow shared wait pins Date: Thu, 1 Sep 2022 14:41:42 +0200 Message-ID: <20220901124144.1006238-2-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901124144.1006238-1-benedikt.niedermayr@siemens.com> References: <20220901124144.1006238-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [139.23.126.196] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC8WAA.ad011.siemens.net (139.25.226.104) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d28a166f-7e0f-4364-454f-08da8c175a73 X-MS-TrafficTypeDiagnostic: DB8PR10MB3161:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: xgELM1ex7b/1ByrLMCqmBVeZ3vtiL7KE67IpPgSC4dn6P1JxumZ5b6swsgs4iUBsqyu/nUJq7wDhpFtR2smDMKhMXtsNcVuHGgoz19jQzl0Xtqg3qBTPAXQqg+5Cl5Th+nxh8r8Xc9CH24WYY3SwcTeQOLilZodjY70azcNT6xWkYu67iuKN5uZBd+lAASFp9zLRrL1WRmO4hhMgE91cskHpmjizyO3zy8RkcKCq+85hHaSfwjAujntMkBDEAAp8sfR1PVwlMKl/QupSktJ5McZQVzH8cyZoq0TxXs9MugesB19dBOI30nYju+OdVdd34SVmjYM6rvkkYuc+NB0Ss3ARc9771lBMJxla46wX7rSJCGXykAqKloOwEooTAmpmZq9qNLFA9ghQvvZpk80fBqtvaxaLwfS5vJf71bVX2fRrmLsklPgwcsg5nLcjL4z8PRs5N5xWwSN816cLAhilICGrG2JPI0XAvew69cD70n3DLY0eVqCWVqN38xDR2YZxYpt0404rA17XScFglvHRJkuqHLZAesTnVQMy5ZWPK3uWkK6jZwY/bfbela/lW3fjYbTg4uFmqky4firs5w9s73rm2KsTxQ8Kw9lpT2LLEFjzM0JVvrfFoZfVVV3bV7JerSQ5K1b6RRxXoeMOdbdcAJCallp54451XoYDDqoO4zeJHtRHrfJBJyzxVAT1lxjvh9maqnDnsKNSoqhqHt+/c8MnOgg4xm+6FrDOGgcqOswwC/ZDMIIizyqrIXyTouusTgjaulfjqQrfx5m2wW650bxyw8RW+t7M7y5Q18B6go8y/iECocUOov+Gtdv0IFgV X-Forefront-Antispam-Report: CIP:194.138.21.76;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(396003)(376002)(136003)(346002)(39860400002)(36840700001)(46966006)(40470700004)(82310400005)(83380400001)(82960400001)(40480700001)(82740400003)(110136005)(316002)(4326008)(8676002)(70586007)(478600001)(70206006)(54906003)(36756003)(6666004)(1076003)(8936002)(41300700001)(16526019)(336012)(86362001)(2616005)(5660300002)(956004)(47076005)(186003)(40460700003)(81166007)(36860700001)(356005)(26005)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Sep 2022 12:41:55.5518 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d28a166f-7e0f-4364-454f-08da8c175a73 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.76];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR01FT074.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR10MB3161 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Newer kernels refuse to probe when using the same wait pin for different chipselect regions. But this may be a usecase when connecting for example FPGA or ASIC modules to the gpmc, which only got one wait pin installed. Signed-off-by: Benedikt Niedermayr --- drivers/memory/omap-gpmc.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index d9bf1c2ac319..e3674a15b934 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -2221,9 +2221,13 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, GPIO_ACTIVE_HIGH, GPIOD_IN); if (IS_ERR(waitpin_desc)) { - dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); ret = PTR_ERR(waitpin_desc); - goto err; + if (ret == -EBUSY) { + dev_info(&pdev->dev, "shared wait-pin: %d\n", wait_pin); + } else { + dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); + goto err; + } } } From patchwork Thu Sep 1 12:41:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benedikt Niedermayr X-Patchwork-Id: 12962411 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D64FC0502C for ; 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Thu, 1 Sep 2022 14:41:54 +0200 From: "B. Niedermayr" To: , CC: , , , Subject: [PATCH 2/3] memory: omap-gpmc: add support for wait pin polarity Date: Thu, 1 Sep 2022 14:41:43 +0200 Message-ID: <20220901124144.1006238-3-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901124144.1006238-1-benedikt.niedermayr@siemens.com> References: <20220901124144.1006238-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [139.23.126.196] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC8WAA.ad011.siemens.net (139.25.226.104) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 4e401abb-038e-40a8-0e68-08da8c175ab9 X-MS-TrafficTypeDiagnostic: AS2PR10MB7081:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: dOsQP/M/+TJlJJWYfguzPUc+tviEooLp/Ky5wajvwYKx8cbxYnsEmUlCS5/WPOgk2+4bmrV6ygeGvOKndRvXyDubJJr5qQuJvr4cPO1vKM8r+faeBuI0gMwgnRd6DEpHGxW/LW1AXFFdsxvXCqUqt+B0wgc1BwoZgk8sloBGqwMSsyazHrqm3RzpH1LXOQqK/njM6mjIizNMpTTR7NS9UusCsQstJegL/wpkky6P0FPNYubE9oSTwoIjSCtAFrWhU0chsdoRKzVIYmsw+VVjGSTaBUl3r8sX0KPR0ojpaqX3AkUSvCVsJ9q4+2Qb07xDe0sHJPLfr9669qRYMJqJ97mj9dHvMBJ6rkMsenY8v/y64t1vDnQfRddul8MLBQ0IkQKvzrWQTx4IsxDfzLvvMkJ0FZ/xMUmawg1jlppgcwhXznkYyzQFcby0rTWlPqIS75GFwSBiDxgA4D6SuPl07ehbS2AR/zQSReinGohGO0BQk1qc+tPUtv3IHEZwydmfXSQe7LfH2IaM4X66oqjvsAHU/FK0gtMU+nMogWD1opZex2Xde5YPYxth3rja+VBJCWWv6Vg8pGSaMfFspXNPRZdDm/sahw7I2DTSfKDN8dDI6ucmlvuNQ+4KDcarazbJYbaVtwKktiSb73eCxfeseNk3zt6efu7evbKGiF97qV6jPW5yTDXDLlZ2VB0s5ugfWlQdHrah1aJZndrJ1T0IO+KLlEZexpQ+y/gCzo91CQWGyIGIee2Ab286+4y8bo8dCEh0dsIfzbIT3yQ2wzmsJcS+Weqg4mRP/EZyJ7ICLSqj/H4dyRsFzOFFsD13rEs7 X-Forefront-Antispam-Report: CIP:194.138.21.75;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(346002)(136003)(39860400002)(396003)(376002)(36840700001)(40470700004)(46966006)(26005)(82960400001)(82740400003)(41300700001)(82310400005)(6666004)(86362001)(81166007)(478600001)(40480700001)(36860700001)(40460700003)(47076005)(186003)(70206006)(1076003)(16526019)(4326008)(2616005)(356005)(336012)(83380400001)(956004)(2906002)(8676002)(54906003)(70586007)(110136005)(36756003)(316002)(5660300002)(8936002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Sep 2022 12:41:55.9466 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4e401abb-038e-40a8-0e68-08da8c175ab9 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.75];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: HE1EUR01FT010.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR10MB7081 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Setting the wait pin polarity from the device tree is currently not possible. The device tree property "gpmc,wait-pin-polarity" can be used for that. If this property is missing the previous default value is used instead, which preserves backwards compatibility. The wait pin polarity is then set via the gpiochip direction_input callback function. Signed-off-by: Benedikt Niedermayr --- drivers/memory/omap-gpmc.c | 30 ++++++++++++++++++++----- include/linux/platform_data/gpmc-omap.h | 1 + 2 files changed, 26 insertions(+), 5 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index e3674a15b934..5d1948179471 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -33,6 +33,8 @@ #include +#include "../gpio/gpiolib.h" + #define DEVICE_NAME "omap-gpmc" /* GPMC register offsets */ @@ -1985,6 +1987,11 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) "gpmc,wait-on-read"); p->wait_on_write = of_property_read_bool(np, "gpmc,wait-on-write"); + p->wait_pin_polarity = of_property_read_u32(np, + "gpmc,wait-pin-polarity", + &p->wait_pin_polarity); + if (p->wait_pin_polarity < 0) + p->wait_pin_polarity = GPIO_ACTIVE_HIGH; if (!p->wait_on_read && !p->wait_on_write) pr_debug("%s: rd/wr wait monitoring not enabled!\n", __func__); @@ -2216,10 +2223,11 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, if (gpmc_s.wait_on_read || gpmc_s.wait_on_write) { unsigned int wait_pin = gpmc_s.wait_pin; - waitpin_desc = gpiochip_request_own_desc(&gpmc->gpio_chip, - wait_pin, "WAITPIN", - GPIO_ACTIVE_HIGH, - GPIOD_IN); + waitpin_desc = + gpiochip_request_own_desc(&gpmc->gpio_chip, + wait_pin, "WAITPIN", + gpmc_s.wait_pin_polarity ? GPIO_ACTIVE_HIGH : GPIO_ACTIVE_LOW, + GPIOD_IN); if (IS_ERR(waitpin_desc)) { ret = PTR_ERR(waitpin_desc); if (ret == -EBUSY) { @@ -2348,7 +2356,19 @@ static int gpmc_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) static int gpmc_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) { - return 0; /* we're input only */ + u32 reg; + struct gpio_desc *desc = gpiochip_get_desc(chip, offset); + + offset += 8; + reg = gpmc_read_reg(GPMC_CONFIG); + + if (BIT(FLAG_ACTIVE_LOW) & desc->flags) + reg &= ~BIT(offset); + else + reg |= BIT(offset); + + gpmc_write_reg(GPMC_CONFIG, reg); + return 0; } static int gpmc_gpio_direction_output(struct gpio_chip *chip, diff --git a/include/linux/platform_data/gpmc-omap.h b/include/linux/platform_data/gpmc-omap.h index c9cc4e32435d..bf4f2246f31d 100644 --- a/include/linux/platform_data/gpmc-omap.h +++ b/include/linux/platform_data/gpmc-omap.h @@ -149,6 +149,7 @@ struct gpmc_settings { u32 device_width; /* device bus width (8 or 16 bit) */ u32 mux_add_data; /* multiplex address & data */ u32 wait_pin; /* wait-pin to be used */ + u32 wait_pin_polarity; /* wait-pin polarity */ }; /* Data for each chip select */ From patchwork Thu Sep 1 12:41:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benedikt Niedermayr X-Patchwork-Id: 12962413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 322FCECAAD1 for ; Thu, 1 Sep 2022 12:42:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233013AbiIAMmY (ORCPT ); Thu, 1 Sep 2022 08:42:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231530AbiIAMmX (ORCPT ); Thu, 1 Sep 2022 08:42:23 -0400 Received: from EUR03-AM7-obe.outbound.protection.outlook.com (mail-am7eur03on2066.outbound.protection.outlook.com [40.107.105.66]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 302C06355; 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Niedermayr" To: , CC: , , , Subject: [PATCH 3/3] dt-bindings: memory-controllers: gpmc-child: Add binding for wait-pin-polarity Date: Thu, 1 Sep 2022 14:41:44 +0200 Message-ID: <20220901124144.1006238-4-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901124144.1006238-1-benedikt.niedermayr@siemens.com> References: <20220901124144.1006238-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [139.23.126.196] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC8WBA.ad011.siemens.net (139.25.226.105) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 4599c037-16dc-461f-bd7d-08da8c1768d2 X-MS-TrafficTypeDiagnostic: GV1PR10MB5842:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bQkGJESgLZrPI5kqFhRdACJONVHHOIO4w7VNrmXP2viXrCzMk3SE9618wMczfM5EByHzzQAj2pXHlW9Er1Nc0d/ERI24P1o5vNmspWM1Mcl9Z41sgbjj5bZEZ96L/q8ffN3xAzBc9h0Ldj2ErgEV64rdcAuKchNknKG05lOJMPAF3IZGYCa4QIxwPQI9NYW5lBe2qah4EyKxUaJJea92stqY9hSIf4Now49tOg9l6DgO/S6XnRsGALymgGFo/obJ+0zF/6zJwL1stHGrOip+asFCQHRedOe9n3NtEIrPkkbyzc9oO3unv83QObj3/vA8FD8037U6ZzCQew/lFHtsjGFE9TuefBJqAtnDYoMXzCaRRZXlviySUA6Cpu4BBKhKx8cQGhgnG9pxH1uWPIQG6xYkiShiHXYnEGkdPXY7uUaURcdYjGyw2dQ+NXXAxRwX++2OXsvYHZGhfAMpet9IBbDoWIctlcrhUOmN3O4GbO0wjDbbtp0H1dtpJqozD73n6ZxlFBepz5msckDRf03bEqTQiqOuJeJIwwdK0wYvsZQC27gMiu70DH5r6NnvOmhQ0d8PRZ/rWnCPWJom3GOk1H2oAY7L6ZIuu33y5hD+ERba/3TXdm6wjQoAE9GAQw/n14FXw/wwfpFK8uIgfVUXk57XvhTEkaOVXF9dfP45f+G3IBgzclTxqfThBAHUuCW1lxCzN6msjxrN+v8ek73Jec0Bl0oTb1TzQyc9WrKfk12jkvGPO1Orwcc5L+P80FHFcIaOKpYBhqOr3LDVRqP+mFZPXf1RbJB8k5FmDE2cKsIBqOKBEN21VE3WJ3joGAcH X-Forefront-Antispam-Report: CIP:194.138.21.75;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(136003)(396003)(39860400002)(376002)(346002)(36840700001)(46966006)(40470700004)(16526019)(47076005)(356005)(956004)(36756003)(81166007)(82310400005)(336012)(1076003)(186003)(54906003)(316002)(110136005)(478600001)(2616005)(70206006)(4326008)(8676002)(70586007)(40460700003)(26005)(41300700001)(5660300002)(8936002)(86362001)(2906002)(6666004)(82740400003)(40480700001)(82960400001)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Sep 2022 12:42:19.6030 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4599c037-16dc-461f-bd7d-08da8c1768d2 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.75];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: HE1EUR01FT055.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR10MB5842 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Add a new dt-binding for the wait-pin-polarity property Signed-off-by: Benedikt Niedermayr --- .../bindings/memory-controllers/ti,gpmc-child.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml index 6e3995bb1630..7c721206f10b 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml @@ -230,6 +230,13 @@ properties: Wait-pin used by client. Must be less than "gpmc,num-waitpins". $ref: /schemas/types.yaml#/definitions/uint32 + gpmc,wait-pin-polarity: + description: | + Wait-pin polarity used by the clien. It relates to the pin defined + with "gpmc,wait-pin". + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + gpmc,wait-on-read: description: Enables wait monitoring on reads. type: boolean