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Niedermayr" To: , CC: , , , Subject: [PATCH v2 1/3] memory: omap-gpmc: allow shared wait pins Date: Mon, 5 Sep 2022 09:17:15 +0200 Message-ID: <20220905071717.1500568-2-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220905071717.1500568-1-benedikt.niedermayr@siemens.com> References: <20220905071717.1500568-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [139.21.146.182] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 838c1be6-dd4d-4481-3c2d-08da8f0eb090 X-MS-TrafficTypeDiagnostic: AS4PR10MB5174:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: uR0Lx1JKjz3aNhMf0+F16vef9umZZ7Kh3B5MLI63Pc6GK6yja4DoOLjiOC3BeWHfDwgKFFxNws1ANMQSzWn/ZqEGeSeLfdM9RPDxcZl6M6rWHsY2dgVNSZwyumilhJ+uXfL5bnd0RQEwe/njNNfZ4t5HMuoZA9OCS3hvGFA66ZXiMOGrBsBaK5TqVeCXuWC7cs3WUocOl0dV+K57HEBctZ/nBn4cZ6hbh31aMKd6OSydIItT+5EpSl2bRkhpXM9/l0Vq3CGaqt4vt/NXwTZqIx0n+bavLclH3mOt8YEQzweh9M3rDM/pF/C0pzAyyaFtQpWyujftqN6b3IGprJ936BvEsRQ1urheP7rQpkRSxioFbozXlexzD7/QoYnFX+N8f51drBKupP/iC8aKYUDdmZvEzfWmL5SEoQI4+A6CnSvpkYt7deH9w99C2lvT+oW9WDOd1pirneR6lkwACJTmG4bf/WqAI8z26xYR9eQYlGya+ZZRJ9VFioSvYN+30AloYEGQZXJEMOFJnxWgHF1R1a4lJTyzU4UWdo5LQcvfrM5dM2joTScqHer3KeiJyJG826UwYt3631XxSE2sHBjnO0aitOCcOYxod7ZU70H4odhCF8VyRZnBztb6rC8HYeuQBHvdNgEwkYdIYh/0As7ourG0FmyPRghLjLr1oXVaZxzRIF8v3B2QytcqdsYcPBn4Ynl3HHF+ygWVBEIaFP08Ndt5CH/EZivEt8nVI7WTldrbvZ5VjVGEkJUAEaa3+QpEsNh0DHOGJNEwV4/mFDJvoM3YZEHXOOw17KwYFIY5AyIuJqDKF6oM4AJXTRmDIDD9 X-Forefront-Antispam-Report: CIP:194.138.21.76;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(346002)(376002)(396003)(136003)(39860400002)(46966006)(36840700001)(40470700004)(478600001)(5660300002)(40460700003)(86362001)(8936002)(41300700001)(6666004)(82310400005)(40480700001)(81166007)(36860700001)(82740400003)(2906002)(83380400001)(956004)(110136005)(82960400001)(26005)(1076003)(2616005)(47076005)(186003)(356005)(336012)(54906003)(70206006)(36756003)(70586007)(8676002)(16526019)(316002)(4326008)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Sep 2022 07:17:28.0122 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 838c1be6-dd4d-4481-3c2d-08da8f0eb090 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.76];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR01FT015.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4PR10MB5174 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Newer kernels refuse to probe when using the same wait pin for different chipselect regions. But this may be a usecase when connecting for example FPGA or ASIC modules to the gpmc, which only got one wait pin installed. Signed-off-by: Benedikt Niedermayr --- drivers/memory/omap-gpmc.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index 2351f2708da2..579903457415 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -2215,9 +2215,13 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, GPIO_ACTIVE_HIGH, GPIOD_IN); if (IS_ERR(waitpin_desc)) { - dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); ret = PTR_ERR(waitpin_desc); - goto err; + if (ret == -EBUSY) { + dev_info(&pdev->dev, "shared wait-pin: %d\n", wait_pin); + } else { + dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); + goto err; + } } } From patchwork Mon Sep 5 07:17:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benedikt Niedermayr X-Patchwork-Id: 12965695 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 663A2C6FA86 for ; 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Mon, 5 Sep 2022 09:17:27 +0200 From: "B. Niedermayr" To: , CC: , , , Subject: [PATCH v2 2/3] memory: omap-gpmc: add support for wait pin polarity Date: Mon, 5 Sep 2022 09:17:16 +0200 Message-ID: <20220905071717.1500568-3-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220905071717.1500568-1-benedikt.niedermayr@siemens.com> References: <20220905071717.1500568-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [139.21.146.182] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 542e8b72-86b6-43f9-c5d7-08da8f0eb1a9 X-MS-TrafficTypeDiagnostic: AM7PR10MB3779:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 24KxJ/BOfR9E+WcGs5JG1m6RItWxuMAbMlJC2t4SVmll4wIZo2BGG6JrikkWtrBl434YWbnZxO24cb2VbX7KixktrTUCikQpmi3fWDOCHR0rHKjB20zvcDZ/fu18NZMHYZ5Zp2qhPKW7THZxP6EkHMED8jyugpfcIttXXXrIiERvWCPpuvYP79MPUdo3fZlzsc6SQGrsTC1nDWdz5EPx40IMRoQPse3fEVH5HZWtePR8eE46wzcXbjh0LKUOqTI8KsCllE8u6HE3msAYym+Bdl1VCZiH+a9QMM3o4DmfhDQTSF+UQJaiGZQm6S7BO4oayhY10wiD/3toZnKoBqF66ZviPHnKObnny4HsrlxlPb4o66VABBYPC2qeEbG+7dW6R0wAxT1MoZxgYj6Ljde9DhE0enLeNRH3mSIp3LFCsZvKwImxHlrWeorUjZg4PhXvvNRiurZ9XkcyRK+9IcrVkl9lHDr8i+r65hJIP7RC2OVXO1nk9+XatV00yHm0+lwh81Ub0uRIX7kQpQOLDHJDXux/sz84JV29m5+l3lB2EYViQp0WdIf2VbkJLSqXAwXW7zqmpmfVktJ3HGRjqhZKp/Jh4q84+mly80UpZbrpw8xqDKw8l97iw/A62SHs9jdTo2b2Yk+gVwyzr8v+s9Cy1aQvmWwS2S1Oh4nmp8igARbczXeVqKie1CHgZFLYOtWY2bj8WEGsxlAjCzWmptydIm91Adapo9rOHV7ne07ztZvr1vuhF2eUprmFf0xsFMVSIXmkqZpp4C3Z31nM0PGQqQDf4BDgVWUH0/eJBPbtpwMeNNOIHnW/C/97ovJ/unfd X-Forefront-Antispam-Report: CIP:194.138.21.75;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(39860400002)(136003)(376002)(396003)(346002)(36840700001)(40470700004)(46966006)(4326008)(83380400001)(8676002)(16526019)(336012)(47076005)(70586007)(70206006)(36860700001)(8936002)(5660300002)(478600001)(26005)(6666004)(41300700001)(1076003)(186003)(2616005)(956004)(86362001)(316002)(54906003)(82310400005)(110136005)(40480700001)(40460700003)(36756003)(81166007)(82740400003)(2906002)(82960400001)(356005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Sep 2022 07:17:29.8416 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 542e8b72-86b6-43f9-c5d7-08da8f0eb1a9 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.75];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: HE1EUR01FT091.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR10MB3779 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Setting the wait pin polarity from the device tree is currently not possible. The device tree property "gpmc,wait-pin-polarity" can be used for that. If this property is missing the previous default value is used instead, which preserves backwards compatibility. The wait pin polarity is then set via the gpiochip direction_input callback function. Signed-off-by: Benedikt Niedermayr --- drivers/memory/omap-gpmc.c | 30 ++++++++++++++++++++----- include/linux/platform_data/gpmc-omap.h | 1 + 2 files changed, 26 insertions(+), 5 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index 579903457415..be3c35ae9619 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -35,6 +35,8 @@ #include +#include "../gpio/gpiolib.h" + #define DEVICE_NAME "omap-gpmc" /* GPMC register offsets */ @@ -1980,6 +1982,11 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) "gpmc,wait-on-read"); p->wait_on_write = of_property_read_bool(np, "gpmc,wait-on-write"); + p->wait_pin_polarity = of_property_read_u32(np, + "gpmc,wait-pin-polarity", + &p->wait_pin_polarity); + if (p->wait_pin_polarity < 0) + p->wait_pin_polarity = GPIO_ACTIVE_HIGH; if (!p->wait_on_read && !p->wait_on_write) pr_debug("%s: rd/wr wait monitoring not enabled!\n", __func__); @@ -2210,10 +2217,11 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, if (gpmc_s.wait_on_read || gpmc_s.wait_on_write) { unsigned int wait_pin = gpmc_s.wait_pin; - waitpin_desc = gpiochip_request_own_desc(&gpmc->gpio_chip, - wait_pin, "WAITPIN", - GPIO_ACTIVE_HIGH, - GPIOD_IN); + waitpin_desc = + gpiochip_request_own_desc(&gpmc->gpio_chip, + wait_pin, "WAITPIN", + gpmc_s.wait_pin_polarity ? GPIO_ACTIVE_HIGH : GPIO_ACTIVE_LOW, + GPIOD_IN); if (IS_ERR(waitpin_desc)) { ret = PTR_ERR(waitpin_desc); if (ret == -EBUSY) { @@ -2342,7 +2350,19 @@ static int gpmc_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) static int gpmc_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) { - return 0; /* we're input only */ + u32 reg; + struct gpio_desc *desc = gpiochip_get_desc(chip, offset); + + offset += 8; + reg = gpmc_read_reg(GPMC_CONFIG); + + if (BIT(FLAG_ACTIVE_LOW) & desc->flags) + reg &= ~BIT(offset); + else + reg |= BIT(offset); + + gpmc_write_reg(GPMC_CONFIG, reg); + return 0; } static int gpmc_gpio_direction_output(struct gpio_chip *chip, diff --git a/include/linux/platform_data/gpmc-omap.h b/include/linux/platform_data/gpmc-omap.h index c9cc4e32435d..bf4f2246f31d 100644 --- a/include/linux/platform_data/gpmc-omap.h +++ b/include/linux/platform_data/gpmc-omap.h @@ -149,6 +149,7 @@ struct gpmc_settings { u32 device_width; /* device bus width (8 or 16 bit) */ u32 mux_add_data; /* multiplex address & data */ u32 wait_pin; /* wait-pin to be used */ + u32 wait_pin_polarity; /* wait-pin polarity */ }; /* Data for each chip select */ From patchwork Mon Sep 5 07:17:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benedikt Niedermayr X-Patchwork-Id: 12965697 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A43FDC6FA89 for ; Mon, 5 Sep 2022 07:22:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235759AbiIEHWK (ORCPT ); Mon, 5 Sep 2022 03:22:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235590AbiIEHVj (ORCPT ); Mon, 5 Sep 2022 03:21:39 -0400 Received: from EUR03-VE1-obe.outbound.protection.outlook.com (mail-eopbgr50081.outbound.protection.outlook.com [40.107.5.81]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A53D402FF; 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Niedermayr" To: , CC: , , , Subject: [PATCH v2 3/3] dt-bindings: memory-controllers: gpmc-child: Add binding for wait-pin-polarity Date: Mon, 5 Sep 2022 09:17:17 +0200 Message-ID: <20220905071717.1500568-4-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220905071717.1500568-1-benedikt.niedermayr@siemens.com> References: <20220905071717.1500568-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [139.21.146.182] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 084aee99-5654-4048-d3d6-08da8f0ebc50 X-MS-TrafficTypeDiagnostic: AS2PR10MB6774:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 9wTRfFmoT2tM/aIvRpfEMXd9+L32uV006k9xTuONFIU0BEUKSiqVcFDbn2oQVEOaplf9fDhWkWZOyJvkXDnjKMP6wTunerNawRJ6MgUEWHMEvAPT1FvCc53or14QRRigaEs9VFM1MpCczWYJW+VLMJxVFOHMhlo4KnriFrcbFC8gAEuJC2fSSK1xSznYwaJzzSehr+lws6X0tIxu1OzqVeA2ZQn+8K0XpALVi1B+8TWT/D15jseNGIwtHvUkCnpkiwePJpXqpc+ufylMpapfAIq7mpAOqBaDJx6EZtAGu/T2rQ+Fveg0kvT3KvgvB+uXcQbCp/Bc8k18lKPZvBaK4vqAX4YoNNflEoJTGPLLOScv9udYYM36+wujGjMz+aHTks83uLLvkSsRUuuHGhtygy9h9grv60kcE8aHPh1Ouq9ttuNWmxOOERyVYmXu+UVdVQZuqk4DDwfCTEOafRZqgE4ZLwzVEZmGczMBElgg47J7hXrlytSvsqQOic2eE+Lnms3T704K7e996AcZHXRw71DBod5MV+CdrULdc4kGkAJt8YhLRKmZ+y1urKMtLXy+hb+C9Lk0B6UPK9ZTdzu8FcnCpXhJicnKSL4tEr6ZX6z5CPXTeIs2A6v1EPuO4OvgaHSPdTNEClgeWkJUeHfR8Bh1dGpnDi6JKxcEelWQHrE/hqr0AfwXYniNy8p/bTQwao/Pfa528bcPH7ps58YK3xVpl0v5DkIbWfOLu/AwXJYbKuRVCoswb12yNC22fqe/mZlVluFciI/OmAmi94PwIw== X-Forefront-Antispam-Report: CIP:194.138.21.74;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:hybrid.siemens.com;CAT:NONE;SFS:(13230016)(4636009)(346002)(39860400002)(396003)(136003)(376002)(46966006)(40470700004)(36840700001)(5660300002)(478600001)(8676002)(70586007)(1076003)(956004)(2616005)(36860700001)(40480700001)(40460700003)(4326008)(82740400003)(26005)(2906002)(70206006)(7596003)(86362001)(82960400001)(356005)(47076005)(6666004)(82310400005)(110136005)(36756003)(316002)(54906003)(186003)(7636003)(336012)(41300700001)(16526019)(8936002);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Sep 2022 07:17:47.7449 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 084aee99-5654-4048-d3d6-08da8f0ebc50 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.74];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR01FT008.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR10MB6774 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Add a new dt-binding for the wait-pin-polarity property Signed-off-by: Benedikt Niedermayr --- .../bindings/memory-controllers/ti,gpmc-child.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml index 6e3995bb1630..7c721206f10b 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml @@ -230,6 +230,13 @@ properties: Wait-pin used by client. Must be less than "gpmc,num-waitpins". $ref: /schemas/types.yaml#/definitions/uint32 + gpmc,wait-pin-polarity: + description: | + Wait-pin polarity used by the clien. It relates to the pin defined + with "gpmc,wait-pin". + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + gpmc,wait-on-read: description: Enables wait monitoring on reads. type: boolean