From patchwork Tue Sep 6 06:45:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 12966934 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 876D0C38145 for ; Tue, 6 Sep 2022 06:49:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CB4A610E577; Tue, 6 Sep 2022 06:49:25 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id CE14410E576 for ; Tue, 6 Sep 2022 06:49:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662446962; x=1693982962; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=GIa3pF6CFaJ+bq0afS72RMxTTUm1EkHF0JFAvVtXsQY=; b=aHJe78HtkL2XRg1VaJu0UV6xp5y4WlmtCS9hUVA0QySDwZcDYbkQ5ofg T+z0sf+wgxDLAIZV37ilH9LQJiSKkAlq0Ojsvi7PT0D55OxdwbTV9CSFL sPGiv/706a7TfJ+K9Rs56zfTEFO6G3s9JJqV5s17ybeDZSFHUqT5/nMHI /bSTQcCUgSOtlOD1au/YQWlmkcFCGHJc63Qb4opXrWT7/AwQ3090AND5i 8/dx4bTlTbvZAxWGzHowGIvdDvQdNbjo5nRH8vNyVHmMdihQY+NC5BQxi OG+B2uFUJ3/uDt+m23AItcCvzAGUisaVE9iKWz3sXOom26wAVYCIpcA3k Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10461"; a="283514581" X-IronPort-AV: E=Sophos;i="5.93,293,1654585200"; d="scan'208";a="283514581" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Sep 2022 23:49:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,293,1654585200"; d="scan'208";a="675556875" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmsmga008.fm.intel.com with ESMTP; 05 Sep 2022 23:49:20 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Tue, 6 Sep 2022 12:15:43 +0530 Message-Id: <20220906064544.27586-1-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/2] drm/i915/pps: added get_pps_idx() hook as part of pps_get_register() cleanup X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Simplified pps_get_register() which use get_pps_idx() hook to derive the pps instance and get_pps_idx() will be initialized at pps_init(). Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_display_types.h | 2 ++ drivers/gpu/drm/i915/display/intel_pps.c | 12 ++++++------ 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 0da9b208d56e..95f71a572b07 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1723,6 +1723,8 @@ struct intel_dp { /* When we last wrote the OUI for eDP */ unsigned long last_oui_write; + + int (*get_pps_idx)(struct intel_dp *intel_dp); }; enum lspcon_vendor { diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c index 21944f5bf3a8..4e770218e29f 100644 --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -362,15 +362,10 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp, struct pps_registers *regs) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - int pps_idx = 0; + int pps_idx = intel_dp->get_pps_idx(intel_dp); memset(regs, 0, sizeof(*regs)); - if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) - pps_idx = bxt_power_sequencer_idx(intel_dp); - else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) - pps_idx = vlv_power_sequencer_pipe(intel_dp); - regs->pp_ctrl = PP_CONTROL(pps_idx); regs->pp_stat = PP_STATUS(pps_idx); regs->pp_on = PP_ON_DELAYS(pps_idx); @@ -1432,6 +1427,11 @@ void intel_pps_init(struct intel_dp *intel_dp) intel_dp->pps.initializing = true; INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work); + if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) + intel_dp->get_pps_idx = bxt_power_sequencer_idx; + else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) + intel_dp->get_pps_idx = vlv_power_sequencer_pipe; + pps_init_timestamps(intel_dp); with_intel_pps_lock(intel_dp, wakeref) { From patchwork Tue Sep 6 06:45:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 12966935 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E187ECAAA1 for ; Tue, 6 Sep 2022 06:49:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2469610E57D; Tue, 6 Sep 2022 06:49:29 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id B303B10E576 for ; Tue, 6 Sep 2022 06:49:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662446965; x=1693982965; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8jj7uRdpSDkSED9qm2Ip0CAMW2sUNCYeEccipf3PLro=; b=jFfrn+tox6Pv5cV/1CDXtnfPp84uki+CRHlnCBsN+pIST4HQ/Ya9H2U1 +XZD+B2ATKmMqPrD0NBAcDkVDrc3DPFW6waBVUvF4XhJSwSspY3tjth9v R6mnrPdapWBKS9mzZ9piERHO1t5CM0M1cEzLFK+C4Rh7XsMCdWjw3M0fZ 8IUS/6nBoNK+7XtpdcyBWXN9FdoksUZTKPVoikEVlJf9rsFLlaXKxAz4M +lzVOoHwhsPbmmKvBrnqYzc3M1sWNbq0ilz9HgX6jimtilKdBgQNg/5f+ BkPplVGnb/3eEGdTtCfS5+413kSdJiEqVnIQk/etquBU6NQ2jktuMDgng A==; X-IronPort-AV: E=McAfee;i="6500,9779,10461"; a="283514590" X-IronPort-AV: E=Sophos;i="5.93,293,1654585200"; d="scan'208,223";a="283514590" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Sep 2022 23:49:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,293,1654585200"; d="scan'208,223";a="675556907" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmsmga008.fm.intel.com with ESMTP; 05 Sep 2022 23:49:23 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Tue, 6 Sep 2022 12:15:44 +0530 Message-Id: <20220906064544.27586-2-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20220906064544.27586-1-animesh.manna@intel.com> References: <20220906064544.27586-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/2] drm/i915/pps: Enabled 2nd pps for dual EDP scenario X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From display gen12 onwards to support dual EDP two instances of pps added. Currently backlight controller and pps instance can be mapped together for a specific panel. Extended support for gen12 for dual EDP usage. TODO: For dual EDP scenario and panel type invalid (=255), special condition check to be added to reject or initialize the panel specific stuff earlier. Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_pps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c index 4e770218e29f..a9ed1214a167 100644 --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -1427,7 +1427,7 @@ void intel_pps_init(struct intel_dp *intel_dp) intel_dp->pps.initializing = true; INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work); - if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) + if (IS_GEMINILAKE(i915) || IS_BROXTON(i915) || DISPLAY_VER(i915) >= 12) intel_dp->get_pps_idx = bxt_power_sequencer_idx; else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) intel_dp->get_pps_idx = vlv_power_sequencer_pipe;