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Niedermayr" To: , CC: , , , Subject: [PATCH v3 1/3] memory: omap-gpmc: allow shared wait pins Date: Tue, 6 Sep 2022 14:47:43 +0200 Message-ID: <20220906124747.1767318-2-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906124747.1767318-1-benedikt.niedermayr@siemens.com> References: <20220906124747.1767318-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [139.23.126.196] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e806a05b-949c-4f45-abdb-08da90060677 X-MS-TrafficTypeDiagnostic: VE1PR10MB3887:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: OVt2ILiyMiZYzJxUdWfKWTCE2MI9DdA8UC+YvMFX0SeV5aunsBiPZn2izS5Ube1MHa/gVKBqx2s+f64quFXI0nS0coUTS/XxdKkNioaMdBF4DNCG1dQmY0wJK8N1l0DaG/Nr68qG/ZjZziQVFpM2D+54fbPWXQBJuwIhhK/+Z5+Ik4l3FuDL52DZ23bOzw3+I1LaihuJ7Irl6LHBIc6fDpdGaRV6KPWVKj/TD3VkVYweCq8R7nuIFN4xBclXoK/QdokHgFQZI0SwyGnZbQ77e6LONQPn/VJitKKIn0BaBsl6tdTxjnI1Z/O4KA80lAHYn5+GGAka/AGedaq3weX/j/us9HCi/mJLT6asLbe6/NhlLZon5Pp3taSzFMochGsLHxD1/WMR6L/8Xz/gY7HeJW+YkSynv5Bhh/gSj2P1daEIaBYHYQFqgw/9XuDM7o2/qlS+yrIB2Y2t8W+DTDpXvvdftYSzBNa0l+U1OK5ZwzehV49QG8b2DdUbzY1LRGmLNwCz7IoDo92riV1dC7azZxEsPvCYTiY89iRFgjMECIyYhHG+ZT1USc0diOq3OdC+YuCb0ycePKqiwV7QIL5s8r9qugSSupTuGed45ArCaP51kHeCLrjIsKtCWgZqq+FbB0nFI4shUVrBsf1ltvDvafrq5y+Jdg7+xOvfHP2uxYX/fXyvO89oQ5MtRfvGTkOtxZH3X+VSqICM/sdfulYtLYExTh95VQLdarXm12pttZ9aUHYv/87dTQ0tbuUA2ExHvnj/bf1/DejZHRHcmDKGLhxOsNBKADinVInTHVtq27yT3fC7UtjozWQ24iA0SWZV X-Forefront-Antispam-Report: CIP:194.138.21.75;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(39860400002)(136003)(396003)(346002)(376002)(40470700004)(46966006)(36840700001)(40480700001)(26005)(86362001)(82310400005)(41300700001)(478600001)(82960400001)(6666004)(356005)(2616005)(40460700003)(81166007)(83380400001)(82740400003)(336012)(47076005)(186003)(956004)(16526019)(36860700001)(2906002)(316002)(110136005)(4326008)(8676002)(70206006)(70586007)(54906003)(36756003)(1076003)(5660300002)(8936002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Sep 2022 12:47:57.7962 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e806a05b-949c-4f45-abdb-08da90060677 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.75];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: HE1EUR01FT037.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR10MB3887 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Newer kernels refuse to probe when using the same wait pin for different chipselect regions. But this may be a usecase when connecting for example FPGA or ASIC modules to the gpmc, which only got one wait pin installed. Signed-off-by: Benedikt Niedermayr --- drivers/memory/omap-gpmc.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index d9bf1c2ac319..e3674a15b934 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -2221,9 +2221,13 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, GPIO_ACTIVE_HIGH, GPIOD_IN); if (IS_ERR(waitpin_desc)) { - dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); ret = PTR_ERR(waitpin_desc); - goto err; + if (ret == -EBUSY) { + dev_info(&pdev->dev, "shared wait-pin: %d\n", wait_pin); + } else { + dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); + goto err; + } } } From patchwork Tue Sep 6 12:47:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benedikt Niedermayr X-Patchwork-Id: 12967452 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC96DECAAD5 for ; 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Tue, 6 Sep 2022 14:47:57 +0200 From: "B. Niedermayr" To: , CC: , , , Subject: [PATCH v3 2/3] memory: omap-gpmc: add support for wait pin polarity Date: Tue, 6 Sep 2022 14:47:44 +0200 Message-ID: <20220906124747.1767318-3-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906124747.1767318-1-benedikt.niedermayr@siemens.com> References: <20220906124747.1767318-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [139.23.126.196] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7a8b7393-c3d6-471c-3646-08da90060661 X-MS-TrafficTypeDiagnostic: AS8PR10MB6248:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 3q0jYayDT9zvrh4gupkM7ssMIjGIbQRbcvi4DmW0vHMl1dnOooxr/PBn6w7eWBaFb77SxYIv3Ae4yHuDWmdyRZqsNsbOqEVfRxyHhh/4b7vSdXOa3YYGkb+6diup6ny/CdNEsMF+KcWdyfN2vF8/PELj2xa6nbI1N9eu28/Yd4nCb/na1G0/c3kq7fj156/j4KTqluStr1OdlNHtxPOX8mRT6YDCHBBTM1ohTIXvsfcoVW201+WZazk/h1o7G6lNfWm+LFyp+X//yF/X6393wPFe9jt9xzum/erZeai5K/LtjgqTXdhs6kNsfEnfj5bz2a7gUc0T5/sl8Os51hY8x9NjPzk2WZfLXgGtuQU5k81RePk47Kbu4xlmZGpQpsvSw+/ogft2MNxDZ9yfusW5VmZ+O2ryW6gXwDKTwfJpfGGU+WtFZiKmGW58qYNha7Hp6KXCIR/6pOfc5o5nneDZTHRbkAvXgt4RrAg/fuVnFZh6GLBPLI7Oilw+XuYfUmeK6dBeA5LmMjawHvEyKfJuIogKomNhBzWNAcgthsFLyAMlZA7Xjeu5pDmzJIcM2TW765tdXlHE33tKaZxrG2encQR3yaIW/3lHifZChMUjhQpsoGimBWo9c7GgOkzdgtQB0bZaBD3fkVnG3PXFqCx1aPMwoFO7LzAZ9luz8gPI94e5oYAvqT7t/bS3tlfVwx52vMpNK35XXucsbILGgB4lYgCApljmT5N8RS4co2zROaSsUbLuKl8A36dg5JCsP00cnLCBviaI0gVyZP2mIjpzWw== X-Forefront-Antispam-Report: CIP:194.138.21.74;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:hybrid.siemens.com;CAT:NONE;SFS:(13230016)(4636009)(346002)(376002)(396003)(136003)(39860400002)(40470700004)(36840700001)(46966006)(7636003)(36860700001)(8676002)(356005)(7596003)(4326008)(82960400001)(70206006)(70586007)(82740400003)(2616005)(1076003)(186003)(47076005)(41300700001)(16526019)(336012)(956004)(40460700003)(110136005)(6666004)(54906003)(316002)(26005)(8936002)(86362001)(478600001)(5660300002)(2906002)(40480700001)(82310400005)(36756003);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Sep 2022 12:47:57.7050 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7a8b7393-c3d6-471c-3646-08da90060661 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.74];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR01FT099.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR10MB6248 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr The waitpin polarity can be configured via the WAITPINPOLARITY bits in the GPMC_CONFIG register. This is currently not supported by the driver. This patch adds support for setting the required register bits with the "gpmc,wait-pin-active-low" device tree property. Signed-off-by: Benedikt Niedermayr --- drivers/memory/omap-gpmc.c | 15 +++++++++++++++ include/linux/platform_data/gpmc-omap.h | 1 + 2 files changed, 16 insertions(+) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index e3674a15b934..609df21e0ce6 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -132,6 +132,7 @@ #define GPMC_CONFIG_DEV_SIZE 0x00000002 #define GPMC_CONFIG_DEV_TYPE 0x00000003 +#define GPMC_CONFIG_WAITPINPOLARITY(pin) (BIT(pin) << 8) #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) @@ -1881,6 +1882,18 @@ int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1); + if (p->wait_on_read || p->wait_on_write) { + config1 = gpmc_read_reg(GPMC_CONFIG); + + if (p->wait_pin_active_low) + config1 &= ~GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin); + else + config1 |= GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin); + + gpmc_write_reg(GPMC_CONFIG, config1); + } + + return 0; } @@ -1985,6 +1998,8 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) "gpmc,wait-on-read"); p->wait_on_write = of_property_read_bool(np, "gpmc,wait-on-write"); + p->wait_pin_active_low = of_property_read_bool(np, + "gpmc,wait-pin-active-low"); if (!p->wait_on_read && !p->wait_on_write) pr_debug("%s: rd/wr wait monitoring not enabled!\n", __func__); diff --git a/include/linux/platform_data/gpmc-omap.h b/include/linux/platform_data/gpmc-omap.h index c9cc4e32435d..7c9675165e8a 100644 --- a/include/linux/platform_data/gpmc-omap.h +++ b/include/linux/platform_data/gpmc-omap.h @@ -149,6 +149,7 @@ struct gpmc_settings { u32 device_width; /* device bus width (8 or 16 bit) */ u32 mux_add_data; /* multiplex address & data */ u32 wait_pin; /* wait-pin to be used */ + bool wait_pin_active_low; /* wait-pin polarity */ }; /* Data for each chip select */ From patchwork Tue Sep 6 12:47:46 2022 Content-Type: text/plain; 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Tue, 6 Sep 2022 14:48:03 +0200 Received: from bennie-lenovo.fritz.box (139.23.126.196) by DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.12; Tue, 6 Sep 2022 14:48:02 +0200 From: "B. Niedermayr" To: , CC: , , , Subject: [PATCH v3 3/3] dt-bindings: memory-controllers: gpmc-child: add wait-pin polarity Date: Tue, 6 Sep 2022 14:47:46 +0200 Message-ID: <20220906124747.1767318-5-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906124747.1767318-1-benedikt.niedermayr@siemens.com> References: <20220906124747.1767318-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [139.23.126.196] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7d7c97b5-4a50-4ca7-8932-08da900609cf X-MS-TrafficTypeDiagnostic: PA4PR10MB5636:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: i1gk7t4ZMqnMstm7Dwz1vIawaguYsUepPqmEmnJScAXv91uFpGlznfHapgEcYU4SEjVxMjdyfAcn+S84h0tj/nfsQYtpwPEdEbpL0mSJnpeFu9vYlNMkDkvQQ4AUcGVN1BJskylYzQDC4+jhre4K5qiExXCosBGl7fK4q99Xtfy8C8OvH/+AR93BpbNtQ8AJ9HCMX9tN8WEMJ7QaSmqVHaKBav36BE+mgFeFo+d06IUWcFLeWFooARcAlRqzNoBeZmiLwlLMDuWlQyltZcGb4LrCWwdhgNdsLdH/itYkYnuYe38L25tkhK/UwS6YfGhAQIfk1ESO6VlWe5YGldb7U+9sLKAkmxEaWVpno7JMudAXfhjUD4NdtgZ5I263Vt3n7n9EX7ieY2lyZYlB55iECP5C4r0DqoasSBMjePwdsTOoNOHmH7272pwZfkmF8rIxH0zEB0GJdEy+/qPszqssz6FOCmWN+qazBSDjvn9AR/9hwP7AEHYsvMHlQEVNWeyK4qbBgwp/IDbgdnad7gSq8WV9bDW9WYBK1EKMp1hFf8DqtbnRLU5MMxIbkYoAVVrRZKJzjccrUz4jnbySAAVva63iuTftn52cUH2DykxRv3T3fm6ItkAKklXtwUbf8fZw02N50wO/3N0Lr4IQUsY7+5Q/jn3bgE3s4GkjFmqAC4meTqnOiVO7yl+fmvrHKbr6adEl3QkPC3zNmQ14PoN+esCkPtrW+LglxKuBVMql653tclWkKCtUbeMmG4AdGvPL65p1u8oW1AM0V0GkqtbhhX9pJFJid45BcP1abJKW95K1hkCt4ycGzEE/Qx9A3IBL X-Forefront-Antispam-Report: CIP:194.138.21.75;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(376002)(346002)(136003)(39860400002)(396003)(40470700004)(36840700001)(46966006)(81166007)(82740400003)(110136005)(54906003)(356005)(82310400005)(70206006)(316002)(70586007)(40480700001)(36860700001)(36756003)(82960400001)(2906002)(8676002)(4326008)(26005)(6666004)(47076005)(86362001)(336012)(1076003)(16526019)(186003)(5660300002)(8936002)(478600001)(40460700003)(41300700001)(2616005)(956004)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Sep 2022 12:48:03.4208 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d7c97b5-4a50-4ca7-8932-08da900609cf X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.75];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: HE1EUR01FT037.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR10MB5636 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr The GPMC controller has the ability to configure the polarity for the wait pin. The current properties do not allow this configuration. This binding directly configures the WAITPINPOLARITY bit in the GPMC_CONFIG register. Signed-off-by: Benedikt Niedermayr --- .../bindings/memory-controllers/ti,gpmc-child.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml index 6e3995bb1630..a115b544a407 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml @@ -230,6 +230,12 @@ properties: Wait-pin used by client. Must be less than "gpmc,num-waitpins". $ref: /schemas/types.yaml#/definitions/uint32 + gpmc,wait-pin-active-low: + description: | + Set the polarity for the selected wait pin to active low. + Defaults to active high if this is not set. + type: boolean + gpmc,wait-on-read: description: Enables wait monitoring on reads. type: boolean