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[76.183.134.35]) by smtp.gmail.com with ESMTPSA id t8-20020a4ad0a8000000b004357ccfc8bfsm4482846oor.7.2022.09.06.14.03.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Sep 2022 14:03:28 -0700 (PDT) From: Chris Morgan To: devicetree@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, pgwipeout@gmail.com, cphealy@gmail.com, Chris Morgan , Krzysztof Kozlowski Subject: [PATCH v3 1/3] dt-bindings: vendor-prefixes: add Anbernic Date: Tue, 6 Sep 2022 16:03:22 -0500 Message-Id: <20220906210324.28986-2-macroalpha82@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906210324.28986-1-macroalpha82@gmail.com> References: <20220906210324.28986-1-macroalpha82@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_140332_988543_A73B6F52 X-CRM114-Status: UNSURE ( 7.92 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Chris Morgan Anbernic designs and manufactures portable gaming systems. https://anbernic.com/ Signed-off-by: Chris Morgan Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 2f0151e9f6be..2a5a98d6fdda 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -105,6 +105,8 @@ patternProperties: description: AMS-Taos Inc. "^analogix,.*": description: Analogix Semiconductor, Inc. + "^anbernic,.*": + description: Anbernic "^andestech,.*": description: Andes Technology Corporation "^anvo,.*": From patchwork Tue Sep 6 21:03:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Morgan X-Patchwork-Id: 12968190 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D639FC38145 for ; Tue, 6 Sep 2022 21:03:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hZ4rDEiRCt4bNxxN3JrubolbbL6/x+iyPbc5jS3VPzg=; b=kLEosT+zsQs/mN BzTivOSW+jEaO+Ycj40k5Vd2owimf+/CDeEZ76YEXEb2YlxOpaDL6zPYH7yP9yBlicMLqgyGkcuFz +9eZPGG92JNDiH9cj/M94NghOuVWNEuJWYTh1Kb983P+pvRmJAjcO93OGUB5nmiW/Fc9g+WR7PMcT 418u2QQs2uhIZ7/6SlXRhcKC/4ffJHYZjHI63o75Jv4JMHJrMkeWRZnjnOQybjpuSI9yb8RAsxjc2 faDmzOyF7wj9CP4bwp867ObtGY9kga0R1HZAu25y8/9019TNoJ+RqzanmUV0OIo64JMYSN2zZ9bYy CV11AEBfGHkO9JbIfONw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVfjM-00HLv1-Kc; Tue, 06 Sep 2022 21:03:36 +0000 Received: from mail-oa1-x35.google.com ([2001:4860:4864:20::35]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVfjG-00HLrL-Pg for linux-rockchip@lists.infradead.org; Tue, 06 Sep 2022 21:03:32 +0000 Received: by mail-oa1-x35.google.com with SMTP id 586e51a60fabf-11e9a7135easo31271132fac.6 for ; Tue, 06 Sep 2022 14:03:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=qU0hBg0k575Y0eMQn5Xm+FCoXjQNs8jpsAvRZNdQ/pY=; b=GprUKii7nck3JfoU2MPSdK1ZFVnRwfniPYXocued7FCLe0G+Lt+ZOy7xAfExTrXV+h WWLgIF0NpWskIu8mHacibNp+Mt/jbcMKOiyYl0GZUdsmpevF+J7ntIdPL+Xu++Czdz2z naFlg4i7UH0KjoP8yvI72b7266HTJCK15LO+O5uvC1xwzMiC2umFk1Sqoi3O3r8h9yE2 YUEgbhrI5YwX9eAkg2S0IP9tfAmJT5smylte628lGYWGipJM+lbZR+AKX8NPo2Y2yP8x yJi+NY8kOXMGe6deAH7+6P5SPxDHwuDbeYMrkJv5VjCrYIIuOGgoZv53e4H7vZMj3R6Q g/1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=qU0hBg0k575Y0eMQn5Xm+FCoXjQNs8jpsAvRZNdQ/pY=; b=5ou5z09KEfOWn8ERngo0RZcGwSr/Owz+Ga/6W89jSZjIgZOypHAHGgNclT8xPPJJ9w souVtEZXmssDj3iQN0MuhufgY0IQ0AbqatV1oGjP2B0Y4WTxCUtibjitPsvVqJ7LRYR4 7kEJdUB8ueaw6zyGL7AqivJmS+4YeDnONkKIo9utQ/bOqDHGaYfcqpYbnxYH3djFkfJ5 3KXLljqcp4gVQR7SzlXCQtXXp3f5oIYBh/JZl4CFkJactItxyqfS4ZN78SichSBXGAB7 p6tjYMtFvQjEFoeiTTTjvMHAMijKpUwL+o0xnU7eNh+P3ZFLAcUjndSZnTmBvKSu5Y4n Y6iQ== X-Gm-Message-State: ACgBeo0Ro5Q8dmn418SIG7rY5/faW8LUDOpHYCV4kAAIYLgEQqU5aW6h cyFoAq7aI31ijaawTbAeSOU= X-Google-Smtp-Source: AA6agR5HJnm+BvvsbPSslAiII0/C6HxcTiL6cf9vJI5k75sqwEVk1QkgHUSSUTGDdRbutE5xhfUtrw== X-Received: by 2002:aca:aa44:0:b0:33a:bcb6:8f21 with SMTP id t65-20020acaaa44000000b0033abcb68f21mr119487oie.208.1662498210004; Tue, 06 Sep 2022 14:03:30 -0700 (PDT) Received: from wintermute.localdomain (cpe-76-183-134-35.tx.res.rr.com. [76.183.134.35]) by smtp.gmail.com with ESMTPSA id t8-20020a4ad0a8000000b004357ccfc8bfsm4482846oor.7.2022.09.06.14.03.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Sep 2022 14:03:29 -0700 (PDT) From: Chris Morgan To: devicetree@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, pgwipeout@gmail.com, cphealy@gmail.com, Chris Morgan , Krzysztof Kozlowski Subject: [PATCH v3 2/3] dt-bindings: arm: rockchip: Add Anbernic RG353P and RG503 Date: Tue, 6 Sep 2022 16:03:23 -0500 Message-Id: <20220906210324.28986-3-macroalpha82@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906210324.28986-1-macroalpha82@gmail.com> References: <20220906210324.28986-1-macroalpha82@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_140331_538452_C0423D60 X-CRM114-Status: UNSURE ( 8.30 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Chris Morgan Add entry for the Anbernic RG353P and RG503 handheld devices. Signed-off-by: Chris Morgan Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/rockchip.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 7811ba64149c..5d947a2de739 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -30,6 +30,16 @@ properties: - const: amarula,vyasa-rk3288 - const: rockchip,rk3288 + - description: Anbernic RG353P + items: + - const: anbernic,rg353p + - const: rockchip,rk3566 + + - description: Anbernic RG503 + items: + - const: anbernic,rg503 + - const: rockchip,rk3566 + - description: Asus Tinker board items: - const: asus,rk3288-tinker From patchwork Tue Sep 6 21:03:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Morgan X-Patchwork-Id: 12968192 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9918BC38145 for ; Tue, 6 Sep 2022 21:03:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lQE+XS6HqPNfjs9naZT1YVrQm5y3ZGXv1UVPThZlGvs=; b=EzEbuZVuhTlXFE PeE76FKeqgxhPvRdTQat+vUFvtzs53zPatHmCLxM9tXZcr6P6SzCkeOHx9rrPTwdJ9mb58KY8K/VT BRsI1TpSizzoAAGPVAJt5ceJLVkvrRK2m1Hr4Kr3Ny1n/AfYpw+63AnH6mVsZ6QIv3Z8gsNLdZOH/ 1Sl+6Q2RI0wib544HjZu3Kk0YmDClb3BnIdfbjraO2Bm3Ay4g7bFAAUhzDtzZBq9vh26qmq7ZhK3B HCOGEj47TcSnk1J2paVO/HQOdKVR8KgUwnecCwS4hrm0Vn4ntcbzZeBKyNJc8yKI9hQhFTWhL8zWW 5mRYEQ93HkH7tk55Rs3A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVfjS-00HLzP-26; Tue, 06 Sep 2022 21:03:42 +0000 Received: from mail-oa1-x33.google.com ([2001:4860:4864:20::33]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVfjM-00HLrn-Gx for linux-rockchip@lists.infradead.org; Tue, 06 Sep 2022 21:03:39 +0000 Received: by mail-oa1-x33.google.com with SMTP id 586e51a60fabf-11eab59db71so31187317fac.11 for ; Tue, 06 Sep 2022 14:03:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=HcbF0RBWAzMLGpTIxTxGX1w8uzN4iumHTv0G0ch4w4k=; b=I7/F+3gSf3mNFrJ7pjL0gySzKVD25AHKYCx/430fHZi0EUR8v7qYt+lpUpieKf31A1 4DgyR1H+g+9/XUseSXE1TKN0S4B9MpE5h9+r+9kJaWBMZ9SdHmDT1U2Ph+elv0XltiZw KOrfn9tHCrV/SUEhXuTrtQcNrRu1pvreO0saihcju8hE1dshm3e6MH0/yeCzH5OfO/K6 Mq3RimMqqqQPQ79TT/HevaewXepINFPiXzPxChVWhj2opQRNMM4QGRqe8lMoO5dvXcQd ZAYhDVtITwrQrCi0Ae7kyDLU8vROBkygoeyADnoG55JxCoN+yyvorpEq6RcnU4I1ZtYE 6IlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=HcbF0RBWAzMLGpTIxTxGX1w8uzN4iumHTv0G0ch4w4k=; b=Kd/WwuGcycdtw4rW1u318K3D02bbgHxiisWXo0SURqEWFwasT31tYvCl7SshQUbS8G jnRmKHkUee0fDJ5W3Ar/jAEU11usSEYzRRAC/AGyzUMbnnIIKYT9APSfPeQr7ueJ6vgY qHy5QDwbexIO17atw5Ou5FLHNOLPE8OUFIoNcIkB3aLv5mmSxvSOC5nxcJ+yOedI8AMi nxP7VLfxOJRdmuCCkM8cH91L2hmoo19FWlrQNVXazhDTTIei8MjqZBECAi4CoI/3uz++ Ve3iNYaUf5IQXKkwtaq5KVYWEcaa03arV8Wa4aVEZGoXkqxl0NKN0afrr9t1YCCs56kS i9CA== X-Gm-Message-State: ACgBeo3GAa8p4Yg6bHZXp+qhALZwV2QIO87TdDB11w95Efy8gv6TTNEM Xa5MtoLuaSRQ99W/xSlEhxU= X-Google-Smtp-Source: AA6agR7972YN0t4A4vIda+wu2YiuQGYpucuxDVgW25/DRf0vEwyFo0L0gw4iZCilcVAp5DSBfgNJ0g== X-Received: by 2002:a05:6808:1928:b0:345:3228:a797 with SMTP id bf40-20020a056808192800b003453228a797mr112929oib.125.1662498210977; Tue, 06 Sep 2022 14:03:30 -0700 (PDT) Received: from wintermute.localdomain (cpe-76-183-134-35.tx.res.rr.com. [76.183.134.35]) by smtp.gmail.com with ESMTPSA id t8-20020a4ad0a8000000b004357ccfc8bfsm4482846oor.7.2022.09.06.14.03.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Sep 2022 14:03:30 -0700 (PDT) From: Chris Morgan To: devicetree@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, heiko@sntech.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, pgwipeout@gmail.com, cphealy@gmail.com, Chris Morgan Subject: [PATCH v3 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503 Date: Tue, 6 Sep 2022 16:03:24 -0500 Message-Id: <20220906210324.28986-4-macroalpha82@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906210324.28986-1-macroalpha82@gmail.com> References: <20220906210324.28986-1-macroalpha82@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_140336_629903_B2ED7F08 X-CRM114-Status: GOOD ( 19.58 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Chris Morgan Anbernic RG353P and RG503 are both RK3566 based handheld gaming devices from Anbernic. Both devices have: - 2 SDMMC slots. - A Realtek rtl8821cs WiFi/Bluetooth adapter. - A mini HDMI port. - A USB C host port and a USB C otg port (currently only working as device). - Multiple GPIO buttons and a single ADC button. - Dual analog joysticks controlled via a GPIO mux. - A headphone jack with amplified stereo speakers via a SGM4865 amp. - A PWM based vibrator for force feedback. The RG353P has: - 2GB LPDDR4 RAM. - A 32GB eMMC. - A 3.5 inch 640x480 4-lane DSI panel of unknown origin with an i2c controlled touchscreen (touchscreen is a Hynitron CST340). The RG503 has: - 1GB LPDDR4 RAM. - A 5 inch 960x544 AMOLED 2-lane DSI/DBI panel manufactured by Samsung with part number ams495qa04. Data for this panel is provided via the DSI interface, however commands are sent via a 9-bit 3-wire SPI interface. The MISO pin of SPI3 of the SOC is wired to the input of the panel, so it must be bitbanged. This devicetree enables the following hardware: - HDMI (plus audio). - Analog audio, including speakers. - All buttons. - All SDMMC/eMMC/SDIO controllers. - The ADC joysticks (note a pending patch is required to use them). - WiFi/Bluetooth (note out of tree drivers are required). - The PWM based vibrator motor. The following hardware is not enabled: - The display panels (drivers are being written and there are issues with the upstream DSI and VOP2 subsystems). - Battery (driver pending). - Touchscreen on the RG353P (note the i2c2 bus is enabled for it). Signed-off-by: Chris Morgan --- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/rk3566-anbernic-rg353p.dts | 94 ++ .../dts/rockchip/rk3566-anbernic-rg503.dts | 87 ++ .../dts/rockchip/rk3566-anbernic-rgxx3.dtsi | 831 ++++++++++++++++++ 4 files changed, 1014 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index ef79a672804a..1402274a78a0 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -57,6 +57,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353p.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file mode 100644 index 000000000000..7a20e2d6876a --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include "rk3566-anbernic-rgxx3.dtsi" + +/ { + model = "RG353P"; + compatible = "anbernic,rg353p", "rockchip,rk3566"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc0; + mmc2 = &sdmmc1; + mmc3 = &sdmmc2; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&vcc_sys>; + pwms = <&pwm4 0 25000 0>; + }; +}; + +&gpio_keys_control { + button-a { + gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; + label = "EAST"; + linux,code = ; + }; + + button-left { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = ; + }; + + button-r1 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = ; + }; + + button-r2 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = ; + }; + + button-right { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = ; + }; + + button-y { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = ; + }; +}; + +&i2c0 { + /* This hardware is physically present but unused. */ + power-monitor@62 { + compatible = "cellwise,cw2015"; + reg = <0x62>; + status = "disabled"; + }; +}; + +&i2c2 { + pintctrl-names = "default"; + pinctrl-0 = <&i2c2m1_xfer>; + status = "okay"; +}; + +&pwm4 { + status = "okay"; +}; + +&sdhci { + pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>, <&emmc_datastrobe>, <&emmc_rstnout>; + pinctrl-names = "default"; + bus-width = <8>; + mmc-hs200-1_8v; + non-removable; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts new file mode 100644 index 000000000000..3dc01549a5b4 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include "rk3566-anbernic-rgxx3.dtsi" + +/ { + model = "RG503"; + compatible = "anbernic,rg503", "rockchip,rk3566"; + + aliases { + mmc0 = &sdmmc0; + mmc1 = &sdmmc1; + mmc2 = &sdmmc2; + }; + + gpio_spi: spi { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&spi_pins>; + #address-cells = <1>; + #size-cells = <0>; + + sck-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; + num-chipselects = <0>; + }; +}; + +&gpio_keys_control { + button-a { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "EAST"; + linux,code = ; + }; + + button-left { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = ; + }; + + button-right { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = ; + }; + + button-r1 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = ; + }; + + button-r2 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = ; + }; + + button-right { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = ; + }; + + button-y { + gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = ; + }; +}; + +&pinctrl { + gpio-spi { + spi_pins: spi-pins { + rockchip,pins = + <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file mode 100644 index 000000000000..2b455143b86d --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi @@ -0,0 +1,831 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "rk3566.dtsi" + +/ { + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + adc-joystick { + compatible = "adc-joystick"; + io-channels = <&adc_mux 0>, + <&adc_mux 1>, + <&adc_mux 2>, + <&adc_mux 3>; + pinctrl-0 = <&joy_mux_en>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + axis@0 { + reg = <0>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <1023 15>; + linux,code = ; + }; + + axis@1 { + reg = <1>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <15 1023>; + linux,code = ; + }; + + axis@2 { + reg = <2>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <15 1023>; + linux,code = ; + }; + + axis@3 { + reg = <3>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <1023 15>; + linux,code = ; + }; + }; + + adc_keys: adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <60>; + + /* + * Button is mapped to F key in BSP kernel, but + * according to input guidelines it should be mode. + */ + button-mode { + label = "MODE"; + linux,code = ; + press-threshold-microvolt = <1750>; + }; + }; + + adc_mux: adc-mux { + compatible = "io-channel-mux"; + channels = "left_x", "right_x", "left_y", "right_y"; + #io-channel-cells = <1>; + io-channels = <&saradc 3>; + io-channel-names = "parent"; + mux-controls = <&gpio_mux>; + settle-time-us = <100>; + }; + + gpio_keys_control: gpio-keys-control { + compatible = "gpio-keys"; + pinctrl-0 = <&btn_pins_ctrl>; + pinctrl-names = "default"; + + button-b { + gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>; + label = "SOUTH"; + linux,code = ; + }; + + button-down { + gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>; + label = "DPAD-DOWN"; + linux,code = ; + }; + + button-l1 { + gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; + label = "TL"; + linux,code = ; + }; + + button-l2 { + gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; + label = "TL2"; + linux,code = ; + }; + + button-select { + gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; + label = "SELECT"; + linux,code = ; + }; + + button-start { + gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>; + label = "START"; + linux,code = ; + }; + + button-thumbl { + gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; + label = "THUMBL"; + linux,code = ; + }; + + button-thumbr { + gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; + label = "THUMBR"; + linux,code = ; + }; + + button-up { + gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>; + label = "DPAD-UP"; + linux,code = ; + }; + + button-x { + gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; + label = "NORTH"; + linux,code = ; + }; + }; + + gpio_keys_vol: gpio-keys-vol { + compatible = "gpio-keys"; + autorepeat; + pinctrl-0 = <&btn_pins_vol>; + pinctrl-names = "default"; + + button-vol-down { + gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; + label = "VOLUMEDOWN"; + linux,code = ; + }; + + button-vol-up { + gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; + label = "VOLUMEUP"; + linux,code = ; + }; + }; + + gpio_mux: mux-controller { + compatible = "gpio-mux"; + mux-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>, + <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; + #mux-control-cells = <0>; + }; + + hdmi-con { + compatible = "hdmi-connector"; + ddc-i2c-bus = <&i2c5>; + type = "c"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds: gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + green_led: led-0 { + color = ; + default-state = "on"; + function = LED_FUNCTION_POWER; + gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + }; + + amber_led: led-1 { + color = ; + function = LED_FUNCTION_CHARGING; + gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + retain-state-suspended; + }; + + red_led: led-2 { + color = ; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + }; + }; + + /* Channels reversed for both headphones and speakers. */ + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "anbernic_rk817"; + simple-audio-card,aux-devs = <&spk_amp>; + simple-audio-card,format = "i2s"; + simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphones", + "Speaker", "Internal Speakers"; + simple-audio-card,routing = + "MICL", "Mic Jack", + "Headphones", "HPOL", + "Headphones", "HPOR", + "Internal Speakers", "Speaker Amp OUTL", + "Internal Speakers", "Speaker Amp OUTR", + "Speaker Amp INL", "HPOL", + "Speaker Amp INR", "HPOR"; + simple-audio-card,pin-switches = "Internal Speakers"; + + simple-audio-card,codec { + sound-dai = <&rk817>; + }; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk817 1>; + clock-names = "ext_clock"; + pinctrl-0 = <&wifi_enable_h>; + pinctrl-names = "default"; + post-power-on-delay-ms = <200>; + reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>; + }; + + spk_amp: audio-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&spk_amp_enable_h>; + pinctrl-names = "default"; + sound-name-prefix = "Speaker Amp"; + }; + + vcc3v3_lcd0_n: regulator-vcc3v3-lcd0 { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-0 = <&vcc_lcd_h>; + pinctrl-names = "default"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_lcd0_n"; + vin-supply = <&vcc_3v3>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_sys: regulator-vcc-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + regulator-name = "vcc_sys"; + }; + + vcc_wifi: regulator-vcc-wifi { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc_wifi_h>; + pinctrl-names = "default"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_wifi"; + }; + + vibrator: pwm-vibrator { + compatible = "pwm-vibrator"; + pwm-names = "enable"; + pwms = <&pwm5 0 1000000000 0>; + }; +}; + +&combphy1 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c5>; + pinctrl-0 = <&hdmitxm0_cec>; + pinctrl-names = "default"; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk817: pmic@20 { + compatible = "rockchip,rk817"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + #clock-cells = <1>; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_mclk>, <&pmic_int_l>; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&dcdc_boost>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_logic"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v3: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_3v3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca1v8_pmu: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc1v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc2v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + dcdc_boost: BOOST { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4700000>; + regulator-max-microvolt = <5400000>; + regulator-name = "boost"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + otg_switch: OTG_SWITCH { + regulator-name = "otg_switch"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu: regulator@40 { + compatible = "fcs,fan53555"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1390000>; + regulator-init-microvolt = <900000>; + regulator-name = "vdd_cpu"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc_sys>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + /* Unknown/unused device at 0x3c */ + status = "disabled"; +}; + +&i2c5 { + pinctrl-0 = <&i2c5m1_xfer>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&i2s1_8ch { + pinctrl-0 = <&i2s1m0_sclktx + &i2s1m0_lrcktx + &i2s1m0_sdi0 + &i2s1m0_sdo0>; + pinctrl-names = "default"; + rockchip,trcm-sync-tx-only; + status = "okay"; +}; + +&pinctrl { + audio-amplifier { + spk_amp_enable_h: spk-amp-enable-h { + rockchip,pins = + <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gpio-btns { + btn_pins_ctrl: btn-pins-ctrl { + rockchip,pins = + <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + btn_pins_vol: btn-pins-vol { + rockchip,pins = + <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + gpio-led { + led_pins: led-pins { + rockchip,pins = + <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + joy-mux { + joy_mux_en: joy-mux-en { + rockchip,pins = + <0 RK_PB5 RK_FUNC_GPIO &pcfg_output_low>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = + <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + vcc3v3-lcd { + vcc_lcd_h: vcc-lcd-h { + rockchip,pins = + <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + vcc-wifi { + vcc_wifi_h: vcc-wifi-h { + rockchip,pins = + <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + status = "okay"; + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc1v8_dvp>; + vccio7-supply = <&vcc_3v3>; +}; + +&pwm5 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + pinctrl-names = "default"; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&sdmmc1 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &sdmmc1_det>; + pinctrl-names = "default"; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc1v8_dvp>; + status = "okay"; +}; + +&sdmmc2 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; + pinctrl-names = "default"; + vmmc-supply = <&vcc_wifi>; + vqmmc-supply = <&vcca1v8_pmu>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>; + pinctrl-names = "default"; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8821cs-bt"; + device-wake-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; + }; +}; + +&uart2 { + status = "okay"; +}; + +/* + * Lack the schematics to verify, but port works as a peripheral + * (and not a host or OTG port). + */ +&usb_host0_xhci { + dr_mode = "peripheral"; + phys = <&usb2phy0_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host1_xhci { + phy-names = "usb2-phy", "usb3-phy"; + phys = <&usb2phy1_host>, <&combphy1 PHY_TYPE_USB3>; + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb2phy1_host { + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi_in_vp0>; + }; +};