From patchwork Wed Sep 7 07:29:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12968522 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B797BC6FA89 for ; Wed, 7 Sep 2022 07:30:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229781AbiIGHaj (ORCPT ); Wed, 7 Sep 2022 03:30:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229963AbiIGHaD (ORCPT ); Wed, 7 Sep 2022 03:30:03 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63BEC12D10 for ; Wed, 7 Sep 2022 00:29:57 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id m15so1394378lfl.9 for ; Wed, 07 Sep 2022 00:29:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=JgN2FF1Ci4Ij0PM8WpmHKSnHghjpw3iCMjtlqpJR2Ug=; b=dSXNw8o7ZA2pB88ivtkKKGFXv6/bowCumGWnYYMkssR2tQignS4JVYQZKY5a8LTdVK ssRO7awxd8iMatJx7cr4slsnLv0JCzQRAty3oJCPsS2bbv600R5dqhIi4ZLV8WqKm2+o IAj2fCE7slyUviA7qrk0cSlIwOmVKEYqyO2UeYkfBb0czeGnAzn9U5ka+RYEek8RrEhF UM2WGGT8OJVL+tYKvUjyNuQEOXmRHALSrno0aWCL2FRimKSvPCEqblua+Eco1t8hnSXW BubbMy5OjvbIjGpWwT1DCdWw/Asbj064xdjv036LwZeQWGeGP4+3bxl+JVLvD1sRYw/6 emCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=JgN2FF1Ci4Ij0PM8WpmHKSnHghjpw3iCMjtlqpJR2Ug=; b=zJOTTTzr1ZU4oOh+70F2LFi/pIEpJy45rU/kEMyn69lb+JV5hKB8jvmEseV7vSpRvC V9UPKKc7KrIJoqerJykS6LBH1uTw9tHLCpgtj5D3s6Pt3nnLAEHu0XU9uQ0yVzJzZud6 KRlIewEQs7CAPilPQRtTw+B7t44+eXdMvwMKB8P5jiinJDdc2Zf7RuyikMwhL+1DTEke A9poG9IvNzDrWkt1uUGVEDo3Ba0HeF3VtUWL2VpJK6nv3/VZ/3ix9EmQJ8v7K9nTFBR/ w7E68yNPnIMRFG+G7qcFd0ByjqWiqglSY9C193N9LVQfEeUDM3YJ65C7R5JocOxDy/yI 8xKw== X-Gm-Message-State: ACgBeo34n6BnCc4l+7ljyAjBRSSDHUDWpr7Eetmy8gBQd4rO0lLRauMX Lem0SkILhxHmEZSKJk2onVvPMbLnwLbpO+Iw X-Google-Smtp-Source: AA6agR43I78ritBRPmrHhD6DO7E63b1EGnUgkLsYx7rn5BhctI068KEEWNv6Pcy27PwOIs6GA3xcsA== X-Received: by 2002:a05:6512:1315:b0:492:cbc8:e10d with SMTP id x21-20020a056512131500b00492cbc8e10dmr651427lfu.41.1662535795350; Wed, 07 Sep 2022 00:29:55 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id w3-20020ac25983000000b0048a83336343sm2275507lfn.252.2022.09.07.00.29.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 00:29:54 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Mattias Forsblad Subject: [PATCH net-next v5 1/6] net: dsa: mv88e6xxx: Add RMU enable for select switches. Date: Wed, 7 Sep 2022 09:29:45 +0200 Message-Id: <20220907072950.2329571-2-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220907072950.2329571-1-mattias.forsblad@gmail.com> References: <20220907072950.2329571-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add RMU enable functionality for some Marvell SOHO switches. Signed-off-by: Mattias Forsblad Reviewed-by: Andrew Lunn --- drivers/net/dsa/mv88e6xxx/chip.c | 6 +++ drivers/net/dsa/mv88e6xxx/chip.h | 1 + drivers/net/dsa/mv88e6xxx/global1.c | 66 +++++++++++++++++++++++++++++ drivers/net/dsa/mv88e6xxx/global1.h | 3 ++ 4 files changed, 76 insertions(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 6f4ea39ab466..46e12b53a9e4 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -4098,6 +4098,7 @@ static const struct mv88e6xxx_ops mv88e6085_ops = { .ppu_disable = mv88e6185_g1_ppu_disable, .reset = mv88e6185_g1_reset, .rmu_disable = mv88e6085_g1_rmu_disable, + .rmu_enable = mv88e6085_g1_rmu_enable, .vtu_getnext = mv88e6352_g1_vtu_getnext, .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, .stu_getnext = mv88e6352_g1_stu_getnext, @@ -4181,6 +4182,7 @@ static const struct mv88e6xxx_ops mv88e6097_ops = { .pot_clear = mv88e6xxx_g2_pot_clear, .reset = mv88e6352_g1_reset, .rmu_disable = mv88e6085_g1_rmu_disable, + .rmu_enable = mv88e6085_g1_rmu_enable, .vtu_getnext = mv88e6352_g1_vtu_getnext, .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, .phylink_get_caps = mv88e6095_phylink_get_caps, @@ -5300,6 +5302,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = { .pot_clear = mv88e6xxx_g2_pot_clear, .reset = mv88e6352_g1_reset, .rmu_disable = mv88e6352_g1_rmu_disable, + .rmu_enable = mv88e6352_g1_rmu_enable, .atu_get_hash = mv88e6165_g1_atu_get_hash, .atu_set_hash = mv88e6165_g1_atu_set_hash, .vtu_getnext = mv88e6352_g1_vtu_getnext, @@ -5367,6 +5370,7 @@ static const struct mv88e6xxx_ops mv88e6390_ops = { .pot_clear = mv88e6xxx_g2_pot_clear, .reset = mv88e6352_g1_reset, .rmu_disable = mv88e6390_g1_rmu_disable, + .rmu_enable = mv88e6390_g1_rmu_enable, .atu_get_hash = mv88e6165_g1_atu_get_hash, .atu_set_hash = mv88e6165_g1_atu_set_hash, .vtu_getnext = mv88e6390_g1_vtu_getnext, @@ -5434,6 +5438,7 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = { .pot_clear = mv88e6xxx_g2_pot_clear, .reset = mv88e6352_g1_reset, .rmu_disable = mv88e6390_g1_rmu_disable, + .rmu_enable = mv88e6390_g1_rmu_enable, .atu_get_hash = mv88e6165_g1_atu_get_hash, .atu_set_hash = mv88e6165_g1_atu_set_hash, .vtu_getnext = mv88e6390_g1_vtu_getnext, @@ -5504,6 +5509,7 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = { .pot_clear = mv88e6xxx_g2_pot_clear, .reset = mv88e6352_g1_reset, .rmu_disable = mv88e6390_g1_rmu_disable, + .rmu_enable = mv88e6390_g1_rmu_enable, .atu_get_hash = mv88e6165_g1_atu_get_hash, .atu_set_hash = mv88e6165_g1_atu_set_hash, .vtu_getnext = mv88e6390_g1_vtu_getnext, diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index e693154cf803..7ce3c41f6caf 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -637,6 +637,7 @@ struct mv88e6xxx_ops { /* Remote Management Unit operations */ int (*rmu_disable)(struct mv88e6xxx_chip *chip); + int (*rmu_enable)(struct mv88e6xxx_chip *chip, int port); /* Precision Time Protocol operations */ const struct mv88e6xxx_ptp_ops *ptp_ops; diff --git a/drivers/net/dsa/mv88e6xxx/global1.c b/drivers/net/dsa/mv88e6xxx/global1.c index 5848112036b0..c5bb414f4291 100644 --- a/drivers/net/dsa/mv88e6xxx/global1.c +++ b/drivers/net/dsa/mv88e6xxx/global1.c @@ -466,18 +466,84 @@ int mv88e6085_g1_rmu_disable(struct mv88e6xxx_chip *chip) MV88E6085_G1_CTL2_RM_ENABLE, 0); } +int mv88e6085_g1_rmu_enable(struct mv88e6xxx_chip *chip, int upstream_port) +{ + int val = MV88E6352_G1_CTL2_RMU_MODE_DISABLED; + + switch (upstream_port) { + case 9: + val = MV88E6085_G1_CTL2_RM_ENABLE; + break; + case 10: + val = MV88E6085_G1_CTL2_RM_ENABLE | MV88E6085_G1_CTL2_P10RM; + break; + default: + return -EOPNOTSUPP; + } + + return mv88e6xxx_g1_ctl2_mask(chip, MV88E6085_G1_CTL2_P10RM | + MV88E6085_G1_CTL2_RM_ENABLE, val); +} + int mv88e6352_g1_rmu_disable(struct mv88e6xxx_chip *chip) { return mv88e6xxx_g1_ctl2_mask(chip, MV88E6352_G1_CTL2_RMU_MODE_MASK, MV88E6352_G1_CTL2_RMU_MODE_DISABLED); } +int mv88e6352_g1_rmu_enable(struct mv88e6xxx_chip *chip, int upstream_port) +{ + int val = MV88E6352_G1_CTL2_RMU_MODE_DISABLED; + + switch (upstream_port) { + case 4: + val = MV88E6352_G1_CTL2_RMU_MODE_PORT_4; + break; + case 5: + val = MV88E6352_G1_CTL2_RMU_MODE_PORT_5; + break; + case 6: + val = MV88E6352_G1_CTL2_RMU_MODE_PORT_6; + break; + default: + return -EOPNOTSUPP; + } + + return mv88e6xxx_g1_ctl2_mask(chip, MV88E6352_G1_CTL2_RMU_MODE_MASK, + val); +} + int mv88e6390_g1_rmu_disable(struct mv88e6xxx_chip *chip) { return mv88e6xxx_g1_ctl2_mask(chip, MV88E6390_G1_CTL2_RMU_MODE_MASK, MV88E6390_G1_CTL2_RMU_MODE_DISABLED); } +int mv88e6390_g1_rmu_enable(struct mv88e6xxx_chip *chip, int upstream_port) +{ + int val = MV88E6390_G1_CTL2_RMU_MODE_DISABLED; + + switch (upstream_port) { + case 0: + val = MV88E6390_G1_CTL2_RMU_MODE_PORT_0; + break; + case 1: + val = MV88E6390_G1_CTL2_RMU_MODE_PORT_1; + break; + case 9: + val = MV88E6390_G1_CTL2_RMU_MODE_PORT_9; + break; + case 10: + val = MV88E6390_G1_CTL2_RMU_MODE_PORT_10; + break; + default: + return -EOPNOTSUPP; + } + + return mv88e6xxx_g1_ctl2_mask(chip, MV88E6390_G1_CTL2_RMU_MODE_MASK, + val); +} + int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip) { return mv88e6xxx_g1_ctl2_mask(chip, MV88E6390_G1_CTL2_HIST_MODE_MASK, diff --git a/drivers/net/dsa/mv88e6xxx/global1.h b/drivers/net/dsa/mv88e6xxx/global1.h index 65958b2a0d3a..29c0c8acb583 100644 --- a/drivers/net/dsa/mv88e6xxx/global1.h +++ b/drivers/net/dsa/mv88e6xxx/global1.h @@ -313,8 +313,11 @@ int mv88e6250_g1_ieee_pri_map(struct mv88e6xxx_chip *chip); int mv88e6185_g1_set_cascade_port(struct mv88e6xxx_chip *chip, int port); int mv88e6085_g1_rmu_disable(struct mv88e6xxx_chip *chip); +int mv88e6085_g1_rmu_enable(struct mv88e6xxx_chip *chip, int upstream_port); int mv88e6352_g1_rmu_disable(struct mv88e6xxx_chip *chip); +int mv88e6352_g1_rmu_enable(struct mv88e6xxx_chip *chip, int upstream_port); int mv88e6390_g1_rmu_disable(struct mv88e6xxx_chip *chip); +int mv88e6390_g1_rmu_enable(struct mv88e6xxx_chip *chip, int upstream_port); int mv88e6xxx_g1_set_device_number(struct mv88e6xxx_chip *chip, int index); From patchwork Wed Sep 7 07:29:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12968523 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86A23ECAAD3 for ; Wed, 7 Sep 2022 07:31:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229788AbiIGHak (ORCPT ); Wed, 7 Sep 2022 03:30:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229964AbiIGHaD (ORCPT ); Wed, 7 Sep 2022 03:30:03 -0400 Received: from mail-lj1-x233.google.com (mail-lj1-x233.google.com [IPv6:2a00:1450:4864:20::233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA3D840E2D for ; Wed, 7 Sep 2022 00:29:57 -0700 (PDT) Received: by mail-lj1-x233.google.com with SMTP id z23so14963955ljk.1 for ; Wed, 07 Sep 2022 00:29:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=iVlKsCzpSq5xAshl/Osk8jDdbgKPm67ICf/yk8vBtwM=; b=qpJwz0ScUgsyl6R47K/hfaUDbOhtXh6zsfkRMleRzJp4WtPlXa4KC+8KSapsQsQzsE u79G4nC7q/76FEk7xx8jmZN04vEj/bDdvF8mP7kykPYyYdivt24SZPwEfZTDq/eskivR HdxlS+hH3j5KHib7ARmLwpgLMC8o6fHyjlCnEcewOqp3EvZ1bh5LSaO3HbGgAhxqtBsd tYBXrXkDuQSV0BCDZ760JFsASQC4IZAiulH50H8k/iAJSk3uXM5M0t1Z/g6zIK5/0HSg /aci1Qka0sjtv/pX0tyoQ/rrTahHJ1uywmO/TOpEZUF1DbJyv9l1QajF6LDg4tk+xnGi k0FQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=iVlKsCzpSq5xAshl/Osk8jDdbgKPm67ICf/yk8vBtwM=; b=MKF0tmGqE9W+jiDxwPCP2jHdxOo5sN3M8UQ8sTlwG4q5pv1MtxlYA4BzghbTOfC6qT W/uMkaUF9wxmZ9RM9Laz+/dMUVosDfpktWXwF+HGmIqDO/wL2CeHZ08ZVLLYLeT5VBSe W5aW60T1hqO44FjrFZO3LmiWVdmmWfakenicOyOlx7XW4CUfd/yh5f9y3H4a/S9maJhd FQb8KfXCHaekFD4ALm6wvvjLSBxrdGwS0mMoPUqZre/Pgvv8uFoifgY9nO+tYHcHkuWM oKwN3TCi4qtfphy6EAih9w9P5r+Kq1CGuhbibX3A/uY0O/800zZfZ7FUbvmALvASUcvf fEhA== X-Gm-Message-State: ACgBeo2vdZhP8DQmLowGNRTbWY8Y0VF1964ERPhM21oCNBJiZ0bphsoX 57URln5cD2EaPWwKFzU98vYJaQfGLEIxVrKW X-Google-Smtp-Source: AA6agR5XFatDaXnV5pLq5X7tTlBWj6bao2aQyelEZzJccT3nJJrlne7IVY+qIWn8z4b/M4j1KFn59w== X-Received: by 2002:a05:651c:54b:b0:268:a2ad:b8e3 with SMTP id q11-20020a05651c054b00b00268a2adb8e3mr565258ljp.281.1662535795999; Wed, 07 Sep 2022 00:29:55 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id w3-20020ac25983000000b0048a83336343sm2275507lfn.252.2022.09.07.00.29.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 00:29:55 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Mattias Forsblad Subject: [PATCH net-next v5 2/6] net: dsa: Add convenience functions for frame handling Date: Wed, 7 Sep 2022 09:29:46 +0200 Message-Id: <20220907072950.2329571-3-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220907072950.2329571-1-mattias.forsblad@gmail.com> References: <20220907072950.2329571-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add common control functions for drivers that need to send and wait for control frames. Signed-off-by: Mattias Forsblad --- include/net/dsa.h | 14 ++++++++++++++ net/dsa/dsa.c | 20 ++++++++++++++++++++ net/dsa/dsa2.c | 2 ++ 3 files changed, 36 insertions(+) diff --git a/include/net/dsa.h b/include/net/dsa.h index f2ce12860546..0e8a7ef17490 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -495,6 +495,8 @@ struct dsa_switch { unsigned int max_num_bridges; unsigned int num_ports; + + struct completion inband_done; }; static inline struct dsa_port *dsa_to_port(struct dsa_switch *ds, int p) @@ -1390,6 +1392,18 @@ void dsa_tag_drivers_register(struct dsa_tag_driver *dsa_tag_driver_array[], void dsa_tag_drivers_unregister(struct dsa_tag_driver *dsa_tag_driver_array[], unsigned int count); +int dsa_switch_inband_tx(struct dsa_switch *ds, struct sk_buff *skb, + struct completion *completion, unsigned long timeout); + +static inline void dsa_switch_inband_complete(struct dsa_switch *ds, struct completion *completion) +{ + /* Custom completion? */ + if (completion) + complete(completion); + else + complete(&ds->inband_done); +} + #define dsa_tag_driver_module_drivers(__dsa_tag_drivers_array, __count) \ static int __init dsa_tag_driver_module_init(void) \ { \ diff --git a/net/dsa/dsa.c b/net/dsa/dsa.c index be7b320cda76..00d25aa41a55 100644 --- a/net/dsa/dsa.c +++ b/net/dsa/dsa.c @@ -324,6 +324,26 @@ int dsa_switch_resume(struct dsa_switch *ds) EXPORT_SYMBOL_GPL(dsa_switch_resume); #endif +int dsa_switch_inband_tx(struct dsa_switch *ds, struct sk_buff *skb, + struct completion *completion, unsigned long timeout) +{ + struct completion *com; + + /* Custom completion? */ + if (completion) + com = completion; + else + com = &ds->inband_done; + + reinit_completion(com); + + if (skb) + dev_queue_xmit(skb); + + return wait_for_completion_timeout(com, msecs_to_jiffies(timeout)); +} +EXPORT_SYMBOL_GPL(dsa_switch_inband_tx); + static struct packet_type dsa_pack_type __read_mostly = { .type = cpu_to_be16(ETH_P_XDSA), .func = dsa_switch_rcv, diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c index ed56c7a554b8..a1b3ecfdffb8 100644 --- a/net/dsa/dsa2.c +++ b/net/dsa/dsa2.c @@ -1746,6 +1746,8 @@ static int dsa_switch_probe(struct dsa_switch *ds) dsa_tree_put(dst); } + init_completion(&ds->inband_done); + return err; } From patchwork Wed Sep 7 07:29:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12968525 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADBE2C38145 for ; Wed, 7 Sep 2022 07:31:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229829AbiIGHan (ORCPT ); Wed, 7 Sep 2022 03:30:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229969AbiIGHaE (ORCPT ); Wed, 7 Sep 2022 03:30:04 -0400 Received: from mail-lj1-x231.google.com (mail-lj1-x231.google.com [IPv6:2a00:1450:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 91B6D42ACB for ; Wed, 7 Sep 2022 00:29:58 -0700 (PDT) Received: by mail-lj1-x231.google.com with SMTP id s15so14933624ljp.5 for ; Wed, 07 Sep 2022 00:29:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=xcZiUF25x0J4Yo8A8w6/0Lc7jLNoAwjTXamqNDpVJdM=; b=ATfBna3ULQNA/YPUT0OlhGd5LHmDWt4J0mnJm7HVkuIBzgHUfwgWZ66z1PiGdlkk3d mW076wnEIO4xfWD1+4JgMu3VLk8hzfH5vTKNF2ZwqIOrq9CFwBvfqwM5lJF5YcdO5BDf u4rr3ZCJ1FhADA+ugy+7gHHod2Z3/yS13vHl8WlW680tJb2Ql1vEpn5xRUlTkKQ0sCNo phZybadwpraPJyV1EOBa9Ba8O2DfKKRZPWJvgu8juy2g3fCdzvZUZQovC/zAvTLKHyNR EjvFg4VK0Zr2Bo1wx3pOiJx53zXC4iWTKuL9DjuwRUFUE0iDqhkc4+aQayqNgIZjNs4k ZmVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=xcZiUF25x0J4Yo8A8w6/0Lc7jLNoAwjTXamqNDpVJdM=; b=5tUWFNDnXC8Wpr8BTEvZ39Ihu33B2J23lcJbTLk9EP+2jc/S5t5oFDCJMK62+gsLiL W2Ad8o8DsX/beFVtqYtlw7Nt/IwpgD1P+W7hcWJ6fLGajc8IjAivg1B4CVpvcZtqmRfC 8GMTdqoeNEXCZ9YQXnuCLLR94v2jUzCaGkhr4kpeAo3X2b5e3ZxCxA3rJnbGJrzRGCeO cu2R8FDA7Hhd8okAv22LB7AOxdyCaIcBN5XlOst3XThRiw9f5+zio4tRHFxyV6H15NbK OAL4XRetVCRCsuAXRi6bYbU6LhBTrnIz7LF0tqL9OQSdLbMhLN6cnT4Jy2k+ijWQuDY0 jwbQ== X-Gm-Message-State: ACgBeo12oYBuUGrnDK6QLabRWdyGUIcFDL2bAwFNFS5FpahItKqSfAv2 WSXqw6CROR7HHJqt16c5mDOmGSqyRqnUx8P8 X-Google-Smtp-Source: AA6agR4dn1X3xGQpdw0b0rqnUnWbr+6FyY3f44c9YplJvEohg9gJgQ3ia8E/ljfgFJ2lqrIbulZs8A== X-Received: by 2002:a2e:aa13:0:b0:264:eb98:b7fd with SMTP id bf19-20020a2eaa13000000b00264eb98b7fdmr554052ljb.26.1662535796713; Wed, 07 Sep 2022 00:29:56 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id w3-20020ac25983000000b0048a83336343sm2275507lfn.252.2022.09.07.00.29.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 00:29:56 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Mattias Forsblad Subject: [PATCH net-next v5 3/6] net: dsa: Introduce dsa tagger data operation. Date: Wed, 7 Sep 2022 09:29:47 +0200 Message-Id: <20220907072950.2329571-4-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220907072950.2329571-1-mattias.forsblad@gmail.com> References: <20220907072950.2329571-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Support connecting dsa tagger for frame2reg decoding with it's associated hookup functions. Signed-off-by: Mattias Forsblad Reviewed-by: Andrew Lunn --- include/net/dsa.h | 5 +++++ net/dsa/tag_dsa.c | 32 +++++++++++++++++++++++++++++--- 2 files changed, 34 insertions(+), 3 deletions(-) diff --git a/include/net/dsa.h b/include/net/dsa.h index 0e8a7ef17490..8510267d6188 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -130,6 +130,11 @@ struct dsa_lag { refcount_t refcount; }; +struct dsa_tagger_data { + void (*decode_frame2reg)(struct net_device *netdev, + struct sk_buff *skb); +}; + struct dsa_switch_tree { struct list_head list; diff --git a/net/dsa/tag_dsa.c b/net/dsa/tag_dsa.c index e4b6e3f2a3db..3dd1dcddaf05 100644 --- a/net/dsa/tag_dsa.c +++ b/net/dsa/tag_dsa.c @@ -198,7 +198,10 @@ static struct sk_buff *dsa_xmit_ll(struct sk_buff *skb, struct net_device *dev, static struct sk_buff *dsa_rcv_ll(struct sk_buff *skb, struct net_device *dev, u8 extra) { + struct dsa_tagger_data *tagger_data; + struct dsa_port *dp = dev->dsa_ptr; bool trap = false, trunk = false; + struct dsa_switch *ds = dp->ds; int source_device, source_port; enum dsa_code code; enum dsa_cmd cmd; @@ -218,9 +221,9 @@ static struct sk_buff *dsa_rcv_ll(struct sk_buff *skb, struct net_device *dev, switch (code) { case DSA_CODE_FRAME2REG: - /* Remote management is not implemented yet, - * drop. - */ + tagger_data = ds->tagger_data; + if (likely(tagger_data->decode_frame2reg)) + tagger_data->decode_frame2reg(dev, skb); return NULL; case DSA_CODE_ARP_MIRROR: case DSA_CODE_POLICY_MIRROR: @@ -323,6 +326,25 @@ static struct sk_buff *dsa_rcv_ll(struct sk_buff *skb, struct net_device *dev, return skb; } +static int dsa_tag_connect(struct dsa_switch *ds) +{ + struct dsa_tagger_data *tagger_data; + + tagger_data = kzalloc(sizeof(*tagger_data), GFP_KERNEL); + if (!tagger_data) + return -ENOMEM; + + ds->tagger_data = tagger_data; + + return 0; +} + +static void dsa_tag_disconnect(struct dsa_switch *ds) +{ + kfree(ds->tagger_data); + ds->tagger_data = NULL; +} + #if IS_ENABLED(CONFIG_NET_DSA_TAG_DSA) static struct sk_buff *dsa_xmit(struct sk_buff *skb, struct net_device *dev) @@ -343,6 +365,8 @@ static const struct dsa_device_ops dsa_netdev_ops = { .proto = DSA_TAG_PROTO_DSA, .xmit = dsa_xmit, .rcv = dsa_rcv, + .connect = dsa_tag_connect, + .disconnect = dsa_tag_disconnect, .needed_headroom = DSA_HLEN, }; @@ -385,6 +409,8 @@ static const struct dsa_device_ops edsa_netdev_ops = { .proto = DSA_TAG_PROTO_EDSA, .xmit = edsa_xmit, .rcv = edsa_rcv, + .connect = dsa_tag_connect, + .disconnect = dsa_tag_disconnect, .needed_headroom = EDSA_HLEN, }; From patchwork Wed Sep 7 07:29:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12968524 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 960EFC54EE9 for ; Wed, 7 Sep 2022 07:31:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229806AbiIGHam (ORCPT ); Wed, 7 Sep 2022 03:30:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229695AbiIGHaG (ORCPT ); Wed, 7 Sep 2022 03:30:06 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66036422CC for ; Wed, 7 Sep 2022 00:29:59 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id x14so5691957lfu.10 for ; Wed, 07 Sep 2022 00:29:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=2skxFPKZXsrGd9NHOewlH/FnXhPb2+y0U3rsrmy5otI=; b=M1g8u8VUBVbtyPiE1bMVX/RIQDXN4+p01A9yRua2y36WDttsbQ9aVc4Mizh2fGG5Cj BPUKo940KAp19QCPvNK8evHgHXQj+6gVUXdgncE55A02DW79H3gxljTmQVI5HqD24aWZ iqk7Ru+OMjvNTVm4mzWE01XlknED/0EhOiJ//ZJKvcag+y663xe5ezyocB/tFNjdpPAx CmEpByY8Ry6Hi+RfY3hyBvPZUuCHU/nY7pl6uh4N9waqJMPiYvsi0OY7qcHyJ8XOH2fO 19kPBzUWvz/9dQgj03XVebhp2Pr1XcFuUPA+3yKt+PlrkpYqC5uKWbmro2qU6/4lX3m9 u0Eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=2skxFPKZXsrGd9NHOewlH/FnXhPb2+y0U3rsrmy5otI=; b=tMOZ9p+gYBXGwujS8pRM/uh6YGJC+9cLjykYoMabcCid8e50BucQ9kVG7gC1pXJknh 1RSw4m6zW0Bc8PHpKioXvZ2p15qNrWNBMT8qZcTvFSI9wet/1eBRhECOyFAWgkMP9ziH dpB6b/oyH8Cb/BMCu6YmcQQ+oj4Vdj1wYQHi7dbhtiZb6XgZDCymtSSWyoSmpm+n4FHT FZsEZwMk3kfFwybhrTzeLOwL2XuicYQTi9uFCdod4E8KztaJfenc3ERhoGxU8QP3v/6u zXcX2aHU0xPbw86pPXxeKa1ohYlx2UBpLr3bXKq2N+vkWSrGZmz3h/WwRwM2RMaaD8AO ANlQ== X-Gm-Message-State: ACgBeo1s1zx3ezO3FGUv3jeAJwqB1jFNsFFSQ2SmRSNUG1F5undZ0asf 7BXRJm/2oyHsVd8f3jBgZd7bkCuNCf6lGf2T X-Google-Smtp-Source: AA6agR4Rr7P3mRnZTOYfC5mhzC20Wd7G3IOUxeoxUyCt8tFOHy0InFIhekU6jG1JBKB0EO66iaLAYw== X-Received: by 2002:a05:6512:13a4:b0:477:a28a:2280 with SMTP id p36-20020a05651213a400b00477a28a2280mr615206lfa.689.1662535797407; Wed, 07 Sep 2022 00:29:57 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id w3-20020ac25983000000b0048a83336343sm2275507lfn.252.2022.09.07.00.29.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 00:29:57 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Mattias Forsblad Subject: [PATCH net-next v5 4/6] net: dsa: mv88e6xxxx: Add RMU functionality. Date: Wed, 7 Sep 2022 09:29:48 +0200 Message-Id: <20220907072950.2329571-5-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220907072950.2329571-1-mattias.forsblad@gmail.com> References: <20220907072950.2329571-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The Marvell SOHO switches supports a secondary control channel for accessing data in the switch. Special crafted ethernet frames can access functions in the switch. These frames is handled by the Remote Management Unit (RMU) in the switch. Accessing data structures is specially efficient and lessens the access contention on the MDIO bus. Signed-off-by: Mattias Forsblad --- drivers/net/dsa/mv88e6xxx/Makefile | 1 + drivers/net/dsa/mv88e6xxx/chip.c | 28 ++- drivers/net/dsa/mv88e6xxx/chip.h | 18 ++ drivers/net/dsa/mv88e6xxx/rmu.c | 309 +++++++++++++++++++++++++++++ drivers/net/dsa/mv88e6xxx/rmu.h | 28 +++ 5 files changed, 376 insertions(+), 8 deletions(-) create mode 100644 drivers/net/dsa/mv88e6xxx/rmu.c create mode 100644 drivers/net/dsa/mv88e6xxx/rmu.h diff --git a/drivers/net/dsa/mv88e6xxx/Makefile b/drivers/net/dsa/mv88e6xxx/Makefile index c8eca2b6f959..105d7bd832c9 100644 --- a/drivers/net/dsa/mv88e6xxx/Makefile +++ b/drivers/net/dsa/mv88e6xxx/Makefile @@ -15,3 +15,4 @@ mv88e6xxx-objs += port_hidden.o mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_PTP) += ptp.o mv88e6xxx-objs += serdes.o mv88e6xxx-objs += smi.o +mv88e6xxx-objs += rmu.o diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 46e12b53a9e4..bbdf229c9e71 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -42,6 +42,7 @@ #include "ptp.h" #include "serdes.h" #include "smi.h" +#include "rmu.h" static void assert_reg_lock(struct mv88e6xxx_chip *chip) { @@ -1535,14 +1536,6 @@ static int mv88e6xxx_trunk_setup(struct mv88e6xxx_chip *chip) return 0; } -static int mv88e6xxx_rmu_setup(struct mv88e6xxx_chip *chip) -{ - if (chip->info->ops->rmu_disable) - return chip->info->ops->rmu_disable(chip); - - return 0; -} - static int mv88e6xxx_pot_setup(struct mv88e6xxx_chip *chip) { if (chip->info->ops->pot_clear) @@ -6867,6 +6860,23 @@ static int mv88e6xxx_crosschip_lag_leave(struct dsa_switch *ds, int sw_index, return err_sync ? : err_pvt; } +static int mv88e6xxx_connect_tag_protocol(struct dsa_switch *ds, + enum dsa_tag_protocol proto) +{ + struct dsa_tagger_data *tagger_data = ds->tagger_data; + + switch (proto) { + case DSA_TAG_PROTO_DSA: + case DSA_TAG_PROTO_EDSA: + tagger_data->decode_frame2reg = mv88e6xxx_decode_frame2reg_handler; + break; + default: + return -EOPNOTSUPP; + } + + return 0; +} + static const struct dsa_switch_ops mv88e6xxx_switch_ops = { .get_tag_protocol = mv88e6xxx_get_tag_protocol, .change_tag_protocol = mv88e6xxx_change_tag_protocol, @@ -6932,6 +6942,8 @@ static const struct dsa_switch_ops mv88e6xxx_switch_ops = { .crosschip_lag_change = mv88e6xxx_crosschip_lag_change, .crosschip_lag_join = mv88e6xxx_crosschip_lag_join, .crosschip_lag_leave = mv88e6xxx_crosschip_lag_leave, + .master_state_change = mv88e6xxx_master_change, + .connect_tag_protocol = mv88e6xxx_connect_tag_protocol, }; static int mv88e6xxx_register_switch(struct mv88e6xxx_chip *chip) diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index 7ce3c41f6caf..e81935a9573d 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -282,6 +282,17 @@ struct mv88e6xxx_port { struct devlink_region *region; }; +struct mv88e6xxx_rmu { + /* RMU resources */ + struct net_device *master_netdev; + const struct mv88e6xxx_bus_ops *ops; + /* Mutex for RMU operations */ + struct mutex mutex; + u16 got_id; + u8 request_cmd; + int inband_seqno; +}; + enum mv88e6xxx_region_id { MV88E6XXX_REGION_GLOBAL1 = 0, MV88E6XXX_REGION_GLOBAL2, @@ -410,6 +421,9 @@ struct mv88e6xxx_chip { /* Bridge MST to SID mappings */ struct list_head msts; + + /* RMU resources */ + struct mv88e6xxx_rmu rmu; }; struct mv88e6xxx_bus_ops { @@ -805,4 +819,8 @@ static inline void mv88e6xxx_reg_unlock(struct mv88e6xxx_chip *chip) int mv88e6xxx_fid_map(struct mv88e6xxx_chip *chip, unsigned long *bitmap); +static inline bool mv88e6xxx_rmu_available(struct mv88e6xxx_chip *chip) +{ + return chip->rmu.master_netdev ? 1 : 0; +} #endif /* _MV88E6XXX_CHIP_H */ diff --git a/drivers/net/dsa/mv88e6xxx/rmu.c b/drivers/net/dsa/mv88e6xxx/rmu.c new file mode 100644 index 000000000000..9b36c437ae31 --- /dev/null +++ b/drivers/net/dsa/mv88e6xxx/rmu.c @@ -0,0 +1,309 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Marvell 88E6xxx Switch Remote Management Unit Support + * + * Copyright (c) 2022 Mattias Forsblad + * + */ + +#include +#include "rmu.h" +#include "global1.h" + +#define MV88E6XXX_DSA_HLEN 4 + +static const u8 rmu_dest_addr[ETH_ALEN] = { 0x01, 0x50, 0x43, 0x00, 0x00, 0x00 }; + +#define MV88E6XXX_RMU_L2_BYTE1_RESV_VAL 0x3e +#define MV88E6XXX_RMU 1 +#define MV88E6XXX_RMU_PRIO 6 +#define MV88E6XXX_RMU_RESV2 0xf + +#define MV88E6XXX_SOURCE_PORT GENMASK(6, 3) +#define MV88E6XXX_SOURCE_DEV GENMASK(5, 0) +#define MV88E6XXX_CPU_CODE_MASK GENMASK(7, 6) +#define MV88E6XXX_TRG_DEV_MASK GENMASK(4, 0) +#define MV88E6XXX_RMU_CODE_MASK GENMASK(1, 1) +#define MV88E6XXX_RMU_PRIO_MASK GENMASK(7, 5) +#define MV88E6XXX_RMU_L2_BYTE1_RESV GENMASK(7, 2) +#define MV88E6XXX_RMU_L2_BYTE2_RESV GENMASK(3, 0) + +#define MV88E6XXX_RMU_RESP_FORMAT_1 0x0001 +#define MV88E6XXX_RMU_RESP_FORMAT_2 0x0002 +#define MV88E6XXX_RMU_RESP_ERROR 0xffff + +#define MV88E6XXX_RMU_RESP_CODE_GOT_ID 0x0000 +#define MV88E6XXX_RMU_RESP_CODE_DUMP_MIB 0x1020 + +static void mv88e6xxx_rmu_create_l2(struct sk_buff *skb, struct dsa_port *dp) +{ + struct mv88e6xxx_chip *chip = dp->ds->priv; + struct ethhdr *eth; + u8 *edsa_header; + u8 *dsa_header; + u8 extra = 0; + + if (chip->tag_protocol == DSA_TAG_PROTO_EDSA) + extra = 4; + + /* Create RMU L2 header */ + dsa_header = skb_push(skb, 6); + dsa_header[0] = FIELD_PREP(MV88E6XXX_CPU_CODE_MASK, MV88E6XXX_RMU); + dsa_header[0] |= FIELD_PREP(MV88E6XXX_TRG_DEV_MASK, dp->ds->index); + dsa_header[1] = FIELD_PREP(MV88E6XXX_RMU_CODE_MASK, 1); + dsa_header[1] |= FIELD_PREP(MV88E6XXX_RMU_L2_BYTE1_RESV, MV88E6XXX_RMU_L2_BYTE1_RESV_VAL); + dsa_header[2] = FIELD_PREP(MV88E6XXX_RMU_PRIO_MASK, MV88E6XXX_RMU_PRIO); + dsa_header[2] |= MV88E6XXX_RMU_L2_BYTE2_RESV; + dsa_header[3] = ++chip->rmu.inband_seqno; + dsa_header[4] = 0; + dsa_header[5] = 0; + + /* Insert RMU MAC destination address /w extra if needed */ + skb_push(skb, ETH_ALEN * 2 + extra); + eth = (struct ethhdr *)skb->data; + memcpy(eth->h_dest, rmu_dest_addr, ETH_ALEN); + memcpy(eth->h_source, chip->rmu.master_netdev->dev_addr, ETH_ALEN); + + if (extra) { + edsa_header = (u8 *)ð->h_proto; + edsa_header[0] = (ETH_P_EDSA >> 8) & 0xff; + edsa_header[1] = ETH_P_EDSA & 0xff; + edsa_header[2] = 0x00; + edsa_header[3] = 0x00; + } +} + +static int mv88e6xxx_rmu_send_wait(struct mv88e6xxx_chip *chip, int port, + int request, const char *msg, int len) +{ + struct dsa_port *dp; + struct sk_buff *skb; + unsigned char *data; + int ret = 0; + + dp = dsa_to_port(chip->ds, port); + if (!dp) + return 0; + + skb = netdev_alloc_skb(chip->rmu.master_netdev, 64); + if (!skb) + return -ENOMEM; + + /* Take height for an eventual EDSA header */ + skb_reserve(skb, 2 * ETH_HLEN + 4); + skb_reset_network_header(skb); + + /* Insert RMU L3 message */ + data = skb_put(skb, len); + memcpy(data, msg, len); + + mv88e6xxx_rmu_create_l2(skb, dp); + + mutex_lock(&chip->rmu.mutex); + + chip->rmu.request_cmd = request; + + ret = dsa_switch_inband_tx(dp->ds, skb, NULL, MV88E6XXX_RMU_WAIT_TIME_MS); + if (ret < 0) { + dev_err(chip->dev, + "RMU: timeout waiting for request %d (%pe) on port %d\n", + request, ERR_PTR(ret), port); + } + + mutex_unlock(&chip->rmu.mutex); + + return ret > 0 ? 0 : ret; +} + +static int mv88e6xxx_rmu_get_id(struct mv88e6xxx_chip *chip, int port) +{ + const u8 get_id[8] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + int ret = -1; + + if (chip->rmu.got_id) + return 0; + + ret = mv88e6xxx_rmu_send_wait(chip, port, MV88E6XXX_RMU_REQ_GET_ID, get_id, 8); + if (ret) { + dev_dbg(chip->dev, "RMU: error for command GET_ID %pe\n", ERR_PTR(ret)); + return ret; + } + + return 0; +} + +static int mv88e6xxx_rmu_stats_get(struct mv88e6xxx_chip *chip, int port, uint64_t *data) +{ + u8 dump_mib[8] = { 0x00, 0x01, 0x00, 0x00, 0x10, 0x20, 0x00, 0x00 }; + int ret; + + ret = mv88e6xxx_rmu_get_id(chip, port); + if (ret) + return ret; + + /* Send a GET_MIB command */ + dump_mib[7] = port; + ret = mv88e6xxx_rmu_send_wait(chip, port, MV88E6XXX_RMU_REQ_DUMP_MIB, dump_mib, 8); + if (ret) { + dev_dbg(chip->dev, "RMU: error for command DUMP_MIB %pe port %d\n", + ERR_PTR(ret), port); + return ret; + } + + /* Update MIB for port */ + if (chip->info->ops->stats_get_stats) + return chip->info->ops->stats_get_stats(chip, port, data); + + return 0; +} + +void mv88e6xxx_master_change(struct dsa_switch *ds, const struct net_device *master, + bool operational) +{ + struct mv88e6xxx_chip *chip = ds->priv; + struct dsa_port *cpu_dp; + int port; + + cpu_dp = master->dsa_ptr; + port = dsa_towards_port(ds, cpu_dp->ds->index, cpu_dp->index); + + mv88e6xxx_reg_lock(chip); + + if (operational) { + if (chip->info->ops->rmu_enable) { + if (!chip->info->ops->rmu_enable(chip, port)) { + dev_dbg(chip->dev, "RMU: Enabled on port %d", port); + chip->rmu.master_netdev = (struct net_device *)master; + } else { + dev_err(chip->dev, "RMU: Unable to enable on port %d", port); + } + } + + } else { + chip->rmu.master_netdev = NULL; + if (chip->info->ops->rmu_disable) + chip->info->ops->rmu_disable(chip); + } + + mv88e6xxx_reg_unlock(chip); +} + +static void mv88e6xxx_prod_id_handler(struct dsa_switch *ds, struct sk_buff *skb) +{ + struct mv88e6xxx_chip *chip = ds->priv; + u16 prodnum; + + prodnum = get_unaligned_be16(&skb->data[2]); + chip->rmu.got_id = prodnum; + dev_dbg_ratelimited(chip->dev, "RMU: received id OK with product number: 0x%04x\n", + chip->rmu.got_id); +} + +static void mv88e6xxx_mib_handler(struct dsa_switch *ds, struct sk_buff *skb) +{ + struct mv88e6xxx_chip *chip = ds->priv; + struct mv88e6xxx_port *p; + u8 port; + int i; + + port = FIELD_GET(MV88E6XXX_SOURCE_PORT, skb->data[7]); + p = &chip->ports[port]; + if (!p) { + dev_err_ratelimited(chip->dev, "RMU: illegal port number in response: %d\n", port); + return; + } + + /* Copy whole array for further + * processing according to chip type + */ + for (i = 0; i < MV88E6XXX_RMU_MAX_RMON; i++) + p->rmu_raw_stats[i] = get_unaligned_be32(&skb->data[12 + i * 4]); +} + +static int mv88e6xxx_validate_mac(struct dsa_switch *ds, struct sk_buff *skb) +{ + struct mv88e6xxx_chip *chip = ds->priv; + unsigned char *ethhdr; + + /* Check matching MAC */ + ethhdr = skb_mac_header(skb); + if (!ether_addr_equal(chip->rmu.master_netdev->dev_addr, ethhdr)) { + dev_dbg_ratelimited(ds->dev, "RMU: mismatching MAC address for request. Rx %pM expecting %pM\n", + ethhdr, chip->rmu.master_netdev->dev_addr); + return -EINVAL; + } + + return 0; +} + +void mv88e6xxx_decode_frame2reg_handler(struct net_device *dev, struct sk_buff *skb) +{ + struct dsa_port *dp = dev->dsa_ptr; + struct dsa_switch *ds = dp->ds; + struct mv88e6xxx_chip *chip; + int source_device; + u8 *dsa_header; + u16 format; + u16 code; + u8 seqno; + + if (mv88e6xxx_validate_mac(ds, skb)) + return; + + /* Decode Frame2Reg DSA portion */ + dsa_header = skb->data - 2; + + source_device = FIELD_GET(MV88E6XXX_SOURCE_DEV, dsa_header[0]); + ds = dsa_switch_find(ds->dst->index, source_device); + if (!ds) { + net_dbg_ratelimited("RMU: Didn't find switch with index %d", source_device); + return; + } + + chip = ds->priv; + seqno = dsa_header[3]; + if (seqno != chip->rmu.inband_seqno) { + net_dbg_ratelimited("RMU: wrong seqno received. Was %d, expected %d", + seqno, chip->rmu.inband_seqno); + return; + } + + /* Pull DSA L2 data */ + skb_pull(skb, MV88E6XXX_DSA_HLEN); + + format = get_unaligned_be16(&skb->data[0]); + if (format != MV88E6XXX_RMU_RESP_FORMAT_1 && + format != MV88E6XXX_RMU_RESP_FORMAT_2) { + net_dbg_ratelimited("RMU: received unknown format 0x%04x", format); + return; + } + + code = get_unaligned_be16(&skb->data[4]); + if (code == MV88E6XXX_RMU_RESP_ERROR) { + net_dbg_ratelimited("RMU: error response code 0x%04x", code); + return; + } + + if (code == MV88E6XXX_RMU_RESP_CODE_GOT_ID) + mv88e6xxx_prod_id_handler(ds, skb); + else if (code == MV88E6XXX_RMU_RESP_CODE_DUMP_MIB) + mv88e6xxx_mib_handler(ds, skb); + + dsa_switch_inband_complete(ds, NULL); +} + +static const struct mv88e6xxx_bus_ops mv88e6xxx_bus_ops = { + .get_rmon = mv88e6xxx_rmu_stats_get, +}; + +int mv88e6xxx_rmu_setup(struct mv88e6xxx_chip *chip) +{ + mutex_init(&chip->rmu.mutex); + + chip->rmu.ops = &mv88e6xxx_bus_ops; + + if (chip->info->ops->rmu_disable) + return chip->info->ops->rmu_disable(chip); + + return 0; +} diff --git a/drivers/net/dsa/mv88e6xxx/rmu.h b/drivers/net/dsa/mv88e6xxx/rmu.h new file mode 100644 index 000000000000..cf84b7005331 --- /dev/null +++ b/drivers/net/dsa/mv88e6xxx/rmu.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Marvell 88E6xxx Switch Remote Management Unit Support + * + * Copyright (c) 2022 Mattias Forsblad + * + */ + +#ifndef _MV88E6XXX_RMU_H_ +#define _MV88E6XXX_RMU_H_ + +#include "chip.h" + +#define MV88E6XXX_RMU_MAX_RMON 64 + +#define MV88E6XXX_RMU_REQ_GET_ID 1 +#define MV88E6XXX_RMU_REQ_DUMP_MIB 2 + +#define MV88E6XXX_RMU_WAIT_TIME_MS 20 + +int mv88e6xxx_rmu_setup(struct mv88e6xxx_chip *chip); + +void mv88e6xxx_master_change(struct dsa_switch *ds, const struct net_device *master, + bool operational); + +void mv88e6xxx_decode_frame2reg_handler(struct net_device *dev, struct sk_buff *skb); + +#endif /* _MV88E6XXX_RMU_H_ */ From patchwork Wed Sep 7 07:29:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12968521 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E49B1ECAAD3 for ; Wed, 7 Sep 2022 07:30:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229713AbiIGHah (ORCPT ); Wed, 7 Sep 2022 03:30:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34312 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229715AbiIGHaG (ORCPT ); Wed, 7 Sep 2022 03:30:06 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3DEB46235 for ; Wed, 7 Sep 2022 00:29:59 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id u18so8756384lfo.8 for ; Wed, 07 Sep 2022 00:29:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=LxrY8W4Dz89WPRlYtgGZD7N0n+0CsAyn/ajZNgWy40o=; b=mQjbs9m8kIoPgOaT17s0jAJZqo1HGQwplfgngx9iW0ODTEQZlGDFR0bd9nd+j1zJN8 Y7T84rmKQ6n9SqpKfa81IXsMU0kw64/27jwJE7O/t2pBjs0oiH6my33cF1+NxQ3sICiu wBK5AyRql2DtViu46xhzqv1kIB4/ntXLMeTcdN2JxhTWUHGvAPg1BZ2m1ieKmP9e2BBD 2bUCpDONs9DFasB3tJRJjxPTIIhzw8NXpESYdrUmjwOIquIxYSvtSOQniHjtDrJBNVdD b4Q9CH2X1gan3z0hxJXXxyjp2Hc8hqnUIm1WOoZjAKiMPr2O3GbQTptXhNYKNml5IbCf iXmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=LxrY8W4Dz89WPRlYtgGZD7N0n+0CsAyn/ajZNgWy40o=; b=XPcluyvb+Mfr+7tf2QM3E49ibOvZxbBywaPDyAQl0h1514YbQDEAMhFsifpNz8xa/m /P5D1y7/pqKVgKyXr8aBVPMuF0jrFrt/SHyc9OZGGxugU+TwAclGa+yKx3SChDCocBQr b3/jx/BzhodZ6UDV41VpWTJSahWAiuy2BgMj59ZVAcUDOldjUM+LBh+Pa6RkPg/Doa0n XL6kApNij/sOqUP7kRqz5xswpTyRXdTH8wGSLIXy4+NQrTcJcle52pZX/pMWTYDSme61 JRlDOZvZU6KpRFDhkdYi4pfRvocPT7VcwAuX2Y0Ay23cXZTdGWaKTdNCEvUVYToyTFNC Zn6Q== X-Gm-Message-State: ACgBeo0Pyw1Ap3P2Yr5Cfq5MRaQ91qqZBefD/sLvec/CJl8pxD33p1Ru eSx1IiW9Aka8cqifnKu02Yyx5F8AO82vbywZ X-Google-Smtp-Source: AA6agR6lXqXw36oMsyROQ4/SwYo+IGFu96ENhXgAvLp0gCleso8ItoKfwOqqj7rve/xfdlNP2Y4EZw== X-Received: by 2002:a19:690d:0:b0:497:771c:3974 with SMTP id e13-20020a19690d000000b00497771c3974mr627116lfc.360.1662535798087; Wed, 07 Sep 2022 00:29:58 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id w3-20020ac25983000000b0048a83336343sm2275507lfn.252.2022.09.07.00.29.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 00:29:57 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Mattias Forsblad Subject: [PATCH net-next v5 5/6] net: dsa: mv88e6xxx: rmon: Use RMU for reading RMON data Date: Wed, 7 Sep 2022 09:29:49 +0200 Message-Id: <20220907072950.2329571-6-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220907072950.2329571-1-mattias.forsblad@gmail.com> References: <20220907072950.2329571-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Use the Remote Management Unit for efficiently accessing the RMON data. Signed-off-by: Mattias Forsblad --- drivers/net/dsa/mv88e6xxx/chip.c | 39 ++++++++++++++++++++++++++------ drivers/net/dsa/mv88e6xxx/chip.h | 2 ++ 2 files changed, 34 insertions(+), 7 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index bbdf229c9e71..f32048de68fc 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -1234,16 +1234,30 @@ static int mv88e6xxx_stats_get_stats(struct mv88e6xxx_chip *chip, int port, u16 bank1_select, u16 histogram) { struct mv88e6xxx_hw_stat *stat; + int offset = 0; + u64 high; int i, j; for (i = 0, j = 0; i < ARRAY_SIZE(mv88e6xxx_hw_stats); i++) { stat = &mv88e6xxx_hw_stats[i]; if (stat->type & types) { - mv88e6xxx_reg_lock(chip); - data[j] = _mv88e6xxx_get_ethtool_stat(chip, stat, port, - bank1_select, - histogram); - mv88e6xxx_reg_unlock(chip); + if (mv88e6xxx_rmu_available(chip) && + !(stat->type & STATS_TYPE_PORT)) { + if (stat->type & STATS_TYPE_BANK1) + offset = 32; + + data[j] = chip->ports[port].rmu_raw_stats[stat->reg + offset]; + if (stat->size == 8) { + high = chip->ports[port].rmu_raw_stats[stat->reg + offset + + 1]; + data[j] += (high << 32); + } + } else { + mv88e6xxx_reg_lock(chip); + data[j] = _mv88e6xxx_get_ethtool_stat(chip, stat, port, + bank1_select, histogram); + mv88e6xxx_reg_unlock(chip); + } j++; } @@ -1312,8 +1326,8 @@ static void mv88e6xxx_get_stats(struct mv88e6xxx_chip *chip, int port, mv88e6xxx_reg_unlock(chip); } -static void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, int port, - uint64_t *data) +static void mv88e6xxx_get_ethtool_stats_mdio(struct dsa_switch *ds, int port, + uint64_t *data) { struct mv88e6xxx_chip *chip = ds->priv; int ret; @@ -1327,7 +1341,18 @@ static void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, int port, return; mv88e6xxx_get_stats(chip, port, data); +} +static void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, int port, + uint64_t *data) +{ + struct mv88e6xxx_chip *chip = ds->priv; + + /* If RMU isn't available fall back to MDIO access. */ + if (mv88e6xxx_rmu_available(chip)) + chip->rmu.ops->get_rmon(chip, port, data); + else + mv88e6xxx_get_ethtool_stats_mdio(ds, port, data); } static int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port) diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index e81935a9573d..c7477b716473 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -266,6 +266,7 @@ struct mv88e6xxx_vlan { struct mv88e6xxx_port { struct mv88e6xxx_chip *chip; int port; + u64 rmu_raw_stats[64]; struct mv88e6xxx_vlan bridge_pvid; u64 serdes_stats[2]; u64 atu_member_violation; @@ -430,6 +431,7 @@ struct mv88e6xxx_bus_ops { int (*read)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val); int (*write)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val); int (*init)(struct mv88e6xxx_chip *chip); + int (*get_rmon)(struct mv88e6xxx_chip *chip, int port, uint64_t *data); }; struct mv88e6xxx_mdio_bus { From patchwork Wed Sep 7 07:29:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12968526 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3945C6FA83 for ; Wed, 7 Sep 2022 07:31:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229844AbiIGHao (ORCPT ); Wed, 7 Sep 2022 03:30:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229716AbiIGHaG (ORCPT ); Wed, 7 Sep 2022 03:30:06 -0400 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C017C481C1 for ; Wed, 7 Sep 2022 00:30:00 -0700 (PDT) Received: by mail-lj1-x22f.google.com with SMTP id c10so5443469ljj.2 for ; Wed, 07 Sep 2022 00:30:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=f/0j/+ErzTE6lgqBL+X99uyT3sFRj/WP+OI3F6HeGd4=; b=R3DaCzGRwElkvHVPMygysacnIFIEPJl7w4gYeqylTDJtuj/rOZuu84+YCG4EK+KxmK mUQbCzB6FOCVNYVjhSwNwxG5tEcyXhmMyLcRMTdVv9SwH/jfwyh1Y5BEU4UWjuKU2Dy/ Ak0Cu/abpzuZujtWwoYFvLTwQ9oOuiyBy73pMtykGJrPFue5xBNzg7SeBXWPPjYlJMze 5XoRT+3ftlaktJx/vCabi8zSkJX0BRI87p/xHuR7D/VA5pyQAclGjgQ2z+yBnnVIVC83 msikKSk4rlcxQ+MxFH/d5flgBzL8HKRrSuND2oUPd37lX1m1vyfyS6EMXtGeOlgS0LN+ rYYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=f/0j/+ErzTE6lgqBL+X99uyT3sFRj/WP+OI3F6HeGd4=; b=ZwN5jtQBu3NVdAKOBO3GjXDa0HsHmYmyn/0qThruUksYEe9UlwFY90xjsDKs7Q8THq 6t0JEZPBDEOYIl408VNnEb0rIetIOwnIfRdgQnS/ypH9vPxe8ZibT6TWhL0YpfZzFDmO +XEnvqps+3fKR2cZqT6LgKzcTGJnT4VP9NZv6JHJjeBZGTpV/k9Gl34PFQCxjgH+lnxp /zq7Vp2bg6ldQpnDFyuWxiiK+S5/opaRHl6EwuL/cYP6BmX0XQyf3r4c43xEPII1yDPI KM3n/kMZl8Afgdy+Q+SJeNrMPW/1LJu/2xhezXxk4stEYKEqWAGqxvDo0oHXywgEsKZ9 dKkg== X-Gm-Message-State: ACgBeo28vRwdPekjgd8hl6zP5II4sxHfWBK0BgyMgOpGKbFdbhXEG9XA CpuYELaUJpJzAGGsmNC+qDoe87O8tND6UKiC X-Google-Smtp-Source: AA6agR66w2o7IWQi2R0SQXtce3uGevLQgaeQiZWmcn3D9ZpMHki4wQvQ5Q784px4xchC2Y0ZTQzAZg== X-Received: by 2002:a05:651c:1501:b0:25e:c393:f2e1 with SMTP id e1-20020a05651c150100b0025ec393f2e1mr533944ljf.341.1662535798854; Wed, 07 Sep 2022 00:29:58 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id w3-20020ac25983000000b0048a83336343sm2275507lfn.252.2022.09.07.00.29.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 00:29:58 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Mattias Forsblad Subject: [PATCH net-next v5 6/6] net: dsa: qca8k: Use new convenience functions Date: Wed, 7 Sep 2022 09:29:50 +0200 Message-Id: <20220907072950.2329571-7-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220907072950.2329571-1-mattias.forsblad@gmail.com> References: <20220907072950.2329571-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Use the new common convenience functions for sending and waiting for frames. Signed-off-by: Mattias Forsblad --- drivers/net/dsa/qca/qca8k-8xxx.c | 61 +++++++++----------------------- 1 file changed, 17 insertions(+), 44 deletions(-) diff --git a/drivers/net/dsa/qca/qca8k-8xxx.c b/drivers/net/dsa/qca/qca8k-8xxx.c index 1d3e7782a71f..7c9782be8dfe 100644 --- a/drivers/net/dsa/qca/qca8k-8xxx.c +++ b/drivers/net/dsa/qca/qca8k-8xxx.c @@ -160,7 +160,7 @@ static void qca8k_rw_reg_ack_handler(struct dsa_switch *ds, struct sk_buff *skb) QCA_HDR_MGMT_DATA2_LEN); } - complete(&mgmt_eth_data->rw_done); + dsa_switch_inband_complete(ds, &mgmt_eth_data->rw_done); } static struct sk_buff *qca8k_alloc_mdio_header(enum mdio_cmd cmd, u32 reg, u32 *val, @@ -228,6 +228,7 @@ static void qca8k_mdio_header_fill_seq_num(struct sk_buff *skb, u32 seq_num) static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) { struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; + struct dsa_switch *ds = priv->ds; struct sk_buff *skb; bool ack; int ret; @@ -248,17 +249,12 @@ static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) skb->dev = priv->mgmt_master; - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the mdio pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(skb); - - ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, - msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); + ret = dsa_switch_inband_tx(ds, skb, &mgmt_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); *val = mgmt_eth_data->data[0]; if (len > QCA_HDR_MGMT_DATA1_LEN) @@ -280,6 +276,7 @@ static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) { struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; + struct dsa_switch *ds = priv->ds; struct sk_buff *skb; bool ack; int ret; @@ -300,17 +297,12 @@ static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) skb->dev = priv->mgmt_master; - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the mdio pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(skb); - - ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, - msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); + ret = dsa_switch_inband_tx(ds, skb, &mgmt_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); ack = mgmt_eth_data->ack; @@ -441,24 +433,21 @@ static struct regmap_config qca8k_regmap_config = { }; static int -qca8k_phy_eth_busy_wait(struct qca8k_mgmt_eth_data *mgmt_eth_data, +qca8k_phy_eth_busy_wait(struct qca8k_priv *priv, struct sk_buff *read_skb, u32 *val) { + struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; struct sk_buff *skb = skb_copy(read_skb, GFP_KERNEL); + struct dsa_switch *ds = priv->ds; bool ack; int ret; - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the copy pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(skb); - - ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, - QCA8K_ETHERNET_TIMEOUT); + ret = dsa_switch_inband_tx(ds, skb, &mgmt_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); ack = mgmt_eth_data->ack; @@ -480,6 +469,7 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, struct sk_buff *write_skb, *clear_skb, *read_skb; struct qca8k_mgmt_eth_data *mgmt_eth_data; u32 write_val, clear_val = 0, val; + struct dsa_switch *ds = priv->ds; struct net_device *mgmt_master; int ret, ret1; bool ack; @@ -540,17 +530,12 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, clear_skb->dev = mgmt_master; write_skb->dev = mgmt_master; - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the write pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(write_skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(write_skb); - - ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, - QCA8K_ETHERNET_TIMEOUT); + ret = dsa_switch_inband_tx(ds, write_skb, &mgmt_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); ack = mgmt_eth_data->ack; @@ -569,7 +554,7 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, ret = read_poll_timeout(qca8k_phy_eth_busy_wait, ret1, !(val & QCA8K_MDIO_MASTER_BUSY), 0, QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false, - mgmt_eth_data, read_skb, &val); + priv, read_skb, &val); if (ret < 0 && ret1 < 0) { ret = ret1; @@ -577,17 +562,13 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, } if (read) { - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the read pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(read_skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(read_skb); - - ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, - QCA8K_ETHERNET_TIMEOUT); + ret = dsa_switch_inband_tx(ds, read_skb, &mgmt_eth_data->rw_done, + QCA8K_ETHERNET_TIMEOUT); ack = mgmt_eth_data->ack; @@ -606,17 +587,12 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, kfree_skb(read_skb); } exit: - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the clear pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(clear_skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(clear_skb); - - wait_for_completion_timeout(&mgmt_eth_data->rw_done, - QCA8K_ETHERNET_TIMEOUT); + ret = dsa_switch_inband_tx(ds, clear_skb, &mgmt_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); mutex_unlock(&mgmt_eth_data->mutex); @@ -1528,7 +1504,7 @@ static void qca8k_mib_autocast_handler(struct dsa_switch *ds, struct sk_buff *sk exit: /* Complete on receiving all the mib packet */ if (refcount_dec_and_test(&mib_eth_data->port_parsed)) - complete(&mib_eth_data->rw_done); + dsa_switch_inband_complete(ds, &mib_eth_data->rw_done); } static int @@ -1543,8 +1519,6 @@ qca8k_get_ethtool_stats_eth(struct dsa_switch *ds, int port, u64 *data) mutex_lock(&mib_eth_data->mutex); - reinit_completion(&mib_eth_data->rw_done); - mib_eth_data->req_port = dp->index; mib_eth_data->data = data; refcount_set(&mib_eth_data->port_parsed, QCA8K_NUM_PORTS); @@ -1562,8 +1536,7 @@ qca8k_get_ethtool_stats_eth(struct dsa_switch *ds, int port, u64 *data) if (ret) goto exit; - ret = wait_for_completion_timeout(&mib_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); - + ret = dsa_switch_inband_tx(ds, NULL, &mib_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); exit: mutex_unlock(&mib_eth_data->mutex);