From patchwork Fri Sep 9 16:01:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun Ramadoss X-Patchwork-Id: 12971955 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEF13ECAAD3 for ; Fri, 9 Sep 2022 16:02:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231899AbiIIQCG (ORCPT ); Fri, 9 Sep 2022 12:02:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231865AbiIIQCF (ORCPT ); Fri, 9 Sep 2022 12:02:05 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B086711C7F0; Fri, 9 Sep 2022 09:02:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662739323; x=1694275323; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=N05LaTposXkrpjVrBrQZHf1RME6l3Rzlna7LDjHyUAE=; b=rN5nUT5pNW2ADrT3Jo2nLbJPPc15IF/LiS70DEglXICLR7u8oQY8kQme 7Yf4XKDMsr5KQP2KqwVpEaBGBhrC0CEclO9iwMjqGvv91EwdkMpI6J/Rp RwDh4TwjJ1+J5HLsqpN6B8YtouIEk3q9rbGJArZ+GyrI7SLIw/Qe6k68X ohV3raK1vqf5RGHxxren8sH//86aY4YbGWV3NzB6uK8tmcx1hm4ATl47W EujhHyaIMFTfwVpsv2q7OuUI2yMMRPxlmRQ2r2sXPK3nCfAZpNh9byycE YDlR6KT7txRzrimwP8ww0DYeZi2rSLq4qXohV6HDyX5ZXzc8W2OBNDQr0 Q==; X-IronPort-AV: E=Sophos;i="5.93,303,1654585200"; d="scan'208";a="179767115" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Sep 2022 09:02:03 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 9 Sep 2022 09:01:56 -0700 Received: from CHE-LT-I17769U.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 9 Sep 2022 09:01:51 -0700 From: Arun Ramadoss To: , CC: , , , , , , , , , , , Subject: [RFC Patch net-next 1/4] net: dsa: microchip: determine number of port irq based on switch type Date: Fri, 9 Sep 2022 21:31:17 +0530 Message-ID: <20220909160120.9101-2-arun.ramadoss@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220909160120.9101-1-arun.ramadoss@microchip.com> References: <20220909160120.9101-1-arun.ramadoss@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Currently the number of port irqs is hard coded for the lan937x switch as 6. In order to make the generic interrupt handler for ksz switches, number of port irq supported by the switch is added to the ksz_chip_data. It is 4 for ksz9477, 2 for ksz9897 and 3 for ksz9567. Signed-off-by: Arun Ramadoss Reviewed-by: Andrew Lunn --- drivers/net/dsa/microchip/ksz_common.c | 9 +++++++++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/lan937x_main.c | 4 +--- 3 files changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index fcaa71f66322..b91089a483e7 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1168,6 +1168,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { .num_statics = 16, .cpu_ports = 0x7F, /* can be configured as cpu port */ .port_cnt = 7, /* total physical port count */ + .port_nirqs = 4, .ops = &ksz9477_dev_ops, .phy_errata_9477 = true, .mib_names = ksz9477_mib_names, @@ -1230,6 +1231,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { .num_statics = 16, .cpu_ports = 0x7F, /* can be configured as cpu port */ .port_cnt = 7, /* total physical port count */ + .port_nirqs = 2, .ops = &ksz9477_dev_ops, .phy_errata_9477 = true, .mib_names = ksz9477_mib_names, @@ -1259,6 +1261,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { .num_statics = 16, .cpu_ports = 0x07, /* can be configured as cpu port */ .port_cnt = 3, /* total port count */ + .port_nirqs = 2, .ops = &ksz9477_dev_ops, .mib_names = ksz9477_mib_names, .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), @@ -1283,6 +1286,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { .num_statics = 16, .cpu_ports = 0x7F, /* can be configured as cpu port */ .port_cnt = 7, /* total physical port count */ + .port_nirqs = 3, .ops = &ksz9477_dev_ops, .phy_errata_9477 = true, .mib_names = ksz9477_mib_names, @@ -1312,6 +1316,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { .num_statics = 256, .cpu_ports = 0x10, /* can be configured as cpu port */ .port_cnt = 5, /* total physical port count */ + .port_nirqs = 6, .ops = &lan937x_dev_ops, .mib_names = ksz9477_mib_names, .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), @@ -1335,6 +1340,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { .num_statics = 256, .cpu_ports = 0x30, /* can be configured as cpu port */ .port_cnt = 6, /* total physical port count */ + .port_nirqs = 6, .ops = &lan937x_dev_ops, .mib_names = ksz9477_mib_names, .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), @@ -1358,6 +1364,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { .num_statics = 256, .cpu_ports = 0x30, /* can be configured as cpu port */ .port_cnt = 8, /* total physical port count */ + .port_nirqs = 6, .ops = &lan937x_dev_ops, .mib_names = ksz9477_mib_names, .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), @@ -1385,6 +1392,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { .num_statics = 256, .cpu_ports = 0x38, /* can be configured as cpu port */ .port_cnt = 5, /* total physical port count */ + .port_nirqs = 6, .ops = &lan937x_dev_ops, .mib_names = ksz9477_mib_names, .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), @@ -1412,6 +1420,7 @@ const struct ksz_chip_data ksz_switch_chips[] = { .num_statics = 256, .cpu_ports = 0x30, /* can be configured as cpu port */ .port_cnt = 8, /* total physical port count */ + .port_nirqs = 6, .ops = &lan937x_dev_ops, .mib_names = ksz9477_mib_names, .mib_cnt = ARRAY_SIZE(ksz9477_mib_names), diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index 6203dcd8c8f7..baa1e1bc1b7c 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -45,6 +45,7 @@ struct ksz_chip_data { int num_statics; int cpu_ports; int port_cnt; + u8 port_nirqs; const struct ksz_dev_ops *ops; bool phy_errata_9477; bool ksz87xx_eee_link_erratum; diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c index 9b6760b1e572..7136d9c55315 100644 --- a/drivers/net/dsa/microchip/lan937x_main.c +++ b/drivers/net/dsa/microchip/lan937x_main.c @@ -20,8 +20,6 @@ #include "ksz_common.h" #include "lan937x.h" -#define LAN937x_PNIRQS 6 - static int lan937x_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set) { return regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0); @@ -697,7 +695,7 @@ static int lan937x_pirq_setup(struct ksz_device *dev, u8 p) int ret, irq; int irq_num; - port->pirq.nirqs = LAN937x_PNIRQS; + port->pirq.nirqs = dev->info->port_nirqs; port->pirq.domain = irq_domain_add_simple(dev->dev->of_node, port->pirq.nirqs, 0, &lan937x_pirq_domain_ops, From patchwork Fri Sep 9 16:01:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun Ramadoss X-Patchwork-Id: 12971956 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 051B0ECAAA1 for ; Fri, 9 Sep 2022 16:02:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232027AbiIIQCY (ORCPT ); Fri, 9 Sep 2022 12:02:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231966AbiIIQCJ (ORCPT ); Fri, 9 Sep 2022 12:02:09 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 35E4311C7F0; Fri, 9 Sep 2022 09:02:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662739326; x=1694275326; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FX3EoD/dBRgSe79PLVfWACPg00qOURLb460tBUUxzcQ=; b=DENlWMyHCuwa+xoIsHOyZFVGIQrdtgNNwIw5Mk0uBtHtHhKDalcD4unG Skw2011/HCcNKSxN4nSEHndGSkuKdbp1OJrUykT2/yOyJgXvKEEJHFCgQ JlEwgFn0LE/BwnyueZr5uzNYG7ahPgx3SR4GDWKwnpkwRhdeIJM/xdspK aP3EN2Z20BoVx0NfDfNFB/JcsGGQuxNhvFCdqB/47lmt08HUSRdy3rzAG gJXjG+kCMDFKmCzb7cMcgcAMnhOQREiSKrVVJ7OmjRoUfieWBL0n5Ds8s NkMVv3SK8qynEvSLSSg29FcMllNPnjcXj2hS3K5t0sQuh4iipRm+NfcH+ Q==; X-IronPort-AV: E=Sophos;i="5.93,303,1654585200"; d="scan'208";a="179874779" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Sep 2022 09:02:05 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 9 Sep 2022 09:02:04 -0700 Received: from CHE-LT-I17769U.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 9 Sep 2022 09:01:59 -0700 From: Arun Ramadoss To: , CC: , , , , , , , , , , , Subject: [RFC Patch net-next 2/4] net: dsa: microchip: enable phy interrupts only if interrupt enabled in dts Date: Fri, 9 Sep 2022 21:31:18 +0530 Message-ID: <20220909160120.9101-3-arun.ramadoss@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220909160120.9101-1-arun.ramadoss@microchip.com> References: <20220909160120.9101-1-arun.ramadoss@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC In the lan937x_mdio_register function, phy interrupts are enabled irrespective of irq is enabled in the switch. Now, the check is added to enable the phy interrupt only if the irq is enabled in the switch. Signed-off-by: Arun Ramadoss Reviewed-by: Andrew Lunn --- drivers/net/dsa/microchip/lan937x_main.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c index 7136d9c55315..1f4472c90a1f 100644 --- a/drivers/net/dsa/microchip/lan937x_main.c +++ b/drivers/net/dsa/microchip/lan937x_main.c @@ -235,15 +235,18 @@ static int lan937x_mdio_register(struct ksz_device *dev) ds->slave_mii_bus = bus; - ret = lan937x_irq_phy_setup(dev); - if (ret) - return ret; + if (dev->irq > 0) { + ret = lan937x_irq_phy_setup(dev); + if (ret) + return ret; + } ret = devm_of_mdiobus_register(ds->dev, bus, mdio_np); if (ret) { dev_err(ds->dev, "unable to register MDIO bus %s\n", bus->id); - lan937x_irq_phy_free(dev); + if (dev->irq > 0) + lan937x_irq_phy_free(dev); } of_node_put(mdio_np); From patchwork Fri Sep 9 16:01:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun Ramadoss X-Patchwork-Id: 12971958 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E56DEECAAD3 for ; Fri, 9 Sep 2022 16:03:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232203AbiIIQDJ (ORCPT ); Fri, 9 Sep 2022 12:03:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232093AbiIIQCg (ORCPT ); Fri, 9 Sep 2022 12:02:36 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B330C10D709; Fri, 9 Sep 2022 09:02:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662739344; x=1694275344; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pFRmJWaZX4ddCd5aoTmUMSumtf5AcVR3xQvKQgfN4i0=; b=vjNsPIMDgyIVuI+KomzPFWci0MMPmIxHYt9facrLSF/as50pDzKfqwC6 R8KT8NX0VKHRVC6J0fxCm5+RrniNXp7VhYyokeHPe432hkDtE6K0L86Hg i+zirIgMJEhDzmZfw4lnkFmd+eLLC41Hfi9jZ140JBsRCMQ4qgqMeyNiT qmkMyutR6kTK0sX/tqzSbnSGdUyFFrSXUmExyPDTH4hMbVYYUzbJYAXXI wSCBs/0VdS2drSGCSMuRNGENoJD8n3JNMxF7gup7I+QPm095mUU/t5IxG 0Ict2ID351iNJuhLPzyLbSjAwl1XPIUcb34fi3l7w2cefc28rxs1DZP9R A==; X-IronPort-AV: E=Sophos;i="5.93,303,1654585200"; d="scan'208";a="190177841" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Sep 2022 09:02:24 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 9 Sep 2022 09:02:12 -0700 Received: from CHE-LT-I17769U.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 9 Sep 2022 09:02:07 -0700 From: Arun Ramadoss To: , CC: , , , , , , , , , , , Subject: [RFC Patch net-next 3/4] net: dsa: microchip: move interrupt handling logic from lan937x to ksz_common Date: Fri, 9 Sep 2022 21:31:19 +0530 Message-ID: <20220909160120.9101-4-arun.ramadoss@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220909160120.9101-1-arun.ramadoss@microchip.com> References: <20220909160120.9101-1-arun.ramadoss@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC To support the phy link detection through interrupt method for ksz9477 based switch, the interrupt handling routines are moved from lan937x_main.c to ksz_common.c. The only changes made are functions names are prefixed with ksz_ instead of lan937x_. Signed-off-by: Arun Ramadoss --- drivers/net/dsa/microchip/ksz_common.c | 428 +++++++++++++++++++++++ drivers/net/dsa/microchip/ksz_common.h | 9 + drivers/net/dsa/microchip/lan937x_main.c | 426 ---------------------- 3 files changed, 437 insertions(+), 426 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index b91089a483e7..ee31b27e0c4a 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -14,6 +14,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -1652,9 +1655,398 @@ static void ksz_update_port_member(struct ksz_device *dev, int port) dev->dev_ops->cfg_port_member(dev, port, port_member | cpu_port); } +static int ksz_sw_mdio_read(struct mii_bus *bus, int addr, int regnum) +{ + struct ksz_device *dev = bus->priv; + u16 val; + int ret; + + if (regnum & MII_ADDR_C45) + return -EOPNOTSUPP; + + ret = dev->dev_ops->r_phy(dev, addr, regnum, &val); + if (ret < 0) + return ret; + + return val; +} + +static int ksz_sw_mdio_write(struct mii_bus *bus, int addr, int regnum, + u16 val) +{ + struct ksz_device *dev = bus->priv; + + if (regnum & MII_ADDR_C45) + return -EOPNOTSUPP; + + return dev->dev_ops->w_phy(dev, addr, regnum, val); +} + +static int ksz_irq_phy_setup(struct ksz_device *dev) +{ + struct dsa_switch *ds = dev->ds; + int phy, err_phy; + int irq; + int ret; + + for (phy = 0; phy < KSZ_MAX_NUM_PORTS; phy++) { + if (BIT(phy) & ds->phys_mii_mask) { + irq = irq_find_mapping(dev->ports[phy].pirq.domain, + PORT_SRC_PHY_INT); + if (irq < 0) { + ret = irq; + goto out; + } + ds->slave_mii_bus->irq[phy] = irq; + } + } + return 0; +out: + err_phy = phy; + + for (phy = 0; phy < err_phy; phy++) + if (BIT(phy) & ds->phys_mii_mask) + irq_dispose_mapping(ds->slave_mii_bus->irq[phy]); + + return ret; +} + +static void ksz_irq_phy_free(struct ksz_device *dev) +{ + struct dsa_switch *ds = dev->ds; + int phy; + + for (phy = 0; phy < KSZ_MAX_NUM_PORTS; phy++) + if (BIT(phy) & ds->phys_mii_mask) + irq_dispose_mapping(ds->slave_mii_bus->irq[phy]); +} + +static int ksz_mdio_register(struct ksz_device *dev) +{ + struct dsa_switch *ds = dev->ds; + struct device_node *mdio_np; + struct mii_bus *bus; + int ret; + + mdio_np = of_get_child_by_name(dev->dev->of_node, "mdio"); + if (!mdio_np) { + dev_err(ds->dev, "no MDIO bus node\n"); + return -ENODEV; + } + + bus = devm_mdiobus_alloc(ds->dev); + if (!bus) { + of_node_put(mdio_np); + return -ENOMEM; + } + + bus->priv = dev; + bus->read = ksz_sw_mdio_read; + bus->write = ksz_sw_mdio_write; + bus->name = "ksz slave smi"; + snprintf(bus->id, MII_BUS_ID_SIZE, "SMI-%d", ds->index); + bus->parent = ds->dev; + bus->phy_mask = ~ds->phys_mii_mask; + + ds->slave_mii_bus = bus; + + if (dev->irq > 0) { + ret = ksz_irq_phy_setup(dev); + if (ret) { + of_node_put(mdio_np); + return ret; + } + } + + ret = devm_of_mdiobus_register(ds->dev, bus, mdio_np); + if (ret) { + dev_err(ds->dev, "unable to register MDIO bus %s\n", + bus->id); + if (dev->irq > 0) + ksz_irq_phy_free(dev); + } + + of_node_put(mdio_np); + + return ret; +} + +static void ksz_girq_mask(struct irq_data *d) +{ + struct ksz_device *dev = irq_data_get_irq_chip_data(d); + unsigned int n = d->hwirq; + + dev->girq.masked |= (1 << n); +} + +static void ksz_girq_unmask(struct irq_data *d) +{ + struct ksz_device *dev = irq_data_get_irq_chip_data(d); + unsigned int n = d->hwirq; + + dev->girq.masked &= ~(1 << n); +} + +static void ksz_girq_bus_lock(struct irq_data *d) +{ + struct ksz_device *dev = irq_data_get_irq_chip_data(d); + + mutex_lock(&dev->lock_irq); +} + +static void ksz_girq_bus_sync_unlock(struct irq_data *d) +{ + struct ksz_device *dev = irq_data_get_irq_chip_data(d); + int ret; + + ret = ksz_write32(dev, REG_SW_PORT_INT_MASK__4, dev->girq.masked); + if (ret) + dev_err(dev->dev, "failed to change IRQ mask\n"); + + mutex_unlock(&dev->lock_irq); +} + +static const struct irq_chip ksz_girq_chip = { + .name = "ksz-global", + .irq_mask = ksz_girq_mask, + .irq_unmask = ksz_girq_unmask, + .irq_bus_lock = ksz_girq_bus_lock, + .irq_bus_sync_unlock = ksz_girq_bus_sync_unlock, +}; + +static int ksz_girq_domain_map(struct irq_domain *d, + unsigned int irq, irq_hw_number_t hwirq) +{ + struct ksz_device *dev = d->host_data; + + irq_set_chip_data(irq, d->host_data); + irq_set_chip_and_handler(irq, &dev->girq.chip, handle_level_irq); + irq_set_noprobe(irq); + + return 0; +} + +static const struct irq_domain_ops ksz_girq_domain_ops = { + .map = ksz_girq_domain_map, + .xlate = irq_domain_xlate_twocell, +}; + +static void ksz_girq_free(struct ksz_device *dev) +{ + int irq, virq; + + free_irq(dev->irq, dev); + + for (irq = 0; irq < dev->girq.nirqs; irq++) { + virq = irq_find_mapping(dev->girq.domain, irq); + irq_dispose_mapping(virq); + } + + irq_domain_remove(dev->girq.domain); +} + +static irqreturn_t ksz_girq_thread_fn(int irq, void *dev_id) +{ + struct ksz_device *dev = dev_id; + unsigned int nhandled = 0; + unsigned int sub_irq; + unsigned int n; + u32 data; + int ret; + + /* Read global interrupt status register */ + ret = ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &data); + if (ret) + goto out; + + for (n = 0; n < dev->girq.nirqs; ++n) { + if (data & (1 << n)) { + sub_irq = irq_find_mapping(dev->girq.domain, n); + handle_nested_irq(sub_irq); + ++nhandled; + } + } +out: + return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE); +} + +static int ksz_girq_setup(struct ksz_device *dev) +{ + int ret, irq; + + dev->girq.nirqs = dev->info->port_cnt; + dev->girq.domain = irq_domain_add_simple(NULL, dev->girq.nirqs, 0, + &ksz_girq_domain_ops, dev); + if (!dev->girq.domain) + return -ENOMEM; + + for (irq = 0; irq < dev->girq.nirqs; irq++) + irq_create_mapping(dev->girq.domain, irq); + + dev->girq.chip = ksz_girq_chip; + dev->girq.masked = ~0; + + ret = request_threaded_irq(dev->irq, NULL, ksz_girq_thread_fn, + IRQF_ONESHOT | IRQF_TRIGGER_FALLING, + dev_name(dev->dev), dev); + if (ret) + goto out; + + return 0; + +out: + ksz_girq_free(dev); + + return ret; +} + +static void ksz_pirq_mask(struct irq_data *d) +{ + struct ksz_port *port = irq_data_get_irq_chip_data(d); + unsigned int n = d->hwirq; + + port->pirq.masked |= (1 << n); +} + +static void ksz_pirq_unmask(struct irq_data *d) +{ + struct ksz_port *port = irq_data_get_irq_chip_data(d); + unsigned int n = d->hwirq; + + port->pirq.masked &= ~(1 << n); +} + +static void ksz_pirq_bus_lock(struct irq_data *d) +{ + struct ksz_port *port = irq_data_get_irq_chip_data(d); + struct ksz_device *dev = port->ksz_dev; + + mutex_lock(&dev->lock_irq); +} + +static void ksz_pirq_bus_sync_unlock(struct irq_data *d) +{ + struct ksz_port *port = irq_data_get_irq_chip_data(d); + struct ksz_device *dev = port->ksz_dev; + + ksz_pwrite8(dev, port->num, REG_PORT_INT_MASK, port->pirq.masked); + mutex_unlock(&dev->lock_irq); +} + +static const struct irq_chip ksz_pirq_chip = { + .name = "ksz-port", + .irq_mask = ksz_pirq_mask, + .irq_unmask = ksz_pirq_unmask, + .irq_bus_lock = ksz_pirq_bus_lock, + .irq_bus_sync_unlock = ksz_pirq_bus_sync_unlock, +}; + +static int ksz_pirq_domain_map(struct irq_domain *d, unsigned int irq, + irq_hw_number_t hwirq) +{ + struct ksz_port *port = d->host_data; + + irq_set_chip_data(irq, d->host_data); + irq_set_chip_and_handler(irq, &port->pirq.chip, handle_level_irq); + irq_set_noprobe(irq); + + return 0; +} + +static const struct irq_domain_ops ksz_pirq_domain_ops = { + .map = ksz_pirq_domain_map, + .xlate = irq_domain_xlate_twocell, +}; + +static void ksz_pirq_free(struct ksz_device *dev, u8 p) +{ + struct ksz_port *port = &dev->ports[p]; + int irq, virq; + int irq_num; + + irq_num = irq_find_mapping(dev->girq.domain, p); + if (irq_num < 0) + return; + + free_irq(irq_num, port); + + for (irq = 0; irq < port->pirq.nirqs; irq++) { + virq = irq_find_mapping(port->pirq.domain, irq); + irq_dispose_mapping(virq); + } + + irq_domain_remove(port->pirq.domain); +} + +static irqreturn_t ksz_pirq_thread_fn(int irq, void *dev_id) +{ + struct ksz_port *port = dev_id; + unsigned int nhandled = 0; + struct ksz_device *dev; + unsigned int sub_irq; + unsigned int n; + u8 data; + + dev = port->ksz_dev; + + /* Read port interrupt status register */ + ksz_pread8(dev, port->num, REG_PORT_INT_STATUS, &data); + + for (n = 0; n < port->pirq.nirqs; ++n) { + if (data & (1 << n)) { + sub_irq = irq_find_mapping(port->pirq.domain, n); + handle_nested_irq(sub_irq); + ++nhandled; + } + } + + return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE); +} + +static int ksz_pirq_setup(struct ksz_device *dev, u8 p) +{ + struct ksz_port *port = &dev->ports[p]; + int ret, irq; + int irq_num; + + port->pirq.nirqs = dev->info->port_nirqs; + port->pirq.domain = irq_domain_add_simple(dev->dev->of_node, + port->pirq.nirqs, 0, + &ksz_pirq_domain_ops, + port); + if (!port->pirq.domain) + return -ENOMEM; + + for (irq = 0; irq < port->pirq.nirqs; irq++) + irq_create_mapping(port->pirq.domain, irq); + + port->pirq.chip = ksz_pirq_chip; + port->pirq.masked = ~0; + + irq_num = irq_find_mapping(dev->girq.domain, p); + if (irq_num < 0) + return irq_num; + + snprintf(port->pirq.name, sizeof(port->pirq.name), "port_irq-%d", p); + + ret = request_threaded_irq(irq_num, NULL, ksz_pirq_thread_fn, + IRQF_ONESHOT | IRQF_TRIGGER_FALLING, + port->pirq.name, port); + if (ret) + goto out; + + return 0; + +out: + ksz_pirq_free(dev, p); + + return ret; +} + static int ksz_setup(struct dsa_switch *ds) { struct ksz_device *dev = ds->priv; + struct dsa_port *dp; struct ksz_port *p; const u16 *regs; int ret; @@ -1703,16 +2095,52 @@ static int ksz_setup(struct dsa_switch *ds) p = &dev->ports[dev->cpu_port]; p->learning = true; + if (dev->irq > 0) { + ret = ksz_girq_setup(dev); + if (ret) + return ret; + + dsa_switch_for_each_user_port(dp, dev->ds) { + ret = ksz_pirq_setup(dev, dp->index); + if (ret) + goto out_girq; + } + } + + ret = ksz_mdio_register(dev); + if (ret < 0) { + dev_err(dev->dev, "failed to register the mdio"); + goto out_pirq; + } + /* start switch */ regmap_update_bits(dev->regmap[0], regs[S_START_CTRL], SW_START, SW_START); return 0; + +out_pirq: + if (dev->irq > 0) + dsa_switch_for_each_user_port(dp, dev->ds) + ksz_pirq_free(dev, dp->index); +out_girq: + if (dev->irq > 0) + ksz_girq_free(dev); + + return ret; } static void ksz_teardown(struct dsa_switch *ds) { struct ksz_device *dev = ds->priv; + struct dsa_port *dp; + + if (dev->irq > 0) { + dsa_switch_for_each_user_port(dp, dev->ds) + ksz_pirq_free(dev, dp->index); + + ksz_girq_free(dev); + } if (dev->dev_ops->teardown) dev->dev_ops->teardown(ds); diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index baa1e1bc1b7c..6edce587bfd2 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -573,6 +573,15 @@ static inline int is_lan937x(struct ksz_device *dev) #define P_MII_MAC_MODE BIT(2) #define P_MII_SEL_M 0x3 +/* Interrupt */ +#define REG_SW_PORT_INT_STATUS__4 0x0018 +#define REG_SW_PORT_INT_MASK__4 0x001C + +#define REG_PORT_INT_STATUS 0x001B +#define REG_PORT_INT_MASK 0x001F + +#define PORT_SRC_PHY_INT 1 + /* Regmap tables generation */ #define KSZ_SPI_OP_RD 3 #define KSZ_SPI_OP_WR 2 diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c index 1f4472c90a1f..715c44544dd7 100644 --- a/drivers/net/dsa/microchip/lan937x_main.c +++ b/drivers/net/dsa/microchip/lan937x_main.c @@ -7,11 +7,8 @@ #include #include #include -#include #include #include -#include -#include #include #include #include @@ -140,120 +137,6 @@ int lan937x_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val) return lan937x_internal_phy_write(dev, addr, reg, val); } -static int lan937x_sw_mdio_read(struct mii_bus *bus, int addr, int regnum) -{ - struct ksz_device *dev = bus->priv; - u16 val; - int ret; - - if (regnum & MII_ADDR_C45) - return -EOPNOTSUPP; - - ret = lan937x_internal_phy_read(dev, addr, regnum, &val); - if (ret < 0) - return ret; - - return val; -} - -static int lan937x_sw_mdio_write(struct mii_bus *bus, int addr, int regnum, - u16 val) -{ - struct ksz_device *dev = bus->priv; - - if (regnum & MII_ADDR_C45) - return -EOPNOTSUPP; - - return lan937x_internal_phy_write(dev, addr, regnum, val); -} - -static int lan937x_irq_phy_setup(struct ksz_device *dev) -{ - struct dsa_switch *ds = dev->ds; - int phy, err_phy; - int irq; - int ret; - - for (phy = 0; phy < KSZ_MAX_NUM_PORTS; phy++) { - if (BIT(phy) & ds->phys_mii_mask) { - irq = irq_find_mapping(dev->ports[phy].pirq.domain, - PORT_SRC_PHY_INT); - if (irq < 0) { - ret = irq; - goto out; - } - ds->slave_mii_bus->irq[phy] = irq; - } - } - return 0; -out: - err_phy = phy; - - for (phy = 0; phy < err_phy; phy++) - if (BIT(phy) & ds->phys_mii_mask) - irq_dispose_mapping(ds->slave_mii_bus->irq[phy]); - - return ret; -} - -static void lan937x_irq_phy_free(struct ksz_device *dev) -{ - struct dsa_switch *ds = dev->ds; - int phy; - - for (phy = 0; phy < KSZ_MAX_NUM_PORTS; phy++) - if (BIT(phy) & ds->phys_mii_mask) - irq_dispose_mapping(ds->slave_mii_bus->irq[phy]); -} - -static int lan937x_mdio_register(struct ksz_device *dev) -{ - struct dsa_switch *ds = dev->ds; - struct device_node *mdio_np; - struct mii_bus *bus; - int ret; - - mdio_np = of_get_child_by_name(dev->dev->of_node, "mdio"); - if (!mdio_np) { - dev_err(ds->dev, "no MDIO bus node\n"); - return -ENODEV; - } - - bus = devm_mdiobus_alloc(ds->dev); - if (!bus) { - of_node_put(mdio_np); - return -ENOMEM; - } - - bus->priv = dev; - bus->read = lan937x_sw_mdio_read; - bus->write = lan937x_sw_mdio_write; - bus->name = "lan937x slave smi"; - snprintf(bus->id, MII_BUS_ID_SIZE, "SMI-%d", ds->index); - bus->parent = ds->dev; - bus->phy_mask = ~ds->phys_mii_mask; - - ds->slave_mii_bus = bus; - - if (dev->irq > 0) { - ret = lan937x_irq_phy_setup(dev); - if (ret) - return ret; - } - - ret = devm_of_mdiobus_register(ds->dev, bus, mdio_np); - if (ret) { - dev_err(ds->dev, "unable to register MDIO bus %s\n", - bus->id); - if (dev->irq > 0) - lan937x_irq_phy_free(dev); - } - - of_node_put(mdio_np); - - return ret; -} - int lan937x_reset_switch(struct ksz_device *dev) { u32 data32; @@ -460,282 +343,9 @@ int lan937x_switch_init(struct ksz_device *dev) return 0; } -static void lan937x_girq_mask(struct irq_data *d) -{ - struct ksz_device *dev = irq_data_get_irq_chip_data(d); - unsigned int n = d->hwirq; - - dev->girq.masked |= (1 << n); -} - -static void lan937x_girq_unmask(struct irq_data *d) -{ - struct ksz_device *dev = irq_data_get_irq_chip_data(d); - unsigned int n = d->hwirq; - - dev->girq.masked &= ~(1 << n); -} - -static void lan937x_girq_bus_lock(struct irq_data *d) -{ - struct ksz_device *dev = irq_data_get_irq_chip_data(d); - - mutex_lock(&dev->lock_irq); -} - -static void lan937x_girq_bus_sync_unlock(struct irq_data *d) -{ - struct ksz_device *dev = irq_data_get_irq_chip_data(d); - int ret; - - ret = ksz_write32(dev, REG_SW_PORT_INT_MASK__4, dev->girq.masked); - if (ret) - dev_err(dev->dev, "failed to change IRQ mask\n"); - - mutex_unlock(&dev->lock_irq); -} - -static const struct irq_chip lan937x_girq_chip = { - .name = "lan937x-global", - .irq_mask = lan937x_girq_mask, - .irq_unmask = lan937x_girq_unmask, - .irq_bus_lock = lan937x_girq_bus_lock, - .irq_bus_sync_unlock = lan937x_girq_bus_sync_unlock, -}; - -static int lan937x_girq_domain_map(struct irq_domain *d, - unsigned int irq, irq_hw_number_t hwirq) -{ - struct ksz_device *dev = d->host_data; - - irq_set_chip_data(irq, d->host_data); - irq_set_chip_and_handler(irq, &dev->girq.chip, handle_level_irq); - irq_set_noprobe(irq); - - return 0; -} - -static const struct irq_domain_ops lan937x_girq_domain_ops = { - .map = lan937x_girq_domain_map, - .xlate = irq_domain_xlate_twocell, -}; - -static void lan937x_girq_free(struct ksz_device *dev) -{ - int irq, virq; - - free_irq(dev->irq, dev); - - for (irq = 0; irq < dev->girq.nirqs; irq++) { - virq = irq_find_mapping(dev->girq.domain, irq); - irq_dispose_mapping(virq); - } - - irq_domain_remove(dev->girq.domain); -} - -static irqreturn_t lan937x_girq_thread_fn(int irq, void *dev_id) -{ - struct ksz_device *dev = dev_id; - unsigned int nhandled = 0; - unsigned int sub_irq; - unsigned int n; - u32 data; - int ret; - - /* Read global interrupt status register */ - ret = ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &data); - if (ret) - goto out; - - for (n = 0; n < dev->girq.nirqs; ++n) { - if (data & (1 << n)) { - sub_irq = irq_find_mapping(dev->girq.domain, n); - handle_nested_irq(sub_irq); - ++nhandled; - } - } -out: - return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE); -} - -static int lan937x_girq_setup(struct ksz_device *dev) -{ - int ret, irq; - - dev->girq.nirqs = dev->info->port_cnt; - dev->girq.domain = irq_domain_add_simple(NULL, dev->girq.nirqs, 0, - &lan937x_girq_domain_ops, dev); - if (!dev->girq.domain) - return -ENOMEM; - - for (irq = 0; irq < dev->girq.nirqs; irq++) - irq_create_mapping(dev->girq.domain, irq); - - dev->girq.chip = lan937x_girq_chip; - dev->girq.masked = ~0; - - ret = request_threaded_irq(dev->irq, NULL, lan937x_girq_thread_fn, - IRQF_ONESHOT | IRQF_TRIGGER_FALLING, - dev_name(dev->dev), dev); - if (ret) - goto out; - - return 0; - -out: - lan937x_girq_free(dev); - - return ret; -} - -static void lan937x_pirq_mask(struct irq_data *d) -{ - struct ksz_port *port = irq_data_get_irq_chip_data(d); - unsigned int n = d->hwirq; - - port->pirq.masked |= (1 << n); -} - -static void lan937x_pirq_unmask(struct irq_data *d) -{ - struct ksz_port *port = irq_data_get_irq_chip_data(d); - unsigned int n = d->hwirq; - - port->pirq.masked &= ~(1 << n); -} - -static void lan937x_pirq_bus_lock(struct irq_data *d) -{ - struct ksz_port *port = irq_data_get_irq_chip_data(d); - struct ksz_device *dev = port->ksz_dev; - - mutex_lock(&dev->lock_irq); -} - -static void lan937x_pirq_bus_sync_unlock(struct irq_data *d) -{ - struct ksz_port *port = irq_data_get_irq_chip_data(d); - struct ksz_device *dev = port->ksz_dev; - - ksz_pwrite8(dev, port->num, REG_PORT_INT_MASK, port->pirq.masked); - mutex_unlock(&dev->lock_irq); -} - -static const struct irq_chip lan937x_pirq_chip = { - .name = "lan937x-port", - .irq_mask = lan937x_pirq_mask, - .irq_unmask = lan937x_pirq_unmask, - .irq_bus_lock = lan937x_pirq_bus_lock, - .irq_bus_sync_unlock = lan937x_pirq_bus_sync_unlock, -}; - -static int lan937x_pirq_domain_map(struct irq_domain *d, unsigned int irq, - irq_hw_number_t hwirq) -{ - struct ksz_port *port = d->host_data; - - irq_set_chip_data(irq, d->host_data); - irq_set_chip_and_handler(irq, &port->pirq.chip, handle_level_irq); - irq_set_noprobe(irq); - - return 0; -} - -static const struct irq_domain_ops lan937x_pirq_domain_ops = { - .map = lan937x_pirq_domain_map, - .xlate = irq_domain_xlate_twocell, -}; - -static void lan937x_pirq_free(struct ksz_device *dev, u8 p) -{ - struct ksz_port *port = &dev->ports[p]; - int irq, virq; - int irq_num; - - irq_num = irq_find_mapping(dev->girq.domain, p); - if (irq_num < 0) - return; - - free_irq(irq_num, port); - - for (irq = 0; irq < port->pirq.nirqs; irq++) { - virq = irq_find_mapping(port->pirq.domain, irq); - irq_dispose_mapping(virq); - } - - irq_domain_remove(port->pirq.domain); -} - -static irqreturn_t lan937x_pirq_thread_fn(int irq, void *dev_id) -{ - struct ksz_port *port = dev_id; - unsigned int nhandled = 0; - struct ksz_device *dev; - unsigned int sub_irq; - unsigned int n; - u8 data; - - dev = port->ksz_dev; - - /* Read port interrupt status register */ - ksz_pread8(dev, port->num, REG_PORT_INT_STATUS, &data); - - for (n = 0; n < port->pirq.nirqs; ++n) { - if (data & (1 << n)) { - sub_irq = irq_find_mapping(port->pirq.domain, n); - handle_nested_irq(sub_irq); - ++nhandled; - } - } - - return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE); -} - -static int lan937x_pirq_setup(struct ksz_device *dev, u8 p) -{ - struct ksz_port *port = &dev->ports[p]; - int ret, irq; - int irq_num; - - port->pirq.nirqs = dev->info->port_nirqs; - port->pirq.domain = irq_domain_add_simple(dev->dev->of_node, - port->pirq.nirqs, 0, - &lan937x_pirq_domain_ops, - port); - if (!port->pirq.domain) - return -ENOMEM; - - for (irq = 0; irq < port->pirq.nirqs; irq++) - irq_create_mapping(port->pirq.domain, irq); - - port->pirq.chip = lan937x_pirq_chip; - port->pirq.masked = ~0; - - irq_num = irq_find_mapping(dev->girq.domain, p); - if (irq_num < 0) - return irq_num; - - snprintf(port->pirq.name, sizeof(port->pirq.name), "port_irq-%d", p); - - ret = request_threaded_irq(irq_num, NULL, lan937x_pirq_thread_fn, - IRQF_ONESHOT | IRQF_TRIGGER_FALLING, - port->pirq.name, port); - if (ret) - goto out; - - return 0; - -out: - lan937x_pirq_free(dev, p); - - return ret; -} - int lan937x_setup(struct dsa_switch *ds) { struct ksz_device *dev = ds->priv; - struct dsa_port *dp; int ret; /* enable Indirect Access from SPI to the VPHY registers */ @@ -745,24 +355,6 @@ int lan937x_setup(struct dsa_switch *ds) return ret; } - if (dev->irq > 0) { - ret = lan937x_girq_setup(dev); - if (ret) - return ret; - - dsa_switch_for_each_user_port(dp, dev->ds) { - ret = lan937x_pirq_setup(dev, dp->index); - if (ret) - goto out_girq; - } - } - - ret = lan937x_mdio_register(dev); - if (ret < 0) { - dev_err(dev->dev, "failed to register the mdio"); - goto out_pirq; - } - /* The VLAN aware is a global setting. Mixed vlan * filterings are not supported. */ @@ -786,29 +378,11 @@ int lan937x_setup(struct dsa_switch *ds) (SW_CLK125_ENB | SW_CLK25_ENB), true); return 0; - -out_pirq: - if (dev->irq > 0) - dsa_switch_for_each_user_port(dp, dev->ds) - lan937x_pirq_free(dev, dp->index); -out_girq: - if (dev->irq > 0) - lan937x_girq_free(dev); - - return ret; } void lan937x_teardown(struct dsa_switch *ds) { - struct ksz_device *dev = ds->priv; - struct dsa_port *dp; - if (dev->irq > 0) { - dsa_switch_for_each_user_port(dp, dev->ds) - lan937x_pirq_free(dev, dp->index); - - lan937x_girq_free(dev); - } } void lan937x_switch_exit(struct ksz_device *dev) From patchwork Fri Sep 9 16:01:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun Ramadoss X-Patchwork-Id: 12971957 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9248DECAAD3 for ; Fri, 9 Sep 2022 16:02:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231992AbiIIQCq (ORCPT ); Fri, 9 Sep 2022 12:02:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56254 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231966AbiIIQCc (ORCPT ); Fri, 9 Sep 2022 12:02:32 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5FD98116B5C; Fri, 9 Sep 2022 09:02:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662739343; x=1694275343; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=H2xYKBMOoGGpAzj9Eam7mDzfrED6zMoahKfEe7aJR3Y=; b=EnChl7mnXNOeTXtKiEsOTumpbkZI8yhqvCMPOSym6kG6jf4wnQvr6n0d ZWlSW5FUdjipi/k3s3KDDUi5tcauDkwz6ryszOqlZm2XiQAYH+xswM/0e pk26lc8eQ/j1qPdmB0/ykGu2UcJ+mfYJ/9C/f2/wtxFKy0dSIsDL+qlJJ 5BL3kgin5t/XN612xV5ygzrt2foeA2J3cR+61PHIR2XvRhAVCXHQzgtw0 DueDfup1uazsRm02y50g4AFm3nNsa+XnZr525U7MdsBRlJ5rAf/svIja/ 2vxGdlidmJqeh3COkkD9iaav9hPAXrcqFPHvE5YuQ9XFr0D/VFDyepupP w==; X-IronPort-AV: E=Sophos;i="5.93,303,1654585200"; d="scan'208";a="190177821" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Sep 2022 09:02:21 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 9 Sep 2022 09:02:21 -0700 Received: from CHE-LT-I17769U.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 9 Sep 2022 09:02:16 -0700 From: Arun Ramadoss To: , CC: , , , , , , , , , , , Subject: [RFC Patch net-next 4/4] net: phy: micrel: enable interrupt for ksz9477 phy Date: Fri, 9 Sep 2022 21:31:20 +0530 Message-ID: <20220909160120.9101-5-arun.ramadoss@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220909160120.9101-1-arun.ramadoss@microchip.com> References: <20220909160120.9101-1-arun.ramadoss@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Config_intr and handle_interrupt are enabled for ksz9477 phy. It is similar to all other phys in the micrel phys. Signed-off-by: Arun Ramadoss Reviewed-by: Andrew Lunn --- drivers/net/phy/micrel.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index 7b8c5c8d013e..09f2bef5d96c 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c @@ -3191,6 +3191,8 @@ static struct phy_driver ksphy_driver[] = { .name = "Microchip KSZ9477", /* PHY_GBIT_FEATURES */ .config_init = kszphy_config_init, + .config_intr = kszphy_config_intr, + .handle_interrupt = kszphy_handle_interrupt, .suspend = genphy_suspend, .resume = genphy_resume, } };