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Niedermayr" To: , CC: , , , Subject: [PATCH v4 1/3] memory: omap-gpmc: allow shared wait pins Date: Thu, 15 Sep 2022 11:13:31 +0200 Message-ID: <20220915091333.2425306-2-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220915091333.2425306-1-benedikt.niedermayr@siemens.com> References: <20220915091333.2425306-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [144.145.220.66] X-ClientProxiedBy: DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) To DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VE1EUR01FT046:EE_|DU0PR10MB7406:EE_ X-MS-Office365-Filtering-Correlation-Id: 6f66d9f4-644e-43b7-8527-08da96fa96e8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: +YGGJuAszXpUO8v23N+1RaBV9YixgPPsDUWFPexKOsJ6/LPtiUAUwZBa5uP2aaWqheSFKoqRA3vXpgpxTBcY6K/hyXIJ0agN4FBFRfC6ZKh/2Z3nisc+HNaWl/977Ypw1LVyUHo2LOD/lkEwU4hnHq+cLirnUDOMsjsCkFhxo7yMbkX8xI4tcYTIr784C99hO8/Bunis7YDbWAS03SIGmBih9IRRyZl9sPmws5NFcmjB9FLhzTSKee8lD6hpkX88H7inuhPIV18WlzDUSFOiFyXCVpFWAOinbizM9y1ExBw9YTAIxUC91Yxc7FOF7LOT0azCsLPW8pB2CmaUBhXIoLJ20Vx1PQkP+ffkBNG9cjEwaD7qAuU1w2swtaLTYYPs8W+C4uH2BcjL/awnkdNtP8Qt65uEicJFK5yIbuiq4DmoBbHEKRi83+ZQhnXiphj8vO2Coz7CjZpIh379Nko5e0jqhGjdWotWQ5t/dEvnLYi7p57c+uIkWOb1UJhylah1se1/zoyPp3Q2q4VBxcTeWzAmC01AoXx32jxCpJdBamOFgKOdq7WaRjujfvRqjHut3cjLNZpKsSv2KBJrjkuYvZbg3O6UlipBDrP30mQfCHoYvqqcoMsYUmAk76xN5mZSudySUWPRJolu5LeQwffsBCexL/Fip9+vppwTJjQcUfpXwNNZeBkQS4xnKA4kOTzA9Mr+rLmtH+Eyk0HpkUO+Jvprrsvw92TWQ191s2AXRAbH5Fe1/X8CfiV5eWTWuntn86YWjQMVj0kx9DCVmYamDcMR76hIXLa8k+EDii6d2FK99lsQMq/mqjS++qLcC4Xc X-Forefront-Antispam-Report: CIP:194.138.21.75;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(346002)(39860400002)(136003)(376002)(396003)(451199015)(36840700001)(46966006)(40470700004)(478600001)(8676002)(316002)(1076003)(40460700003)(6666004)(47076005)(110136005)(83380400001)(70206006)(336012)(16526019)(956004)(2616005)(40480700001)(36860700001)(36756003)(4326008)(356005)(5660300002)(186003)(82740400003)(41300700001)(86362001)(82960400001)(26005)(54906003)(2906002)(82310400005)(8936002)(81166007)(70586007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2022 09:13:44.3688 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6f66d9f4-644e-43b7-8527-08da96fa96e8 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.75];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR01FT046.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR10MB7406 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Newer kernels refuse to probe when using the same wait pin for different chipselect regions. But this may be a usecase when connecting for example FPGA or ASIC modules to the gpmc, which only got one wait pin installed. Signed-off-by: Benedikt Niedermayr --- drivers/memory/omap-gpmc.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index d9bf1c2ac319..e3674a15b934 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -2221,9 +2221,13 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, GPIO_ACTIVE_HIGH, GPIOD_IN); if (IS_ERR(waitpin_desc)) { - dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); ret = PTR_ERR(waitpin_desc); - goto err; + if (ret == -EBUSY) { + dev_info(&pdev->dev, "shared wait-pin: %d\n", wait_pin); + } else { + dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); + goto err; + } } } From patchwork Thu Sep 15 09:13:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benedikt Niedermayr X-Patchwork-Id: 12977090 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9720C6FA8A for ; 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Niedermayr" To: , CC: , , , Subject: [PATCH v4 2/3] memory: omap-gpmc: add support for wait pin polarity Date: Thu, 15 Sep 2022 11:13:32 +0200 Message-ID: <20220915091333.2425306-3-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220915091333.2425306-1-benedikt.niedermayr@siemens.com> References: <20220915091333.2425306-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [144.145.220.66] X-ClientProxiedBy: DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) To DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: HE1EUR01FT070:EE_|AS4PR10MB6088:EE_ X-MS-Office365-Filtering-Correlation-Id: f1f74f1f-3133-4f03-51ce-08da96fa976e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Zlp9nuFmrxxnIfS4ddUTB2UMWGSn59iJm1sXXKDqvWtQY7MCNvNmgnV01Y8faMlwPcHzYK2PLMsSj2w4bwGo/x/B8pf9S5Lv7prAYlv8sw7jc8gI/QvfhI1yTABvpOCaOthJjNWKbB/oGpcblnfPMcJY3PBm+dH+18SAEIV9VRK5NGwk+wKpLV6Lvn69DbVnq/cIuiSqec9VxRQVmOqJQcO6w0Wj06rt/L2/QEmOjCMW5E9xAAqhWaAT6LfpiDKOGOVL59g17XZstgP1KTGMdluSH6ToC0fI6UHNrmOibsZOG4kpE5VPdRYFduIynJrJG4tWvZ98HSzaBEKGDst1Vx/OPQUpfOd+sNAFUjBOjW5YMPYFSMKBTetZyLLm5aJVrt82KXjOEOg3cS0RN4fGPQIUlnGVoiwEL51XAhnViCANnnLw8d8D36am+a43QLxjc9ehMoQv2pqOccKtm6HBaYPhSj8yd/PIuCKvjSN3Oc+NckWZ4wizkv5JHlSy/PUUqiDW1t7P94Mjk7OsWoAYkchgMLfU6nOLdczuS8/VmKxFb/1gqPvPthxBGtSmLqCJ+w5O8Z0B3nXCy7xgQrIE92iYXXbKpypM53bwzxmlPS81Jwe1IQlw4QdyACQ/S7zXNOYUYAmDOmYHkQYOXfXWBgUeNZFianJ+ZllYeqNHrkn9MrjxL9+1+ba4oRWzLF410bW8P/5Nn4KulOIw4YUPMM6jA0lc86oVBZAnxXp3alMQVpF6EPvHLKfICw81LU0Eto08xlRqmkP4R6WBpHAQFg== X-Forefront-Antispam-Report: CIP:194.138.21.74;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:hybrid.siemens.com;CAT:NONE;SFS:(13230022)(4636009)(376002)(136003)(39860400002)(396003)(346002)(451199015)(36840700001)(46966006)(40470700004)(186003)(40460700003)(82960400001)(82740400003)(356005)(7636003)(6666004)(7596003)(16526019)(336012)(70586007)(2616005)(956004)(1076003)(2906002)(478600001)(5660300002)(82310400005)(36860700001)(8676002)(70206006)(26005)(4326008)(47076005)(8936002)(110136005)(54906003)(86362001)(36756003)(316002)(40480700001)(41300700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2022 09:13:45.1832 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f1f74f1f-3133-4f03-51ce-08da96fa976e X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.74];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: HE1EUR01FT070.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4PR10MB6088 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr The waitpin polarity can be configured via the WAITPINPOLARITY bits in the GPMC_CONFIG register. This is currently not supported by the driver. This patch adds support for setting the required register bits with the "gpmc,wait-pin-polarity" dt-property. Signed-off-by: Benedikt Niedermayr --- drivers/memory/omap-gpmc.c | 22 ++++++++++++++++++++++ include/linux/platform_data/gpmc-omap.h | 6 ++++++ 2 files changed, 28 insertions(+) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index e3674a15b934..66dd7dd80653 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -132,6 +132,7 @@ #define GPMC_CONFIG_DEV_SIZE 0x00000002 #define GPMC_CONFIG_DEV_TYPE 0x00000003 +#define GPMC_CONFIG_WAITPINPOLARITY(pin) (BIT(pin) << 8) #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) @@ -1881,6 +1882,21 @@ int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1); + if (p->wait_on_read || p->wait_on_write) { + config1 = gpmc_read_reg(GPMC_CONFIG); + + if (p->wait_pin_polarity == WAITPINPOLARITY_ACTIVE_LOW) + config1 &= ~GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin); + else if (p->wait_pin_polarity == WAITPINPOLARITY_ACTIVE_HIGH) + config1 |= GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin); + else if (p->wait_pin_polarity != WAITPINPOLARITY_DEFAULT) + pr_err("%s: invalid wait-pin-polarity (pin: %d, polarity: %d)\n", + __func__, p->wait_pin, p->wait_pin_polarity); + + gpmc_write_reg(GPMC_CONFIG, config1); + } + + return 0; } @@ -1981,6 +1997,12 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) } if (!of_property_read_u32(np, "gpmc,wait-pin", &p->wait_pin)) { + + p->wait_pin_polarity = WAITPINPOLARITY_DEFAULT; + of_property_read_u32(np, + "gpmc,wait-pin-polarity", + &p->wait_pin_polarity); + p->wait_on_read = of_property_read_bool(np, "gpmc,wait-on-read"); p->wait_on_write = of_property_read_bool(np, diff --git a/include/linux/platform_data/gpmc-omap.h b/include/linux/platform_data/gpmc-omap.h index c9cc4e32435d..c46c28069c31 100644 --- a/include/linux/platform_data/gpmc-omap.h +++ b/include/linux/platform_data/gpmc-omap.h @@ -136,6 +136,11 @@ struct gpmc_device_timings { #define GPMC_MUX_AAD 1 /* Addr-Addr-Data multiplex */ #define GPMC_MUX_AD 2 /* Addr-Data multiplex */ +/* Wait pin polarity values */ +#define WAITPINPOLARITY_DEFAULT -1 +#define WAITPINPOLARITY_ACTIVE_LOW 0 +#define WAITPINPOLARITY_ACTIVE_HIGH 1 + struct gpmc_settings { bool burst_wrap; /* enables wrap bursting */ bool burst_read; /* enables read page/burst mode */ @@ -149,6 +154,7 @@ struct gpmc_settings { u32 device_width; /* device bus width (8 or 16 bit) */ u32 mux_add_data; /* multiplex address & data */ u32 wait_pin; /* wait-pin to be used */ + u32 wait_pin_polarity; /* wait-pin polarity */ }; /* Data for each chip select */ From patchwork Thu Sep 15 09:13:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benedikt Niedermayr X-Patchwork-Id: 12977091 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11DA1ECAAA1 for ; Thu, 15 Sep 2022 09:15:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229598AbiIOJPJ (ORCPT ); Thu, 15 Sep 2022 05:15:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229850AbiIOJOj (ORCPT ); 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Niedermayr" To: , CC: , , , Subject: [PATCH v4 3/3] dt-bindings: memory-controllers: gpmc-child: add wait-pin polarity Date: Thu, 15 Sep 2022 11:13:33 +0200 Message-ID: <20220915091333.2425306-4-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220915091333.2425306-1-benedikt.niedermayr@siemens.com> References: <20220915091333.2425306-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [144.145.220.66] X-ClientProxiedBy: DEMCHDC8A0A.ad011.siemens.net (139.25.226.106) To DEMCHDC89XA.ad011.siemens.net (139.25.226.103) X-TM-AS-Product-Ver: SMEX-14.0.0.3080-8.6.1018-26680.007 X-TM-AS-Result: No-10--9.764200-8.000000 X-TMASE-MatchedRID: FgBlj4RFa/fEuqVdWhBa8X8otomh/kVbH9B97WCZlj2VyEX4i+SWU0yQ 5fRSh265B0L0/Ut7x1D47Xv617HbR+THRSYVdIx5q9dxv4TizKefv2cITmCgNtfeP+V/VXwsm2C Uy/KcAJ4RxZBQI0dbZ/WKGThQ2qZNfKZSSl2fkbJNVVoqlq60cKPFjJEFr+oldywMrbEEeHuNo+ PRbWqfRMprJP8FBOIaSV75InlJNiVWinQHdvOEPaUSlfmMuqTbB6/NalQ+MetfLg8e3/TOYg== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--9.764200-8.000000 X-TMASE-Version: SMEX-14.0.0.3080-8.6.1018-26680.007 X-TM-SNTS-SMTP: BCB4B76AA377C106AA41DB6D34658161B1E2A8E31279B9469BE5EEEDF88099492000:8 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VE1EUR01FT046:EE_|DU0PR10MB6875:EE_ X-MS-Office365-Filtering-Correlation-Id: 3920ce32-bc93-425d-d147-08da96fa9ad1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: YOw7n+/ctcgeNG0cohP63BanMCgY2gBrineqTIzqKaYlq7W980zjRW3XCGGUB34vMJksKTV4k/L5RUDN/p28aQydhg8XFsWL91dlnnb18DXOchb0rBQAoU4szg+XmhY/UTPoxa9FlSVT7erdEkTznpUwZdDMhlsgWLyHSCUDdlaRXi2sie1JondgA5RCghiyh5Ltb+WxZqOuWR8+/rOPHJuR6ornAuHPmwBfgg4X9Ruqid6l7UjzbDN7Cm4I21l0VbbE7Q18arFSTLXsygtGX3lbPwpQA2mj8J8acx0doAfTRSCotToLsphvP4aruZpUnkRpqhONS8f+H1IFh3OaYu4fYPvK9rd7ExGm4z0NWLg2a2YDXNYU935kFowVjQhox/fPA86VlsT5Zl3cITyz0WVTo0Jph3Rk0yRoL9tK6bykS6r7NxSQrn2kJSxw6vRGhQzqRvUZgV9ijH2BFBZhHl6NQnrJFggUwqRGpcGWPwNQ1dVkUSfB7Lg7obXVp6nEEjgU7ekY0gnxar93EdM3cNRsP0JF165Ch9p1dLMYIlGQXH+RjsbTjA+IouZ5U5SQGKH56+Fq2w9gxfdXyW+Kenv3LnppXwlzpdhJEq5gakJEB9iA2mD5Ogt57dW5CnDfJ/iGdB3Erh9BxdNue3TmzDz72MBneGpnc/c7yE4tGAinAaeawS7FtNiQcoe/WVtt1RMPJOXee/VVupUmCXorxti/QdeHXKC/jGY0+BvNN5UYvrNuWkIpU7Np57RD7mqgSqAryUwJaP/W4Qn8ic4G06uunk6Ijlnn41LK1rhU+6ItIxrLzcP01KgMZVqUcLnT X-Forefront-Antispam-Report: CIP:194.138.21.75;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(376002)(346002)(396003)(136003)(451199015)(36840700001)(46966006)(40470700004)(956004)(2906002)(41300700001)(336012)(82310400005)(82960400001)(478600001)(40460700003)(4326008)(16526019)(356005)(81166007)(86362001)(70206006)(54906003)(36860700001)(82740400003)(316002)(36756003)(40480700001)(47076005)(2616005)(110136005)(5660300002)(8676002)(26005)(70586007)(8936002)(6666004)(1076003)(186003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2022 09:13:50.9153 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3920ce32-bc93-425d-d147-08da96fa9ad1 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.75];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR01FT046.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR10MB6875 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr The GPMC controller has the ability to configure the polarity for the wait pin. The current properties do not allow this configuration. This binding directly configures the WAITPINPOLARITY bit in the GPMC_CONFIG register by setting the gpmc,wait-pin-polarity dt-property. Signed-off-by: Benedikt Niedermayr --- .../bindings/memory-controllers/ti,gpmc-child.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml index 6e3995bb1630..8e541acdb1ff 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml @@ -230,6 +230,13 @@ properties: Wait-pin used by client. Must be less than "gpmc,num-waitpins". $ref: /schemas/types.yaml#/definitions/uint32 + gpmc,wait-pin-polarity: + description: | + Set the desired polarity for the selected wait pin. + 0 for active low, 1 for active high. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + gpmc,wait-on-read: description: Enables wait monitoring on reads. type: boolean