From patchwork Thu Sep 15 14:36:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12977480 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2A08C6FA8A for ; Thu, 15 Sep 2022 14:38:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230251AbiIOOi6 (ORCPT ); Thu, 15 Sep 2022 10:38:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230370AbiIOOid (ORCPT ); Thu, 15 Sep 2022 10:38:33 -0400 Received: from mail-lj1-x232.google.com (mail-lj1-x232.google.com [IPv6:2a00:1450:4864:20::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 082159F748 for ; Thu, 15 Sep 2022 07:37:08 -0700 (PDT) Received: by mail-lj1-x232.google.com with SMTP id 9so21550683ljr.2 for ; Thu, 15 Sep 2022 07:37:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=CJwKt806KlDMmbLXPqFo3IXy3dC96xism66KV4s8wBo=; b=XAmIpqvXIZB9DhsvX+3dP2wezezRSnjUEm9tUVldD2SW4e9HnBw3lL2tgoUiIFHPER 4J0LLdFZAk8IaDCiD2uS9lGAdaHg/Jq+G0Fe5sfaiN2R1pOrZ0fYKqfUOc6adwToWYVz 76BsTMh/L8Y9HkisW7TU2ahQTrOVsxtYICNM2VyYYNQDHo2cPQ6jwq3taT+he0QPAVph Htfq5qFKOLdC24nxLbZdrt1nQRfSbo8T8Q2fm2D66aP5qkwErNgYqY7PEn9yUWQ4+E5G zQx0CtWn+hDYidYTOLQAAHE30S3hntfgOB8CML7NlsCcpnx2ggVnm1Mvhk7Y7dnlgcDb tCdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=CJwKt806KlDMmbLXPqFo3IXy3dC96xism66KV4s8wBo=; b=1WsrU0c64QHrXamHztbfk+BiumbnTCEMdxboq2rYE51QvbcO+t6wBg33sNbxF++bZM I3CyCXvTzUXr+7UVf3LmtaSJy+IT7eV34dwaGQX2Prv2+sBAX2C9hus3+ehMN+wCLtqr ZodZiM4hohJhYedtUjpgYdlaoPwHPPuUxjgyZywNyygselUfdLSZr32ykK9oRhcRgL/t U83ki7wh32nB0wvmDuCG+pKPAnRRE0mvbqm/Zua+tyCk91AbTDaDLbaf6F/DnOKmFsIo FZlkMlvzUMsnF3jlS3uFzFV5k1Trxx/OQTY/Rk3sCXhtEq/K+ObqhSosY+jeBAUHae3X 8Dtg== X-Gm-Message-State: ACrzQf3w2Cd0D8JomGgrodoM0ZFofjQHxE+LSTnZRZENPzE4A0K3wW+Y vO5WJ7bkV6q2k/0AfSiwX08O0+ZREaLUlDQ6 X-Google-Smtp-Source: AMsMyM7edhihH0jc+FRTYH1jiZgrxAX5HjDEKIS/TGNpxZDan0TQxu5ez96yIHZ+BuZja7Pa4TxlyQ== X-Received: by 2002:a2e:3212:0:b0:26c:1796:93ab with SMTP id y18-20020a2e3212000000b0026c179693abmr13813ljy.299.1663252625812; Thu, 15 Sep 2022 07:37:05 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id x15-20020ac259cf000000b004984ab5956dsm2995794lfn.202.2022.09.15.07.37.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 07:37:05 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux@armlinux.org.uk, ansuelsmth@gmail.com, Mattias Forsblad Subject: [PATCH net-next v12 1/6] net: dsa: mv88e6xxx: Add RMU enable for select switches. Date: Thu, 15 Sep 2022 16:36:53 +0200 Message-Id: <20220915143658.3377139-2-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220915143658.3377139-1-mattias.forsblad@gmail.com> References: <20220915143658.3377139-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add RMU enable functionality for some Marvell SOHO switches. Reviewed-by: Andrew Lunn Signed-off-by: Mattias Forsblad Reviewed-by: Florian Fainelli --- drivers/net/dsa/mv88e6xxx/chip.c | 6 +++ drivers/net/dsa/mv88e6xxx/chip.h | 1 + drivers/net/dsa/mv88e6xxx/global1.c | 64 +++++++++++++++++++++++++++++ drivers/net/dsa/mv88e6xxx/global1.h | 3 ++ 4 files changed, 74 insertions(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 6f4ea39ab466..46e12b53a9e4 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -4098,6 +4098,7 @@ static const struct mv88e6xxx_ops mv88e6085_ops = { .ppu_disable = mv88e6185_g1_ppu_disable, .reset = mv88e6185_g1_reset, .rmu_disable = mv88e6085_g1_rmu_disable, + .rmu_enable = mv88e6085_g1_rmu_enable, .vtu_getnext = mv88e6352_g1_vtu_getnext, .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, .stu_getnext = mv88e6352_g1_stu_getnext, @@ -4181,6 +4182,7 @@ static const struct mv88e6xxx_ops mv88e6097_ops = { .pot_clear = mv88e6xxx_g2_pot_clear, .reset = mv88e6352_g1_reset, .rmu_disable = mv88e6085_g1_rmu_disable, + .rmu_enable = mv88e6085_g1_rmu_enable, .vtu_getnext = mv88e6352_g1_vtu_getnext, .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge, .phylink_get_caps = mv88e6095_phylink_get_caps, @@ -5300,6 +5302,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = { .pot_clear = mv88e6xxx_g2_pot_clear, .reset = mv88e6352_g1_reset, .rmu_disable = mv88e6352_g1_rmu_disable, + .rmu_enable = mv88e6352_g1_rmu_enable, .atu_get_hash = mv88e6165_g1_atu_get_hash, .atu_set_hash = mv88e6165_g1_atu_set_hash, .vtu_getnext = mv88e6352_g1_vtu_getnext, @@ -5367,6 +5370,7 @@ static const struct mv88e6xxx_ops mv88e6390_ops = { .pot_clear = mv88e6xxx_g2_pot_clear, .reset = mv88e6352_g1_reset, .rmu_disable = mv88e6390_g1_rmu_disable, + .rmu_enable = mv88e6390_g1_rmu_enable, .atu_get_hash = mv88e6165_g1_atu_get_hash, .atu_set_hash = mv88e6165_g1_atu_set_hash, .vtu_getnext = mv88e6390_g1_vtu_getnext, @@ -5434,6 +5438,7 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = { .pot_clear = mv88e6xxx_g2_pot_clear, .reset = mv88e6352_g1_reset, .rmu_disable = mv88e6390_g1_rmu_disable, + .rmu_enable = mv88e6390_g1_rmu_enable, .atu_get_hash = mv88e6165_g1_atu_get_hash, .atu_set_hash = mv88e6165_g1_atu_set_hash, .vtu_getnext = mv88e6390_g1_vtu_getnext, @@ -5504,6 +5509,7 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = { .pot_clear = mv88e6xxx_g2_pot_clear, .reset = mv88e6352_g1_reset, .rmu_disable = mv88e6390_g1_rmu_disable, + .rmu_enable = mv88e6390_g1_rmu_enable, .atu_get_hash = mv88e6165_g1_atu_get_hash, .atu_set_hash = mv88e6165_g1_atu_set_hash, .vtu_getnext = mv88e6390_g1_vtu_getnext, diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index e693154cf803..7ce3c41f6caf 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -637,6 +637,7 @@ struct mv88e6xxx_ops { /* Remote Management Unit operations */ int (*rmu_disable)(struct mv88e6xxx_chip *chip); + int (*rmu_enable)(struct mv88e6xxx_chip *chip, int port); /* Precision Time Protocol operations */ const struct mv88e6xxx_ptp_ops *ptp_ops; diff --git a/drivers/net/dsa/mv88e6xxx/global1.c b/drivers/net/dsa/mv88e6xxx/global1.c index 5848112036b0..1b3a3218c0b5 100644 --- a/drivers/net/dsa/mv88e6xxx/global1.c +++ b/drivers/net/dsa/mv88e6xxx/global1.c @@ -466,18 +466,82 @@ int mv88e6085_g1_rmu_disable(struct mv88e6xxx_chip *chip) MV88E6085_G1_CTL2_RM_ENABLE, 0); } +int mv88e6085_g1_rmu_enable(struct mv88e6xxx_chip *chip, int port) +{ + int val = MV88E6352_G1_CTL2_RMU_MODE_DISABLED; + + switch (port) { + case 9: + val = MV88E6085_G1_CTL2_RM_ENABLE; + break; + case 10: + val = MV88E6085_G1_CTL2_RM_ENABLE | MV88E6085_G1_CTL2_P10RM; + break; + default: + return -EOPNOTSUPP; + } + + return mv88e6xxx_g1_ctl2_mask(chip, MV88E6085_G1_CTL2_P10RM | + MV88E6085_G1_CTL2_RM_ENABLE, val); +} + int mv88e6352_g1_rmu_disable(struct mv88e6xxx_chip *chip) { return mv88e6xxx_g1_ctl2_mask(chip, MV88E6352_G1_CTL2_RMU_MODE_MASK, MV88E6352_G1_CTL2_RMU_MODE_DISABLED); } +int mv88e6352_g1_rmu_enable(struct mv88e6xxx_chip *chip, int port) +{ + int val = MV88E6352_G1_CTL2_RMU_MODE_DISABLED; + + switch (port) { + case 4: + val = MV88E6352_G1_CTL2_RMU_MODE_PORT_4; + break; + case 5: + val = MV88E6352_G1_CTL2_RMU_MODE_PORT_5; + break; + case 6: + val = MV88E6352_G1_CTL2_RMU_MODE_PORT_6; + break; + default: + return -EOPNOTSUPP; + } + + return mv88e6xxx_g1_ctl2_mask(chip, MV88E6352_G1_CTL2_RMU_MODE_MASK, val); +} + int mv88e6390_g1_rmu_disable(struct mv88e6xxx_chip *chip) { return mv88e6xxx_g1_ctl2_mask(chip, MV88E6390_G1_CTL2_RMU_MODE_MASK, MV88E6390_G1_CTL2_RMU_MODE_DISABLED); } +int mv88e6390_g1_rmu_enable(struct mv88e6xxx_chip *chip, int port) +{ + int val = MV88E6390_G1_CTL2_RMU_MODE_DISABLED; + + switch (port) { + case 0: + val = MV88E6390_G1_CTL2_RMU_MODE_PORT_0; + break; + case 1: + val = MV88E6390_G1_CTL2_RMU_MODE_PORT_1; + break; + case 9: + val = MV88E6390_G1_CTL2_RMU_MODE_PORT_9; + break; + case 10: + val = MV88E6390_G1_CTL2_RMU_MODE_PORT_10; + break; + default: + return -EOPNOTSUPP; + } + + return mv88e6xxx_g1_ctl2_mask(chip, MV88E6390_G1_CTL2_RMU_MODE_MASK, val); +} + int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip) { return mv88e6xxx_g1_ctl2_mask(chip, MV88E6390_G1_CTL2_HIST_MODE_MASK, diff --git a/drivers/net/dsa/mv88e6xxx/global1.h b/drivers/net/dsa/mv88e6xxx/global1.h index 65958b2a0d3a..b9aa66712037 100644 --- a/drivers/net/dsa/mv88e6xxx/global1.h +++ b/drivers/net/dsa/mv88e6xxx/global1.h @@ -313,8 +313,11 @@ int mv88e6250_g1_ieee_pri_map(struct mv88e6xxx_chip *chip); int mv88e6185_g1_set_cascade_port(struct mv88e6xxx_chip *chip, int port); int mv88e6085_g1_rmu_disable(struct mv88e6xxx_chip *chip); +int mv88e6085_g1_rmu_enable(struct mv88e6xxx_chip *chip, int port); int mv88e6352_g1_rmu_disable(struct mv88e6xxx_chip *chip); +int mv88e6352_g1_rmu_enable(struct mv88e6xxx_chip *chip, int port); int mv88e6390_g1_rmu_disable(struct mv88e6xxx_chip *chip); +int mv88e6390_g1_rmu_enable(struct mv88e6xxx_chip *chip, int port); int mv88e6xxx_g1_set_device_number(struct mv88e6xxx_chip *chip, int index); From patchwork Thu Sep 15 14:36:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12977481 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B12B4C6FA89 for ; Thu, 15 Sep 2022 14:39:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230149AbiIOOi7 (ORCPT ); Thu, 15 Sep 2022 10:38:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49328 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230397AbiIOOig (ORCPT ); Thu, 15 Sep 2022 10:38:36 -0400 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A49AF8E98E for ; Thu, 15 Sep 2022 07:37:10 -0700 (PDT) Received: by mail-lf1-x12b.google.com with SMTP id w8so30693008lft.12 for ; Thu, 15 Sep 2022 07:37:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=ygTxP1R89jRodLSMaZ5umXgwdbn+zdw9an2P2JOV6+Q=; b=ce4l+QHX6thjJ3lhwLcLeBPuLPyyeyfi+sCWqJAyX6AzEIqWSxxx7Q6OomxLgAC4qW dG/H9+AZePpOJ5HZYIHr7YRGugRtxWdi0TecLh1AlZAiDK1F9DczM/l3WGnwfmztQyKj nSCmT9mTkc56nSmU9JiWUblG6tWm+sqFdb3czDfcGqGbnWSC+x0dMVemZnkm9eQKJlJo EONeZKt3UvD7kV4vvg7s5bCVmxz9U7nmG6Vsu0C4QvASklVUrNtHEXcD1Je07wEob9V7 w+/ldMy0/qaqG3PaTY5hDNOoPMavUlQUi8Y1g/5EBZuPNjkCF71StLPFoDBgEK+Uc7Me zgFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=ygTxP1R89jRodLSMaZ5umXgwdbn+zdw9an2P2JOV6+Q=; b=R1goCWflQwWIxbERua5eFehwFAqkJSVRd7DT/mq604g6HQxgZDddfvOKfFV9KFuCfu TGw7VGc99cLnVc4mbUka9g6ft3Cx9bQV4Hv7Ck+zKqN5BZIfSGtejv2ANI4iBKe/cHFb UTiqFA5UhAdqCffENCOCa2IUkydDUCwVaOLcRNexC6NGPYUGmReaJoKVnIhSuzW9Dxsh qeBlAxntjKUUWwjSEivsSEPTVNt2oRu2t5SilYyi18FN+VQGInHR8mVEl/YErOGej/Wm CavWMTtqTbcin7EeRSU4JZQ74tYnQKgnD/kKKpbiU9BFlSIYevdMkkaqErVKuN5mgNv8 i4yw== X-Gm-Message-State: ACrzQf2qIBbbwuAWndqtnDr1z+4NbauIupCGDrsIgE7hF+Lo/miDEnBK cXUrVsngmKtSibv2umvGAWbzpPLuUlbdN45a X-Google-Smtp-Source: AMsMyM4snU0fF+2x0mmW9iLWHX2qqMLVJ9FL0fcZQexQ+vXLAVJCDYDNBMn1j3KNe27XxWH6A0/NKA== X-Received: by 2002:a05:6512:1329:b0:492:e050:b0dc with SMTP id x41-20020a056512132900b00492e050b0dcmr88409lfu.136.1663252626748; Thu, 15 Sep 2022 07:37:06 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id x15-20020ac259cf000000b004984ab5956dsm2995794lfn.202.2022.09.15.07.37.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 07:37:06 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux@armlinux.org.uk, ansuelsmth@gmail.com, Mattias Forsblad Subject: [PATCH net-next v12 2/6] net: dsa: Add convenience functions for frame handling Date: Thu, 15 Sep 2022 16:36:54 +0200 Message-Id: <20220915143658.3377139-3-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220915143658.3377139-1-mattias.forsblad@gmail.com> References: <20220915143658.3377139-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add common control functions for drivers that need to send and wait for control frames. Reviewed-by: Florian Fainelli Signed-off-by: Mattias Forsblad --- include/net/dsa.h | 11 +++++++++++ net/dsa/dsa.c | 17 +++++++++++++++++ net/dsa/dsa2.c | 2 ++ 3 files changed, 30 insertions(+) diff --git a/include/net/dsa.h b/include/net/dsa.h index f2ce12860546..08f3fff5f4df 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -495,6 +495,8 @@ struct dsa_switch { unsigned int max_num_bridges; unsigned int num_ports; + + struct completion inband_done; }; static inline struct dsa_port *dsa_to_port(struct dsa_switch *ds, int p) @@ -1390,6 +1392,15 @@ void dsa_tag_drivers_register(struct dsa_tag_driver *dsa_tag_driver_array[], void dsa_tag_drivers_unregister(struct dsa_tag_driver *dsa_tag_driver_array[], unsigned int count); +int dsa_switch_inband_tx(struct dsa_switch *ds, struct sk_buff *skb, + struct completion *completion, unsigned long timeout); + +static inline void dsa_switch_inband_complete(struct dsa_switch *ds, struct completion *completion) +{ + /* Custom completion? */ + complete(completion ?: &ds->inband_done); +} + #define dsa_tag_driver_module_drivers(__dsa_tag_drivers_array, __count) \ static int __init dsa_tag_driver_module_init(void) \ { \ diff --git a/net/dsa/dsa.c b/net/dsa/dsa.c index be7b320cda76..ad870494d68b 100644 --- a/net/dsa/dsa.c +++ b/net/dsa/dsa.c @@ -324,6 +324,23 @@ int dsa_switch_resume(struct dsa_switch *ds) EXPORT_SYMBOL_GPL(dsa_switch_resume); #endif +int dsa_switch_inband_tx(struct dsa_switch *ds, struct sk_buff *skb, + struct completion *completion, unsigned long timeout) +{ + struct completion *com; + + /* Custom completion? */ + com = completion ? : &ds->inband_done; + + reinit_completion(com); + + if (skb) + dev_queue_xmit(skb); + + return wait_for_completion_timeout(com, msecs_to_jiffies(timeout)); +} +EXPORT_SYMBOL_GPL(dsa_switch_inband_tx); + static struct packet_type dsa_pack_type __read_mostly = { .type = cpu_to_be16(ETH_P_XDSA), .func = dsa_switch_rcv, diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c index ed56c7a554b8..a048a6200789 100644 --- a/net/dsa/dsa2.c +++ b/net/dsa/dsa2.c @@ -874,6 +874,8 @@ static int dsa_switch_setup(struct dsa_switch *ds) if (ds->setup) return 0; + init_completion(&ds->inband_done); + /* Initialize ds->phys_mii_mask before registering the slave MDIO bus * driver and before ops->setup() has run, since the switch drivers and * the slave MDIO bus driver rely on these values for probing PHY From patchwork Thu Sep 15 14:36:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12977482 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBAB6ECAAA1 for ; Thu, 15 Sep 2022 14:39:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230329AbiIOOjC (ORCPT ); Thu, 15 Sep 2022 10:39:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50244 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230409AbiIOOii (ORCPT ); Thu, 15 Sep 2022 10:38:38 -0400 Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 586E69F190 for ; Thu, 15 Sep 2022 07:37:12 -0700 (PDT) Received: by mail-lj1-x22c.google.com with SMTP id bn9so22435063ljb.6 for ; Thu, 15 Sep 2022 07:37:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=gYr4/+/VXuVJL9MDBujFWj6YWYU745SughITazFnTEI=; b=di4bTMin8lTbd3XikRhhky8SMRz4JclkzQrNDrxPZbHCyu9B9qj99/6NxAHRfD27IG g6KInOS+oUKyQAjJmDFGpS2UQnI7jIoQlsBSlykx9H/+WLpCNK/Xk2vW4n0LOneRhC0q GtMsBDkx5fw70GuJjekmsAJTkBuVbvK0ZqrpY9gWaZPA/YNRFnwcqwBoaDefq9M3hEhr 5ZBQTYhEfYpWYluPx/e/OYZEu5Fx76OSCvz8pcOc+zAMEqNxdNFYaiUg8KfF3yCqbzQA zFAqhPxbWTIanqLr1k9bpsUXqfRZxDXtqca7uDoeBa/HMwN4vHSfiDFf+TBEeLYSo333 MUhQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=gYr4/+/VXuVJL9MDBujFWj6YWYU745SughITazFnTEI=; b=5qJwqnAJRU3guUKmg54AuQSNJ+PW2iINTX4zoTeqPmzg7NBvuHnf3KmWBKt2xaU/u7 Xet50Dv5nA6qPyO8quAj41y9StVExXREMl8Rx+L5QTX2Lxc3CnJJqjso/xZyKtMJxukn NXapmz2Hi+wDHZiIoWzvsgEHkhOnbfhSmP3tQ+orcLj7LIIcQLvdsC/MG5gRheV4tEAx cYiYlWEisk/U18hMForGvgfSkgaFwrrwElagSZrBnhyWdbafKmrTiWJy+Gpn5WdZ2CZv FLDJUCNci9HzuXum2zUHStkPSR9Ms6JNYPVEPAy8AskKg7NH89uZiUs3NINCV7Q7YM5J 2zbQ== X-Gm-Message-State: ACrzQf0tpWx3OekpJ47GkInHnIYCLZA8wLek4uzlgvBFAOdDx1DRD7/+ FgWpyZKTZwCLAlxkaf9jLxNuqsJpZOBXHzxZ X-Google-Smtp-Source: AMsMyM5MjiWYQgiDBa8cFbQIDdMB9wRLJfLoap90jW1wKBLJmXK9DZ0aNK4llUmnnUIxVQjSDacXgw== X-Received: by 2002:a2e:547:0:b0:26b:ed69:7599 with SMTP id 68-20020a2e0547000000b0026bed697599mr31332ljf.36.1663252627714; Thu, 15 Sep 2022 07:37:07 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id x15-20020ac259cf000000b004984ab5956dsm2995794lfn.202.2022.09.15.07.37.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 07:37:07 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux@armlinux.org.uk, ansuelsmth@gmail.com, Mattias Forsblad Subject: [PATCH net-next v12 3/6] net: dsa: Introduce dsa tagger data operation. Date: Thu, 15 Sep 2022 16:36:55 +0200 Message-Id: <20220915143658.3377139-4-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220915143658.3377139-1-mattias.forsblad@gmail.com> References: <20220915143658.3377139-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Support connecting dsa tagger for frame2reg decoding with its associated hookup functions. Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli Signed-off-by: Mattias Forsblad --- include/linux/dsa/mv88e6xxx.h | 6 ++++++ net/dsa/dsa_priv.h | 2 ++ net/dsa/tag_dsa.c | 40 +++++++++++++++++++++++++++++++---- 3 files changed, 44 insertions(+), 4 deletions(-) diff --git a/include/linux/dsa/mv88e6xxx.h b/include/linux/dsa/mv88e6xxx.h index 8c3d45eca46b..a8b6f3c110e5 100644 --- a/include/linux/dsa/mv88e6xxx.h +++ b/include/linux/dsa/mv88e6xxx.h @@ -5,9 +5,15 @@ #ifndef _NET_DSA_TAG_MV88E6XXX_H #define _NET_DSA_TAG_MV88E6XXX_H +#include #include #define MV88E6XXX_VID_STANDALONE 0 #define MV88E6XXX_VID_BRIDGED (VLAN_N_VID - 1) +struct dsa_tagger_data { + void (*decode_frame2reg)(struct dsa_switch *ds, + struct sk_buff *skb); +}; + #endif diff --git a/net/dsa/dsa_priv.h b/net/dsa/dsa_priv.h index 614fbba8fe39..3b23b37eb0f4 100644 --- a/net/dsa/dsa_priv.h +++ b/net/dsa/dsa_priv.h @@ -17,6 +17,8 @@ #define DSA_MAX_NUM_OFFLOADING_BRIDGES BITS_PER_LONG +#define DSA_FRAME2REG_SOURCE_DEV GENMASK(5, 0) + enum { DSA_NOTIFIER_AGEING_TIME, DSA_NOTIFIER_BRIDGE_JOIN, diff --git a/net/dsa/tag_dsa.c b/net/dsa/tag_dsa.c index e4b6e3f2a3db..e7fdf3b5cb4a 100644 --- a/net/dsa/tag_dsa.c +++ b/net/dsa/tag_dsa.c @@ -198,8 +198,11 @@ static struct sk_buff *dsa_xmit_ll(struct sk_buff *skb, struct net_device *dev, static struct sk_buff *dsa_rcv_ll(struct sk_buff *skb, struct net_device *dev, u8 extra) { + struct dsa_port *cpu_dp = dev->dsa_ptr; + struct dsa_tagger_data *tagger_data; bool trap = false, trunk = false; int source_device, source_port; + struct dsa_switch *ds; enum dsa_code code; enum dsa_cmd cmd; u8 *dsa_header; @@ -218,9 +221,16 @@ static struct sk_buff *dsa_rcv_ll(struct sk_buff *skb, struct net_device *dev, switch (code) { case DSA_CODE_FRAME2REG: - /* Remote management is not implemented yet, - * drop. - */ + source_device = FIELD_GET(DSA_FRAME2REG_SOURCE_DEV, dsa_header[0]); + ds = dsa_switch_find(cpu_dp->dst->index, source_device); + if (ds) { + tagger_data = ds->tagger_data; + if (likely(tagger_data->decode_frame2reg)) + tagger_data->decode_frame2reg(ds, skb); + } else { + net_err_ratelimited("RMU: Didn't find switch with index %d", + source_device); + } return NULL; case DSA_CODE_ARP_MIRROR: case DSA_CODE_POLICY_MIRROR: @@ -254,7 +264,6 @@ static struct sk_buff *dsa_rcv_ll(struct sk_buff *skb, struct net_device *dev, source_port = (dsa_header[1] >> 3) & 0x1f; if (trunk) { - struct dsa_port *cpu_dp = dev->dsa_ptr; struct dsa_lag *lag; /* The exact source port is not available in the tag, @@ -323,6 +332,25 @@ static struct sk_buff *dsa_rcv_ll(struct sk_buff *skb, struct net_device *dev, return skb; } +static int dsa_tag_connect(struct dsa_switch *ds) +{ + struct dsa_tagger_data *tagger_data; + + tagger_data = kzalloc(sizeof(*tagger_data), GFP_KERNEL); + if (!tagger_data) + return -ENOMEM; + + ds->tagger_data = tagger_data; + + return 0; +} + +static void dsa_tag_disconnect(struct dsa_switch *ds) +{ + kfree(ds->tagger_data); + ds->tagger_data = NULL; +} + #if IS_ENABLED(CONFIG_NET_DSA_TAG_DSA) static struct sk_buff *dsa_xmit(struct sk_buff *skb, struct net_device *dev) @@ -343,6 +371,8 @@ static const struct dsa_device_ops dsa_netdev_ops = { .proto = DSA_TAG_PROTO_DSA, .xmit = dsa_xmit, .rcv = dsa_rcv, + .connect = dsa_tag_connect, + .disconnect = dsa_tag_disconnect, .needed_headroom = DSA_HLEN, }; @@ -385,6 +415,8 @@ static const struct dsa_device_ops edsa_netdev_ops = { .proto = DSA_TAG_PROTO_EDSA, .xmit = edsa_xmit, .rcv = edsa_rcv, + .connect = dsa_tag_connect, + .disconnect = dsa_tag_disconnect, .needed_headroom = EDSA_HLEN, }; From patchwork Thu Sep 15 14:36:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12977484 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DB7FECAAA1 for ; Thu, 15 Sep 2022 14:39:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230340AbiIOOjI (ORCPT ); Thu, 15 Sep 2022 10:39:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230421AbiIOOin (ORCPT ); Thu, 15 Sep 2022 10:38:43 -0400 Received: from mail-lj1-x22e.google.com (mail-lj1-x22e.google.com [IPv6:2a00:1450:4864:20::22e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D00969D643 for ; Thu, 15 Sep 2022 07:37:12 -0700 (PDT) Received: by mail-lj1-x22e.google.com with SMTP id q17so8565535lji.11 for ; Thu, 15 Sep 2022 07:37:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=udFJWNjuXSFFlXMtGFZmHVbzFXJJeBpOttL8xrKlf2M=; b=MLY3jQ0/umU5m0nT11pJI1DtMlzf+0BhAOPq9euZXcyjEaV2/i5c2PWbDjSe7jFTkb P+TxiH8aM0srBcQkebn1BBhn/MF60TnDyXcpsyWNbJR1aeMVvWbSwYNMrkj4hMutU3Yv 0fNWoW0FQC5VpjrMZ60pCuHf/y7VM6c5ISLyNuZGCvf2Cu5dfl4nxsFMdWKD3H+guZXx F3vBjQ5P39NQeOd11M0LBQTDf4BZ0XBpLa10Lv7/xtJU/5SJzu95Eu8sQ5rd4sHKtLI4 s8n7DiBqpL+3u0watCbtJKGqf7kgOyowHBmDIoJfIy2a7XCKSlh/gB0Haw0bqWJSLKPt 6GKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=udFJWNjuXSFFlXMtGFZmHVbzFXJJeBpOttL8xrKlf2M=; b=Xa1mUAAKtLrQ7F7uOVzXJ7KB0+uNKkGO+5pYVEp78LQY1aqYYVv+YM8v5Kk38ygkjk HfOvaxxq0SlT1Ood5Pf/Ou0yiSF9QltcYCJEGDrtugf8IuTTt2KKRxlYTgTpsPCTEWXl Npjk4VaBf8SlWWy4/OjrBaxAA5blXAXpj3OEYhnUm2q+MBjfznbYFhENtOK27fMUmN+C qJvfseFEhOTimXyf/ugPwXK0nzi0NeMEILjOTAMYogtzWpeaKauEHhO3DZjNd+YkJdfz WRHcn61lqXZ3rb6eBjNjzvwccsTtJEK8g+cnV5MARjeyd2LKNhLGQV3U71cElFEEXdSL iecQ== X-Gm-Message-State: ACrzQf3uC+98egN0iqv0+xjNPnsJPGYe2g7CPKIqL5kmkpdbbJCNT5uZ EjN7FK+KuXQuxuSzwMeQU8EM8gyvznaHnTrl X-Google-Smtp-Source: AMsMyM6BCKIKmsy7Q5CAPt3y13lPH78R2l0UdLAOMGeXcDMGHvZLaEoOAxz3AFiGRsS9erX6NNqc7g== X-Received: by 2002:a2e:b88d:0:b0:25f:f179:3837 with SMTP id r13-20020a2eb88d000000b0025ff1793837mr12138ljp.357.1663252628699; Thu, 15 Sep 2022 07:37:08 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id x15-20020ac259cf000000b004984ab5956dsm2995794lfn.202.2022.09.15.07.37.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 07:37:08 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux@armlinux.org.uk, ansuelsmth@gmail.com, Mattias Forsblad Subject: [PATCH net-next v12 4/6] net: dsa: mv88e6xxxx: Add RMU functionality. Date: Thu, 15 Sep 2022 16:36:56 +0200 Message-Id: <20220915143658.3377139-5-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220915143658.3377139-1-mattias.forsblad@gmail.com> References: <20220915143658.3377139-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The Marvell SOHO switches supports a secondary control channel for accessing data in the switch. Special crafted ethernet frames can access functions in the switch. These frames is handled by the Remote Management Unit (RMU) in the switch. Accessing data structures is specially efficient and lessens the access contention on the MDIO bus. Signed-off-by: Mattias Forsblad Reviewed-by: Florian Fainelli --- drivers/net/dsa/mv88e6xxx/Makefile | 1 + drivers/net/dsa/mv88e6xxx/chip.c | 28 ++- drivers/net/dsa/mv88e6xxx/chip.h | 21 ++ drivers/net/dsa/mv88e6xxx/rmu.c | 311 +++++++++++++++++++++++++++++ drivers/net/dsa/mv88e6xxx/rmu.h | 73 +++++++ 5 files changed, 426 insertions(+), 8 deletions(-) create mode 100644 drivers/net/dsa/mv88e6xxx/rmu.c create mode 100644 drivers/net/dsa/mv88e6xxx/rmu.h diff --git a/drivers/net/dsa/mv88e6xxx/Makefile b/drivers/net/dsa/mv88e6xxx/Makefile index c8eca2b6f959..105d7bd832c9 100644 --- a/drivers/net/dsa/mv88e6xxx/Makefile +++ b/drivers/net/dsa/mv88e6xxx/Makefile @@ -15,3 +15,4 @@ mv88e6xxx-objs += port_hidden.o mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_PTP) += ptp.o mv88e6xxx-objs += serdes.o mv88e6xxx-objs += smi.o +mv88e6xxx-objs += rmu.o diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 46e12b53a9e4..294bf9bbaf3f 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -42,6 +42,7 @@ #include "ptp.h" #include "serdes.h" #include "smi.h" +#include "rmu.h" static void assert_reg_lock(struct mv88e6xxx_chip *chip) { @@ -1535,14 +1536,6 @@ static int mv88e6xxx_trunk_setup(struct mv88e6xxx_chip *chip) return 0; } -static int mv88e6xxx_rmu_setup(struct mv88e6xxx_chip *chip) -{ - if (chip->info->ops->rmu_disable) - return chip->info->ops->rmu_disable(chip); - - return 0; -} - static int mv88e6xxx_pot_setup(struct mv88e6xxx_chip *chip) { if (chip->info->ops->pot_clear) @@ -6867,6 +6860,23 @@ static int mv88e6xxx_crosschip_lag_leave(struct dsa_switch *ds, int sw_index, return err_sync ? : err_pvt; } +static int mv88e6xxx_connect_tag_protocol(struct dsa_switch *ds, + enum dsa_tag_protocol proto) +{ + struct dsa_tagger_data *tagger_data = ds->tagger_data; + + switch (proto) { + case DSA_TAG_PROTO_DSA: + case DSA_TAG_PROTO_EDSA: + tagger_data->decode_frame2reg = mv88e6xxx_decode_frame2reg_handler; + break; + default: + return -EPROTONOSUPPORT; + } + + return 0; +} + static const struct dsa_switch_ops mv88e6xxx_switch_ops = { .get_tag_protocol = mv88e6xxx_get_tag_protocol, .change_tag_protocol = mv88e6xxx_change_tag_protocol, @@ -6932,6 +6942,8 @@ static const struct dsa_switch_ops mv88e6xxx_switch_ops = { .crosschip_lag_change = mv88e6xxx_crosschip_lag_change, .crosschip_lag_join = mv88e6xxx_crosschip_lag_join, .crosschip_lag_leave = mv88e6xxx_crosschip_lag_leave, + .master_state_change = mv88e6xxx_master_state_change, + .connect_tag_protocol = mv88e6xxx_connect_tag_protocol, }; static int mv88e6xxx_register_switch(struct mv88e6xxx_chip *chip) diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index 7ce3c41f6caf..ea1789feeacf 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -266,6 +266,7 @@ struct mv88e6xxx_vlan { struct mv88e6xxx_port { struct mv88e6xxx_chip *chip; int port; + u64 rmu_raw_stats[64]; struct mv88e6xxx_vlan bridge_pvid; u64 serdes_stats[2]; u64 atu_member_violation; @@ -282,6 +283,18 @@ struct mv88e6xxx_port { struct devlink_region *region; }; +struct mv88e6xxx_rmu { + /* RMU resources */ + struct net_device *master_netdev; + const struct mv88e6xxx_bus_ops *smi_ops; + struct mv88e6xxx_bus_ops *rmu_ops; + /* Mutex for RMU operations */ + struct mutex mutex; + u16 prodnr; + struct sk_buff *resp; + int seqno; +}; + enum mv88e6xxx_region_id { MV88E6XXX_REGION_GLOBAL1 = 0, MV88E6XXX_REGION_GLOBAL2, @@ -410,12 +423,16 @@ struct mv88e6xxx_chip { /* Bridge MST to SID mappings */ struct list_head msts; + + /* RMU resources */ + struct mv88e6xxx_rmu rmu; }; struct mv88e6xxx_bus_ops { int (*read)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val); int (*write)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val); int (*init)(struct mv88e6xxx_chip *chip); + void (*get_rmon)(struct mv88e6xxx_chip *chip, int port, uint64_t *data); }; struct mv88e6xxx_mdio_bus { @@ -805,4 +822,8 @@ static inline void mv88e6xxx_reg_unlock(struct mv88e6xxx_chip *chip) int mv88e6xxx_fid_map(struct mv88e6xxx_chip *chip, unsigned long *bitmap); +static inline bool mv88e6xxx_rmu_available(struct mv88e6xxx_chip *chip) +{ + return chip->rmu.master_netdev ? 1 : 0; +} #endif /* _MV88E6XXX_CHIP_H */ diff --git a/drivers/net/dsa/mv88e6xxx/rmu.c b/drivers/net/dsa/mv88e6xxx/rmu.c new file mode 100644 index 000000000000..43c4945224e9 --- /dev/null +++ b/drivers/net/dsa/mv88e6xxx/rmu.c @@ -0,0 +1,311 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Marvell 88E6xxx Switch Remote Management Unit Support + * + * Copyright (c) 2022 Mattias Forsblad + * + */ + +#include +#include "rmu.h" +#include "global1.h" + +static const u8 mv88e6xxx_rmu_dest_addr[ETH_ALEN] = { 0x01, 0x50, 0x43, 0x00, 0x00, 0x00 }; + +static void mv88e6xxx_rmu_create_l2(struct dsa_switch *ds, struct sk_buff *skb) +{ + struct mv88e6xxx_chip *chip = ds->priv; + struct ethhdr *eth; + u8 *edsa_header; + u8 *dsa_header; + u8 extra = 0; + + if (chip->tag_protocol == DSA_TAG_PROTO_EDSA) + extra = 4; + + /* Create RMU L2 header */ + dsa_header = skb_push(skb, 6); + dsa_header[0] = FIELD_PREP(MV88E6XXX_CPU_CODE_MASK, MV88E6XXX_RMU); + dsa_header[0] |= FIELD_PREP(MV88E6XXX_TRG_DEV_MASK, ds->index); + dsa_header[1] = FIELD_PREP(MV88E6XXX_RMU_CODE_MASK, 1); + dsa_header[1] |= FIELD_PREP(MV88E6XXX_RMU_L2_BYTE1_RESV, MV88E6XXX_RMU_L2_BYTE1_RESV_VAL); + dsa_header[2] = FIELD_PREP(MV88E6XXX_RMU_PRIO_MASK, MV88E6XXX_RMU_PRIO); + dsa_header[2] |= MV88E6XXX_RMU_L2_BYTE2_RESV; + dsa_header[3] = ++chip->rmu.seqno; + dsa_header[4] = 0; + dsa_header[5] = 0; + + /* Insert RMU MAC destination address /w extra if needed */ + eth = skb_push(skb, ETH_ALEN * 2 + extra); + memcpy(eth->h_dest, mv88e6xxx_rmu_dest_addr, ETH_ALEN); + ether_addr_copy(eth->h_source, chip->rmu.master_netdev->dev_addr); + + if (extra) { + edsa_header = (u8 *)ð->h_proto; + edsa_header[0] = (ETH_P_EDSA >> 8) & 0xff; + edsa_header[1] = ETH_P_EDSA & 0xff; + edsa_header[2] = 0x00; + edsa_header[3] = 0x00; + } +} + +static int mv88e6xxx_rmu_send_wait(struct mv88e6xxx_chip *chip, + const void *req, int req_len, + void *resp, unsigned int *resp_len) +{ + struct sk_buff *skb; + unsigned char *data; + int ret = 0; + + skb = netdev_alloc_skb(chip->rmu.master_netdev, 64); + if (!skb) + return -ENOMEM; + + /* Take height for an eventual EDSA header */ + skb_reserve(skb, 2 * ETH_HLEN + 4); + skb_reset_network_header(skb); + + /* Insert RMU request message */ + data = skb_put(skb, req_len); + memcpy(data, req, req_len); + + mv88e6xxx_rmu_create_l2(chip->ds, skb); + + mutex_lock(&chip->rmu.mutex); + + ret = dsa_switch_inband_tx(chip->ds, skb, NULL, MV88E6XXX_RMU_WAIT_TIME_MS); + if (!ret) { + dev_err(chip->dev, "RMU: error waiting for request (%pe)\n", + ERR_PTR(ret)); + goto out; + } + + if (chip->rmu.resp->len > *resp_len) { + ret = -EMSGSIZE; + } else { + *resp_len = chip->rmu.resp->len; + memcpy(resp, chip->rmu.resp->data, chip->rmu.resp->len); + } + + kfree_skb(chip->rmu.resp); + chip->rmu.resp = NULL; + +out: + mutex_unlock(&chip->rmu.mutex); + + return ret > 0 ? 0 : ret; +} + +static int mv88e6xxx_rmu_validate_response(struct mv88e6xxx_rmu_header *resp, int code) +{ + if (be16_to_cpu(resp->format) != MV88E6XXX_RMU_RESP_FORMAT_1 && + be16_to_cpu(resp->format) != MV88E6XXX_RMU_RESP_FORMAT_2 && + be16_to_cpu(resp->code) != code) { + net_dbg_ratelimited("RMU: received unknown format 0x%04x code 0x%04x", + resp->format, resp->code); + return -EIO; + } + + return 0; +} + +static int mv88e6xxx_rmu_get_id(struct mv88e6xxx_chip *chip, int port) +{ + const u16 req[4] = { MV88E6XXX_RMU_REQ_FORMAT_GET_ID, + MV88E6XXX_RMU_REQ_PAD, + MV88E6XXX_RMU_REQ_CODE_GET_ID, + MV88E6XXX_RMU_REQ_DATA}; + struct mv88e6xxx_rmu_header resp; + int resp_len; + int ret = -1; + + resp_len = sizeof(resp); + ret = mv88e6xxx_rmu_send_wait(chip, req, sizeof(req), + &resp, &resp_len); + if (ret) { + dev_dbg(chip->dev, "RMU: error for command GET_ID %pe\n", ERR_PTR(ret)); + return ret; + } + + /* Got response */ + ret = mv88e6xxx_rmu_validate_response(&resp, MV88E6XXX_RMU_RESP_CODE_GOT_ID); + if (ret) + return ret; + + chip->rmu.prodnr = be16_to_cpu(resp.prodnr); + + return ret; +} + +static void mv88e6xxx_rmu_stats_get(struct mv88e6xxx_chip *chip, int port, uint64_t *data) +{ + u16 req[4] = { MV88E6XXX_RMU_REQ_FORMAT_SOHO, + MV88E6XXX_RMU_REQ_PAD, + MV88E6XXX_RMU_REQ_CODE_DUMP_MIB, + MV88E6XXX_RMU_REQ_DATA}; + struct mv88e6xxx_dump_mib_resp resp; + struct mv88e6xxx_port *p; + u8 resp_port; + int resp_len; + int num_mibs; + int ret; + int i; + + /* Populate port number in request */ + req[3] = FIELD_PREP(MV88E6XXX_RMU_REQ_DUMP_MIB_PORT_MASK, port); + + resp_len = sizeof(resp); + ret = mv88e6xxx_rmu_send_wait(chip, req, sizeof(req), + &resp, &resp_len); + if (ret) { + dev_dbg(chip->dev, "RMU: error for command DUMP_MIB %pe port %d\n", + ERR_PTR(ret), port); + return; + } + + /* Got response */ + ret = mv88e6xxx_rmu_validate_response(&resp.rmu_header, MV88E6XXX_RMU_RESP_CODE_DUMP_MIB); + if (ret) + return; + + resp_port = FIELD_GET(MV88E6XXX_SOURCE_PORT, resp.portnum); + p = &chip->ports[resp_port]; + if (!p) { + dev_err_ratelimited(chip->dev, "RMU: illegal port number in response: %d\n", + resp_port); + return; + } + + /* Copy MIB array for further processing according to chip type */ + num_mibs = (resp_len - offsetof(struct mv88e6xxx_dump_mib_resp, mib)) / sizeof(__be32); + for (i = 0; i < num_mibs; i++) + p->rmu_raw_stats[i] = be32_to_cpu(resp.mib[i]); + + /* Update MIB for port */ + if (chip->info->ops->stats_get_stats) + chip->info->ops->stats_get_stats(chip, port, data); +} + +static void mv88e6xxx_disable_rmu(struct mv88e6xxx_chip *chip) +{ + chip->smi_ops = chip->rmu.smi_ops; + chip->rmu.master_netdev = NULL; + if (chip->info->ops->rmu_disable) + chip->info->ops->rmu_disable(chip); +} + +static int mv88e6xxx_enable_check_rmu(const struct net_device *master, + struct mv88e6xxx_chip *chip, int port) +{ + int ret; + + chip->rmu.master_netdev = (struct net_device *)master; + + /* Check if chip is alive */ + ret = mv88e6xxx_rmu_get_id(chip, port); + if (!ret) + return ret; + + chip->smi_ops = chip->rmu.rmu_ops; + + return 0; +} + +void mv88e6xxx_master_state_change(struct dsa_switch *ds, const struct net_device *master, + bool operational) +{ + struct dsa_port *cpu_dp = master->dsa_ptr; + struct mv88e6xxx_chip *chip = ds->priv; + int port; + int ret; + + port = dsa_towards_port(ds, cpu_dp->ds->index, cpu_dp->index); + + mv88e6xxx_reg_lock(chip); + + if (operational && chip->info->ops->rmu_enable) { + ret = chip->info->ops->rmu_enable(chip, port); + + if (ret == -EOPNOTSUPP) + goto out; + + if (!ret) { + dev_dbg(chip->dev, "RMU: Enabled on port %d", port); + + ret = mv88e6xxx_enable_check_rmu(master, chip, port); + if (!ret) + goto out; + + } else { + dev_err(chip->dev, "RMU: Unable to enable on port %d %pe", + port, ERR_PTR(ret)); + goto out; + } + } else { + mv88e6xxx_disable_rmu(chip); + } + +out: + mv88e6xxx_reg_unlock(chip); +} + +static int mv88e6xxx_validate_mac(struct dsa_switch *ds, struct sk_buff *skb) +{ + struct mv88e6xxx_chip *chip = ds->priv; + unsigned char *ethhdr; + + /* Check matching MAC */ + ethhdr = skb_mac_header(skb); + if (!ether_addr_equal(chip->rmu.master_netdev->dev_addr, ethhdr)) { + dev_dbg_ratelimited(ds->dev, "RMU: mismatching MAC address for request. Rx %pM expecting %pM\n", + ethhdr, chip->rmu.master_netdev->dev_addr); + return -EINVAL; + } + + return 0; +} + +void mv88e6xxx_decode_frame2reg_handler(struct dsa_switch *ds, struct sk_buff *skb) +{ + struct mv88e6xxx_chip *chip = ds->priv; + u8 *dsa_header; + u8 seqno; + + /* Decode Frame2Reg DSA portion */ + dsa_header = skb->data - 2; + + if (mv88e6xxx_validate_mac(ds, skb)) + return; + + seqno = dsa_header[3]; + if (seqno != chip->rmu.seqno) { + net_err_ratelimited("RMU: wrong seqno received. Was %d, expected %d", + seqno, chip->rmu.seqno); + return; + } + + /* Pull DSA L2 data */ + skb_pull(skb, MV88E6XXX_DSA_HLEN); + + /* Get an reference for further processing in initiator */ + chip->rmu.resp = skb_get(skb); + + dsa_switch_inband_complete(ds, NULL); +} + +int mv88e6xxx_rmu_setup(struct mv88e6xxx_chip *chip) +{ + mutex_init(&chip->rmu.mutex); + + /* Remember original ops for restore */ + chip->rmu.smi_ops = chip->smi_ops; + + /* Change rmu ops with our own pointer */ + chip->rmu.rmu_ops = (struct mv88e6xxx_bus_ops *)chip->rmu.smi_ops; + chip->rmu.rmu_ops->get_rmon = mv88e6xxx_rmu_stats_get; + + if (chip->info->ops->rmu_disable) + return chip->info->ops->rmu_disable(chip); + + return 0; +} diff --git a/drivers/net/dsa/mv88e6xxx/rmu.h b/drivers/net/dsa/mv88e6xxx/rmu.h new file mode 100644 index 000000000000..67757a3c2f29 --- /dev/null +++ b/drivers/net/dsa/mv88e6xxx/rmu.h @@ -0,0 +1,73 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Marvell 88E6xxx Switch Remote Management Unit Support + * + * Copyright (c) 2022 Mattias Forsblad + * + */ + +#ifndef _MV88E6XXX_RMU_H_ +#define _MV88E6XXX_RMU_H_ + +#include "chip.h" + +#define MV88E6XXX_DSA_HLEN 4 + +#define MV88E6XXX_RMU_MAX_RMON 64 + +#define MV88E6XXX_RMU_WAIT_TIME_MS 20 + +#define MV88E6XXX_RMU_L2_BYTE1_RESV_VAL 0x3e +#define MV88E6XXX_RMU 1 +#define MV88E6XXX_RMU_PRIO 6 +#define MV88E6XXX_RMU_RESV2 0xf + +#define MV88E6XXX_SOURCE_PORT GENMASK(6, 3) +#define MV88E6XXX_CPU_CODE_MASK GENMASK(7, 6) +#define MV88E6XXX_TRG_DEV_MASK GENMASK(4, 0) +#define MV88E6XXX_RMU_CODE_MASK GENMASK(1, 1) +#define MV88E6XXX_RMU_PRIO_MASK GENMASK(7, 5) +#define MV88E6XXX_RMU_L2_BYTE1_RESV GENMASK(7, 2) +#define MV88E6XXX_RMU_L2_BYTE2_RESV GENMASK(3, 0) + +#define MV88E6XXX_RMU_REQ_GET_ID 1 +#define MV88E6XXX_RMU_REQ_DUMP_MIB 2 + +#define MV88E6XXX_RMU_REQ_FORMAT_GET_ID 0x0000 +#define MV88E6XXX_RMU_REQ_FORMAT_SOHO 0x0001 +#define MV88E6XXX_RMU_REQ_PAD 0x0000 +#define MV88E6XXX_RMU_REQ_CODE_GET_ID 0x0000 +#define MV88E6XXX_RMU_REQ_CODE_DUMP_MIB 0x1020 +#define MV88E6XXX_RMU_REQ_DATA 0x0000 + +#define MV88E6XXX_RMU_REQ_DUMP_MIB_PORT_MASK GENMASK(4, 0) + +#define MV88E6XXX_RMU_RESP_FORMAT_1 0x0001 +#define MV88E6XXX_RMU_RESP_FORMAT_2 0x0002 +#define MV88E6XXX_RMU_RESP_ERROR 0xffff + +#define MV88E6XXX_RMU_RESP_CODE_GOT_ID 0x0000 +#define MV88E6XXX_RMU_RESP_CODE_DUMP_MIB 0x1020 + +struct mv88e6xxx_rmu_header { + __be16 format; + __be16 prodnr; + __be16 code; +} __packed; + +struct mv88e6xxx_dump_mib_resp { + struct mv88e6xxx_rmu_header rmu_header; + u8 devnum; + u8 portnum; + __be32 timestamp; + __be32 mib[MV88E6XXX_RMU_MAX_RMON]; +} __packed; + +int mv88e6xxx_rmu_setup(struct mv88e6xxx_chip *chip); + +void mv88e6xxx_master_state_change(struct dsa_switch *ds, const struct net_device *master, + bool operational); + +void mv88e6xxx_decode_frame2reg_handler(struct dsa_switch *ds, struct sk_buff *skb); + +#endif /* _MV88E6XXX_RMU_H_ */ From patchwork Thu Sep 15 14:36:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12977485 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6146C6FA89 for ; Thu, 15 Sep 2022 14:39:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230350AbiIOOjS (ORCPT ); Thu, 15 Sep 2022 10:39:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49300 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230424AbiIOOio (ORCPT ); Thu, 15 Sep 2022 10:38:44 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB6A79F759 for ; Thu, 15 Sep 2022 07:37:13 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id a2so6697286lfb.6 for ; Thu, 15 Sep 2022 07:37:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=2k2YAuSCASBkcDuEfybUDrtg0/KrW+GCeb339u83RJk=; b=MRzYoLhI08v9nIRLfxNYD1kDHOKoIWMrcu7+YthGjpj4nn7fbiB5YwUU6ktESg6jVw 0k+kZP7UospXF845bICdVO2kIyWXElS+lzXzDGgCFd6vPbFw/wsECzi3XFQZQ54rE+4G esyNuz8Tav+xuCzWdPj0VDk+VKZ/qDAUYIpNRZVfyCSaZuOvzwsfGrezIPdkUoZ4oG9M ffHJx1qBlISDF5t9PMhVQBZFVUDoSMVxGAyNhoakpdG1uhPlEiMt7kMf1WXJPU8FGUi0 tFnck/ccYVPNhkeZp6l3hPF5KFFOUP/OkFcG1egq1w/04K/AQl1tAyLyj9ZGiXoPJKFS qz9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=2k2YAuSCASBkcDuEfybUDrtg0/KrW+GCeb339u83RJk=; b=vUCBRX5QX99nqXmUrfxPQgHuRVQzaDc91wt08MdmSkJtyseDlqMwukAyyAZRl/mEY7 b1mERg3BD+hpz1prCyeVbUF3h4/Z7OVO/PERavFCU3RVvcatNTtyNKALZtbrwzNsXx0O k7yKeW9t7aXhXj7yz47IeU/7lSpaCWHzb9pln17+3VUMBmQM5EbINmQHOmywo90oubF4 l7HCpkVd+YHtx7PIJoaLgmzK9uJ9tktEwuaRu4J2rRwCwuPe73BhHYln2LLCq4/qBKYE IE93oChMhkw/DJYiPBrdngKPaIwywCDMYm6DPvbPSmpLwbiSzlc88WmhdBJqkMZ2tyem sPmA== X-Gm-Message-State: ACrzQf1fJnU02uVj72DnCX4mnOqEMsP52Y9tMLJRK4CwRapLnbpVUfVZ q39OxdnqYfsgTZB9mlNFz8hDBaQubrj2Kh22 X-Google-Smtp-Source: AMsMyM6ZeZg8QJQXSdNrf9/VCm6mGdTwWWRqU5hnyV1osnjIR+05b4b9DE3sgZ9LaEchKqPoWUcjgw== X-Received: by 2002:a05:6512:158b:b0:499:f9b3:df87 with SMTP id bp11-20020a056512158b00b00499f9b3df87mr70275lfb.451.1663252629517; Thu, 15 Sep 2022 07:37:09 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id x15-20020ac259cf000000b004984ab5956dsm2995794lfn.202.2022.09.15.07.37.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 07:37:09 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux@armlinux.org.uk, ansuelsmth@gmail.com, Mattias Forsblad Subject: [PATCH net-next v12 5/6] net: dsa: mv88e6xxx: rmon: Use RMU for reading RMON data Date: Thu, 15 Sep 2022 16:36:57 +0200 Message-Id: <20220915143658.3377139-6-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220915143658.3377139-1-mattias.forsblad@gmail.com> References: <20220915143658.3377139-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Use the Remote Management Unit for efficiently accessing the RMON data. Signed-off-by: Mattias Forsblad --- drivers/net/dsa/mv88e6xxx/chip.c | 180 ++++++++++++++++++++----------- drivers/net/dsa/mv88e6xxx/chip.h | 3 + drivers/net/dsa/mv88e6xxx/smi.c | 3 + 3 files changed, 121 insertions(+), 65 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 294bf9bbaf3f..cba4f6a49647 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -984,65 +984,65 @@ static int mv88e6xxx_stats_snapshot(struct mv88e6xxx_chip *chip, int port) } static struct mv88e6xxx_hw_stat mv88e6xxx_hw_stats[] = { - { "in_good_octets", 8, 0x00, STATS_TYPE_BANK0, }, - { "in_bad_octets", 4, 0x02, STATS_TYPE_BANK0, }, - { "in_unicast", 4, 0x04, STATS_TYPE_BANK0, }, - { "in_broadcasts", 4, 0x06, STATS_TYPE_BANK0, }, - { "in_multicasts", 4, 0x07, STATS_TYPE_BANK0, }, - { "in_pause", 4, 0x16, STATS_TYPE_BANK0, }, - { "in_undersize", 4, 0x18, STATS_TYPE_BANK0, }, - { "in_fragments", 4, 0x19, STATS_TYPE_BANK0, }, - { "in_oversize", 4, 0x1a, STATS_TYPE_BANK0, }, - { "in_jabber", 4, 0x1b, STATS_TYPE_BANK0, }, - { "in_rx_error", 4, 0x1c, STATS_TYPE_BANK0, }, - { "in_fcs_error", 4, 0x1d, STATS_TYPE_BANK0, }, - { "out_octets", 8, 0x0e, STATS_TYPE_BANK0, }, - { "out_unicast", 4, 0x10, STATS_TYPE_BANK0, }, - { "out_broadcasts", 4, 0x13, STATS_TYPE_BANK0, }, - { "out_multicasts", 4, 0x12, STATS_TYPE_BANK0, }, - { "out_pause", 4, 0x15, STATS_TYPE_BANK0, }, - { "excessive", 4, 0x11, STATS_TYPE_BANK0, }, - { "collisions", 4, 0x1e, STATS_TYPE_BANK0, }, - { "deferred", 4, 0x05, STATS_TYPE_BANK0, }, - { "single", 4, 0x14, STATS_TYPE_BANK0, }, - { "multiple", 4, 0x17, STATS_TYPE_BANK0, }, - { "out_fcs_error", 4, 0x03, STATS_TYPE_BANK0, }, - { "late", 4, 0x1f, STATS_TYPE_BANK0, }, - { "hist_64bytes", 4, 0x08, STATS_TYPE_BANK0, }, - { "hist_65_127bytes", 4, 0x09, STATS_TYPE_BANK0, }, - { "hist_128_255bytes", 4, 0x0a, STATS_TYPE_BANK0, }, - { "hist_256_511bytes", 4, 0x0b, STATS_TYPE_BANK0, }, - { "hist_512_1023bytes", 4, 0x0c, STATS_TYPE_BANK0, }, - { "hist_1024_max_bytes", 4, 0x0d, STATS_TYPE_BANK0, }, - { "sw_in_discards", 4, 0x10, STATS_TYPE_PORT, }, - { "sw_in_filtered", 2, 0x12, STATS_TYPE_PORT, }, - { "sw_out_filtered", 2, 0x13, STATS_TYPE_PORT, }, - { "in_discards", 4, 0x00, STATS_TYPE_BANK1, }, - { "in_filtered", 4, 0x01, STATS_TYPE_BANK1, }, - { "in_accepted", 4, 0x02, STATS_TYPE_BANK1, }, - { "in_bad_accepted", 4, 0x03, STATS_TYPE_BANK1, }, - { "in_good_avb_class_a", 4, 0x04, STATS_TYPE_BANK1, }, - { "in_good_avb_class_b", 4, 0x05, STATS_TYPE_BANK1, }, - { "in_bad_avb_class_a", 4, 0x06, STATS_TYPE_BANK1, }, - { "in_bad_avb_class_b", 4, 0x07, STATS_TYPE_BANK1, }, - { "tcam_counter_0", 4, 0x08, STATS_TYPE_BANK1, }, - { "tcam_counter_1", 4, 0x09, STATS_TYPE_BANK1, }, - { "tcam_counter_2", 4, 0x0a, STATS_TYPE_BANK1, }, - { "tcam_counter_3", 4, 0x0b, STATS_TYPE_BANK1, }, - { "in_da_unknown", 4, 0x0e, STATS_TYPE_BANK1, }, - { "in_management", 4, 0x0f, STATS_TYPE_BANK1, }, - { "out_queue_0", 4, 0x10, STATS_TYPE_BANK1, }, - { "out_queue_1", 4, 0x11, STATS_TYPE_BANK1, }, - { "out_queue_2", 4, 0x12, STATS_TYPE_BANK1, }, - { "out_queue_3", 4, 0x13, STATS_TYPE_BANK1, }, - { "out_queue_4", 4, 0x14, STATS_TYPE_BANK1, }, - { "out_queue_5", 4, 0x15, STATS_TYPE_BANK1, }, - { "out_queue_6", 4, 0x16, STATS_TYPE_BANK1, }, - { "out_queue_7", 4, 0x17, STATS_TYPE_BANK1, }, - { "out_cut_through", 4, 0x18, STATS_TYPE_BANK1, }, - { "out_octets_a", 4, 0x1a, STATS_TYPE_BANK1, }, - { "out_octets_b", 4, 0x1b, STATS_TYPE_BANK1, }, - { "out_management", 4, 0x1f, STATS_TYPE_BANK1, }, + { "in_good_octets", 8, 0x00, 0x00, STATS_TYPE_BANK0, }, + { "in_bad_octets", 4, 0x02, 0x00, STATS_TYPE_BANK0, }, + { "in_unicast", 4, 0x04, 0x00, STATS_TYPE_BANK0, }, + { "in_broadcasts", 4, 0x06, 0x00, STATS_TYPE_BANK0, }, + { "in_multicasts", 4, 0x07, 0x00, STATS_TYPE_BANK0, }, + { "in_pause", 4, 0x16, 0x00, STATS_TYPE_BANK0, }, + { "in_undersize", 4, 0x18, 0x00, STATS_TYPE_BANK0, }, + { "in_fragments", 4, 0x19, 0x00, STATS_TYPE_BANK0, }, + { "in_oversize", 4, 0x1a, 0x00, STATS_TYPE_BANK0, }, + { "in_jabber", 4, 0x1b, 0x00, STATS_TYPE_BANK0, }, + { "in_rx_error", 4, 0x1c, 0x00, STATS_TYPE_BANK0, }, + { "in_fcs_error", 4, 0x1d, 0x00, STATS_TYPE_BANK0, }, + { "out_octets", 8, 0x0e, 0x00, STATS_TYPE_BANK0, }, + { "out_unicast", 4, 0x10, 0x00, STATS_TYPE_BANK0, }, + { "out_broadcasts", 4, 0x13, 0x00, STATS_TYPE_BANK0, }, + { "out_multicasts", 4, 0x12, 0x00, STATS_TYPE_BANK0, }, + { "out_pause", 4, 0x15, 0x00, STATS_TYPE_BANK0, }, + { "excessive", 4, 0x11, 0x00, STATS_TYPE_BANK0, }, + { "collisions", 4, 0x1e, 0x00, STATS_TYPE_BANK0, }, + { "deferred", 4, 0x05, 0x00, STATS_TYPE_BANK0, }, + { "single", 4, 0x14, 0x00, STATS_TYPE_BANK0, }, + { "multiple", 4, 0x17, 0x00, STATS_TYPE_BANK0, }, + { "out_fcs_error", 4, 0x03, 0x00, STATS_TYPE_BANK0, }, + { "late", 4, 0x1f, 0x00, STATS_TYPE_BANK0, }, + { "hist_64bytes", 4, 0x08, 0x00, STATS_TYPE_BANK0, }, + { "hist_65_127bytes", 4, 0x09, 0x00, STATS_TYPE_BANK0, }, + { "hist_128_255bytes", 4, 0x0a, 0x00, STATS_TYPE_BANK0, }, + { "hist_256_511bytes", 4, 0x0b, 0x00, STATS_TYPE_BANK0, }, + { "hist_512_1023bytes", 4, 0x0c, 0x00, STATS_TYPE_BANK0, }, + { "hist_1024_max_bytes", 4, 0x0d, 0x00, STATS_TYPE_BANK0, }, + { "sw_in_discards", 4, 0x10, 0x81, STATS_TYPE_PORT, }, + { "sw_in_filtered", 2, 0x12, 0x85, STATS_TYPE_PORT, }, + { "sw_out_filtered", 2, 0x13, 0x89, STATS_TYPE_PORT, }, + { "in_discards", 4, 0x00, 0x00, STATS_TYPE_BANK1, }, + { "in_filtered", 4, 0x01, 0x00, STATS_TYPE_BANK1, }, + { "in_accepted", 4, 0x02, 0x00, STATS_TYPE_BANK1, }, + { "in_bad_accepted", 4, 0x03, 0x00, STATS_TYPE_BANK1, }, + { "in_good_avb_class_a", 4, 0x04, 0x00, STATS_TYPE_BANK1, }, + { "in_good_avb_class_b", 4, 0x05, 0x00, STATS_TYPE_BANK1, }, + { "in_bad_avb_class_a", 4, 0x06, 0x00, STATS_TYPE_BANK1, }, + { "in_bad_avb_class_b", 4, 0x07, 0x00, STATS_TYPE_BANK1, }, + { "tcam_counter_0", 4, 0x08, 0x00, STATS_TYPE_BANK1, }, + { "tcam_counter_1", 4, 0x09, 0x00, STATS_TYPE_BANK1, }, + { "tcam_counter_2", 4, 0x0a, 0x00, STATS_TYPE_BANK1, }, + { "tcam_counter_3", 4, 0x0b, 0x00, STATS_TYPE_BANK1, }, + { "in_da_unknown", 4, 0x0e, 0x00, STATS_TYPE_BANK1, }, + { "in_management", 4, 0x0f, 0x00, STATS_TYPE_BANK1, }, + { "out_queue_0", 4, 0x10, 0x00, STATS_TYPE_BANK1, }, + { "out_queue_1", 4, 0x11, 0x00, STATS_TYPE_BANK1, }, + { "out_queue_2", 4, 0x12, 0x00, STATS_TYPE_BANK1, }, + { "out_queue_3", 4, 0x13, 0x00, STATS_TYPE_BANK1, }, + { "out_queue_4", 4, 0x14, 0x00, STATS_TYPE_BANK1, }, + { "out_queue_5", 4, 0x15, 0x00, STATS_TYPE_BANK1, }, + { "out_queue_6", 4, 0x16, 0x00, STATS_TYPE_BANK1, }, + { "out_queue_7", 4, 0x17, 0x00, STATS_TYPE_BANK1, }, + { "out_cut_through", 4, 0x18, 0x00, STATS_TYPE_BANK1, }, + { "out_octets_a", 4, 0x1a, 0x00, STATS_TYPE_BANK1, }, + { "out_octets_b", 4, 0x1b, 0x00, STATS_TYPE_BANK1, }, + { "out_management", 4, 0x1f, 0x00, STATS_TYPE_BANK1, }, }; static uint64_t _mv88e6xxx_get_ethtool_stat(struct mv88e6xxx_chip *chip, @@ -1229,9 +1229,41 @@ static int mv88e6xxx_get_sset_count(struct dsa_switch *ds, int port, int sset) return count; } -static int mv88e6xxx_stats_get_stats(struct mv88e6xxx_chip *chip, int port, - uint64_t *data, int types, - u16 bank1_select, u16 histogram) +static int mv88e6xxx_state_get_stats_rmu(struct mv88e6xxx_chip *chip, int port, + uint64_t *data, int types, + u16 bank1_select, u16 histogram) +{ + const u64 *stats = chip->ports[port].rmu_raw_stats; + struct mv88e6xxx_hw_stat *stat; + int offset = 0; + u64 high; + int i, j; + + for (i = 0, j = 0; i < ARRAY_SIZE(mv88e6xxx_hw_stats); i++) { + stat = &mv88e6xxx_hw_stats[i]; + if (stat->type & types) { + if (stat->type & STATS_TYPE_PORT) { + data[j] = stats[stat->rmu_reg]; + } else { + if (stat->type & STATS_TYPE_BANK1) + offset = 32; + + data[j] = stats[stat->reg + offset]; + if (stat->size == 8) { + high = stats[stat->reg + offset + 1]; + data[j] += (high << 32); + } + } + + j++; + } + } + return j; +} + +static int mv88e6xxx_stats_get_stats_mdio(struct mv88e6xxx_chip *chip, int port, + uint64_t *data, int types, + u16 bank1_select, u16 histogram) { struct mv88e6xxx_hw_stat *stat; int i, j; @@ -1251,6 +1283,18 @@ static int mv88e6xxx_stats_get_stats(struct mv88e6xxx_chip *chip, int port, return j; } +static int mv88e6xxx_stats_get_stats(struct mv88e6xxx_chip *chip, int port, + uint64_t *data, int types, + u16 bank1_select, u16 histogram) +{ + if (mv88e6xxx_rmu_available(chip)) + return mv88e6xxx_state_get_stats_rmu(chip, port, data, types, + bank1_select, histogram); + else + return mv88e6xxx_stats_get_stats_mdio(chip, port, data, types, + bank1_select, histogram); +} + static int mv88e6095_stats_get_stats(struct mv88e6xxx_chip *chip, int port, uint64_t *data) { @@ -1312,10 +1356,9 @@ static void mv88e6xxx_get_stats(struct mv88e6xxx_chip *chip, int port, mv88e6xxx_reg_unlock(chip); } -static void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, int port, - uint64_t *data) +void mv88e6xxx_get_ethtool_stats_mdio(struct mv88e6xxx_chip *chip, int port, + uint64_t *data) { - struct mv88e6xxx_chip *chip = ds->priv; int ret; mv88e6xxx_reg_lock(chip); @@ -1327,7 +1370,14 @@ static void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, int port, return; mv88e6xxx_get_stats(chip, port, data); +} + +static void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, int port, + uint64_t *data) +{ + struct mv88e6xxx_chip *chip = ds->priv; + chip->smi_ops->get_rmon(chip, port, data); } static int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port) diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index ea1789feeacf..ea86532f0bd9 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -742,6 +742,7 @@ struct mv88e6xxx_hw_stat { char string[ETH_GSTRING_LEN]; size_t size; int reg; + int rmu_reg; int type; }; @@ -809,6 +810,8 @@ int mv88e6xxx_wait_mask(struct mv88e6xxx_chip *chip, int addr, int reg, int mv88e6xxx_wait_bit(struct mv88e6xxx_chip *chip, int addr, int reg, int bit, int val); struct mii_bus *mv88e6xxx_default_mdio_bus(struct mv88e6xxx_chip *chip); +void mv88e6xxx_get_ethtool_stats_mdio(struct mv88e6xxx_chip *chip, int port, + uint64_t *data); static inline void mv88e6xxx_reg_lock(struct mv88e6xxx_chip *chip) { diff --git a/drivers/net/dsa/mv88e6xxx/smi.c b/drivers/net/dsa/mv88e6xxx/smi.c index a990271b7482..ae805c449b85 100644 --- a/drivers/net/dsa/mv88e6xxx/smi.c +++ b/drivers/net/dsa/mv88e6xxx/smi.c @@ -83,6 +83,7 @@ static int mv88e6xxx_smi_direct_wait(struct mv88e6xxx_chip *chip, static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_direct_ops = { .read = mv88e6xxx_smi_direct_read, .write = mv88e6xxx_smi_direct_write, + .get_rmon = mv88e6xxx_get_ethtool_stats_mdio, }; static int mv88e6xxx_smi_dual_direct_read(struct mv88e6xxx_chip *chip, @@ -100,6 +101,7 @@ static int mv88e6xxx_smi_dual_direct_write(struct mv88e6xxx_chip *chip, static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_dual_direct_ops = { .read = mv88e6xxx_smi_dual_direct_read, .write = mv88e6xxx_smi_dual_direct_write, + .get_rmon = mv88e6xxx_get_ethtool_stats_mdio, }; /* Offset 0x00: SMI Command Register @@ -166,6 +168,7 @@ static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_indirect_ops = { .read = mv88e6xxx_smi_indirect_read, .write = mv88e6xxx_smi_indirect_write, .init = mv88e6xxx_smi_indirect_init, + .get_rmon = mv88e6xxx_get_ethtool_stats_mdio, }; int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip, From patchwork Thu Sep 15 14:36:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mattias Forsblad X-Patchwork-Id: 12977483 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0C68C6FA8A for ; Thu, 15 Sep 2022 14:39:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230195AbiIOOjG (ORCPT ); Thu, 15 Sep 2022 10:39:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49336 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230414AbiIOOij (ORCPT ); Thu, 15 Sep 2022 10:38:39 -0400 Received: from mail-lf1-x12a.google.com (mail-lf1-x12a.google.com [IPv6:2a00:1450:4864:20::12a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 661719F1AD for ; Thu, 15 Sep 2022 07:37:14 -0700 (PDT) Received: by mail-lf1-x12a.google.com with SMTP id f9so29994980lfr.3 for ; Thu, 15 Sep 2022 07:37:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=O651eX+vdQDwumo6UV5G0Dw+0xJjVRxHZkQh9754BII=; b=m03mUK6KuCpf9Uq8kXMZXVtQGvESnXXrk/1nGR0UDzGplaomXZApaE1AhiZb8shv2C ospqenT9wFVxw57LkvCU307FWCLBuqLd21pDFiZpQps+oEOBGYbXgM7fsRm7XPX0JK1O J5VAkaCfHb0ro+Cwq3jfpqPCgqG3DFlvptZL2kOfBIeTXUTLs+55WRYSa18AKo5ToiPn 47p+EwMtDcYPVFAMwHiIxPuNqcJjJiz33iRXwC44GxrHp/dRxrPowg2fydJTOp5H6OGB J4BrWBPjem+BBmEtf61DK0ofLb72Scrf9Mmos4ohr4zAQ4N3eMIgfSGr0DEQXuxPi+j+ Pf1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=O651eX+vdQDwumo6UV5G0Dw+0xJjVRxHZkQh9754BII=; b=oMFDVUBwDdG1OPCTnQJnuaiDbvF/IfgtPzgWKNORGIUlw53S5WQUfdj2LZUes0c6Kq QBRk9GttR5K/uHOvnelQZxHaa3fl00FZrmBjDBy7CuDWmxYdoS9DBk8ceWH3gMdpVjMx lLp6rKwcsY0N1Ba8SmsJOZaXobcVK0jq2AQ6TQy3/f8QA9uaM97jtc1behaadJf6Yr3L Sq/3k3jCAOw7Vekg2C/t6+PHPXtCEMhfTsa/K5hTDj4+gvVxfGUJ4QVjmSfb+61CfkvL eq8QneUKdslEe0S4AZhSDWSHMTuPZOW76AfFLb7pVf5mzaz0JfvyrF0QUzBJppZnv04d Fc9Q== X-Gm-Message-State: ACrzQf1VJTBtxLMMc+pWAwTsmXR94n+q8EPjplv7Rh+FmnMwrfWiRjeQ Vl5xVxOqkHqt6SwYk216/fYEX7qwf/BgBpqp X-Google-Smtp-Source: AMsMyM5ajA/adFhpXMqB/vu8SYRJnnK+O4eM1BiltJtbbLVjGDlyARJzGJ3JMrkpYKKC3ubpDNEKvA== X-Received: by 2002:a05:6512:1387:b0:499:fa22:4e0b with SMTP id p7-20020a056512138700b00499fa224e0bmr70982lfa.299.1663252630594; Thu, 15 Sep 2022 07:37:10 -0700 (PDT) Received: from wse-c0089.raspi.local (h-98-128-229-160.NA.cust.bahnhof.se. [98.128.229.160]) by smtp.gmail.com with ESMTPSA id x15-20020ac259cf000000b004984ab5956dsm2995794lfn.202.2022.09.15.07.37.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 07:37:09 -0700 (PDT) From: Mattias Forsblad To: netdev@vger.kernel.org Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux@armlinux.org.uk, ansuelsmth@gmail.com, Mattias Forsblad Subject: [PATCH net-next v12 6/6] net: dsa: qca8k: Use new convenience functions Date: Thu, 15 Sep 2022 16:36:58 +0200 Message-Id: <20220915143658.3377139-7-mattias.forsblad@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220915143658.3377139-1-mattias.forsblad@gmail.com> References: <20220915143658.3377139-1-mattias.forsblad@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Use the new common convenience functions for sending and waiting for frames. Signed-off-by: Mattias Forsblad Reviewed-by: Florian Fainelli --- drivers/net/dsa/qca/qca8k-8xxx.c | 61 +++++++++----------------------- 1 file changed, 17 insertions(+), 44 deletions(-) diff --git a/drivers/net/dsa/qca/qca8k-8xxx.c b/drivers/net/dsa/qca/qca8k-8xxx.c index c181346388a4..4e9bc103c0a5 100644 --- a/drivers/net/dsa/qca/qca8k-8xxx.c +++ b/drivers/net/dsa/qca/qca8k-8xxx.c @@ -160,7 +160,7 @@ static void qca8k_rw_reg_ack_handler(struct dsa_switch *ds, struct sk_buff *skb) QCA_HDR_MGMT_DATA2_LEN); } - complete(&mgmt_eth_data->rw_done); + dsa_switch_inband_complete(ds, &mgmt_eth_data->rw_done); } static struct sk_buff *qca8k_alloc_mdio_header(enum mdio_cmd cmd, u32 reg, u32 *val, @@ -228,6 +228,7 @@ static void qca8k_mdio_header_fill_seq_num(struct sk_buff *skb, u32 seq_num) static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) { struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; + struct dsa_switch *ds = priv->ds; struct sk_buff *skb; bool ack; int ret; @@ -248,17 +249,12 @@ static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) skb->dev = priv->mgmt_master; - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the mdio pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(skb); - - ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, - msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); + ret = dsa_switch_inband_tx(ds, skb, &mgmt_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); *val = mgmt_eth_data->data[0]; if (len > QCA_HDR_MGMT_DATA1_LEN) @@ -280,6 +276,7 @@ static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) { struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; + struct dsa_switch *ds = priv->ds; struct sk_buff *skb; bool ack; int ret; @@ -300,17 +297,12 @@ static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) skb->dev = priv->mgmt_master; - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the mdio pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(skb); - - ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, - msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); + ret = dsa_switch_inband_tx(ds, skb, &mgmt_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); ack = mgmt_eth_data->ack; @@ -441,24 +433,21 @@ static struct regmap_config qca8k_regmap_config = { }; static int -qca8k_phy_eth_busy_wait(struct qca8k_mgmt_eth_data *mgmt_eth_data, +qca8k_phy_eth_busy_wait(struct qca8k_priv *priv, struct sk_buff *read_skb, u32 *val) { + struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; struct sk_buff *skb = skb_copy(read_skb, GFP_KERNEL); + struct dsa_switch *ds = priv->ds; bool ack; int ret; - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the copy pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(skb); - - ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, - QCA8K_ETHERNET_TIMEOUT); + ret = dsa_switch_inband_tx(ds, skb, &mgmt_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); ack = mgmt_eth_data->ack; @@ -480,6 +469,7 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, struct sk_buff *write_skb, *clear_skb, *read_skb; struct qca8k_mgmt_eth_data *mgmt_eth_data; u32 write_val, clear_val = 0, val; + struct dsa_switch *ds = priv->ds; struct net_device *mgmt_master; int ret, ret1; bool ack; @@ -540,17 +530,12 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, clear_skb->dev = mgmt_master; write_skb->dev = mgmt_master; - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the write pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(write_skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(write_skb); - - ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, - QCA8K_ETHERNET_TIMEOUT); + ret = dsa_switch_inband_tx(ds, write_skb, &mgmt_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); ack = mgmt_eth_data->ack; @@ -569,7 +554,7 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, ret = read_poll_timeout(qca8k_phy_eth_busy_wait, ret1, !(val & QCA8K_MDIO_MASTER_BUSY), 0, QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false, - mgmt_eth_data, read_skb, &val); + priv, read_skb, &val); if (ret < 0 && ret1 < 0) { ret = ret1; @@ -577,17 +562,13 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, } if (read) { - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the read pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(read_skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(read_skb); - - ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, - QCA8K_ETHERNET_TIMEOUT); + ret = dsa_switch_inband_tx(ds, read_skb, &mgmt_eth_data->rw_done, + QCA8K_ETHERNET_TIMEOUT); ack = mgmt_eth_data->ack; @@ -606,17 +587,12 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, kfree_skb(read_skb); } exit: - reinit_completion(&mgmt_eth_data->rw_done); - /* Increment seq_num and set it in the clear pkt */ mgmt_eth_data->seq++; qca8k_mdio_header_fill_seq_num(clear_skb, mgmt_eth_data->seq); mgmt_eth_data->ack = false; - dev_queue_xmit(clear_skb); - - wait_for_completion_timeout(&mgmt_eth_data->rw_done, - QCA8K_ETHERNET_TIMEOUT); + ret = dsa_switch_inband_tx(ds, clear_skb, &mgmt_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); mutex_unlock(&mgmt_eth_data->mutex); @@ -1528,7 +1504,7 @@ static void qca8k_mib_autocast_handler(struct dsa_switch *ds, struct sk_buff *sk exit: /* Complete on receiving all the mib packet */ if (refcount_dec_and_test(&mib_eth_data->port_parsed)) - complete(&mib_eth_data->rw_done); + dsa_switch_inband_complete(ds, &mib_eth_data->rw_done); } static int @@ -1543,8 +1519,6 @@ qca8k_get_ethtool_stats_eth(struct dsa_switch *ds, int port, u64 *data) mutex_lock(&mib_eth_data->mutex); - reinit_completion(&mib_eth_data->rw_done); - mib_eth_data->req_port = dp->index; mib_eth_data->data = data; refcount_set(&mib_eth_data->port_parsed, QCA8K_NUM_PORTS); @@ -1562,8 +1536,7 @@ qca8k_get_ethtool_stats_eth(struct dsa_switch *ds, int port, u64 *data) if (ret) goto exit; - ret = wait_for_completion_timeout(&mib_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); - + ret = dsa_switch_inband_tx(ds, NULL, &mib_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); exit: mutex_unlock(&mib_eth_data->mutex);