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Niedermayr" To: , CC: , , , Subject: [PATCH v5 1/3] memory: omap-gpmc: allow shared wait pins Date: Fri, 16 Sep 2022 14:07:47 +0200 Message-ID: <20220916120749.2517727-2-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916120749.2517727-1-benedikt.niedermayr@siemens.com> References: <20220916120749.2517727-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [144.145.220.65] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC89XA.ad011.siemens.net (139.25.226.103) X-TM-AS-Product-Ver: SMEX-14.0.0.3080-8.6.1018-26680.007 X-TM-AS-Result: No-10--12.932000-8.000000 X-TMASE-MatchedRID: YeslW8iZUfPMYa5soaxdevS8hmHHS12Le/GSmEODdnIdZEkR8Y/meX+s iCf/QKJTdANxGD2/8Th88Abx2XH5NlppNBoXxD2IjUkjodfNrfZjFNgY8SnxHA3BRWEgXqlWWNb BpQ++I1mRiV0eo0RbuK1uNfgQaqvvSqdra4WWujyPQi9XuOWoOEPu4/hW5W83U9ht8cPjV45nAs t8At+c3ceQfu6iwSfsJVibDTTQXq1wDPi4qgkFxCfEMauXqN9RTVAfo9STYMOK5Jq39CIIv+uLF ZZYlisfHxPMjOKY7A8LbigRnpKlKTpcQTtiHDgWM36TonZTaOPY8ftIlo0kbUqSpMkU30hB0m0/ /9UUQaRta2wryESZag== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--12.932000-8.000000 X-TMASE-Version: SMEX-14.0.0.3080-8.6.1018-26680.007 X-TM-SNTS-SMTP: AD166C68398BD1A34AA7112FCE0560E7EF40665841A8F99ACB28101A975A4D462000:8 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: HE1EUR01FT063:EE_|PAXPR10MB5638:EE_ X-MS-Office365-Filtering-Correlation-Id: 22677c36-62cf-4ce0-9dd4-08da97dc1ac7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: uK62T+ymgefUu7GhCVsf/8SmjE0Nn23TtREA0AWv7ExuURTJt4e45psjDiAQ1O/Oosth0m+gDoNqzeMlzLoIDdqQZqY4NVMIVGEPaJUXlhFukoBI/CR7gslzfREGdDpoHTsP4KsBRbWnOaQlP+7mx77RLXIY0jl7yaLiufv6cn6EthHTbLBiwQpquwviElt0KNtJdtOdNN7el37VqFKJwdERAtu4nuzED5YUd5yeuc7iFCPi8+14oxDmh0eT0ActSegdCuEGau8TqTblf3ns8HAYkwnKGO6cuJ5EqxaGcXzHpgsIbbjJlvkPpg/oDkFByW7OCXm19h0FYDftiqTfZFAIQaFB2FsG4JfL2eKFtUZVNEYuZfMW7McZBll1xBz6L3oJb3mOllkDYQMcElqPUrX10+re+oVaUvANQFRytxqb2hXtjgw3LSh5qbXcPQ8gUzizmwfx5rU3i1Ulxf5cSeUFSDxYJ+vRdNg+awP4pEHOO39VgTv6hkzCY2joF3NtJd6oN0lckmAiK1sB/O1pYZZ5y73dGRuRr0G7OBjX4/Yf3/F3CkGXbLDsrH89FEoo3C2PbhhzVl5XuP64w3BpEqf17pW0/+F7bfycc+jqsO/hxBAeKyCj+Wqrc5WGecrhN5dRm2wehIb/Y0ikuszv2Fcc0KhtUJU4SwzudIkftYQkWK273vrQHod1CldYEE89KBoP26YrV68+FRMDa3o9saycXYWlBmx9x6KWpKcnGB3a9Y8h1NOkc598V9+bivw/VD+fsEtT8fXdGbrde7qHxw== X-Forefront-Antispam-Report: CIP:194.138.21.74;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:hybrid.siemens.com;CAT:NONE;SFS:(13230022)(4636009)(396003)(39860400002)(346002)(136003)(376002)(451199015)(40470700004)(36840700001)(46966006)(478600001)(110136005)(36860700001)(82740400003)(40480700001)(316002)(4326008)(70586007)(82310400005)(7596003)(356005)(26005)(7636003)(54906003)(8936002)(5660300002)(70206006)(40460700003)(2616005)(82960400001)(6666004)(8676002)(41300700001)(16526019)(2906002)(336012)(186003)(47076005)(86362001)(956004)(83380400001)(36756003)(1076003);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Sep 2022 12:08:02.3298 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 22677c36-62cf-4ce0-9dd4-08da97dc1ac7 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.74];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: HE1EUR01FT063.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR10MB5638 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr Newer kernels refuse to probe when using the same wait pin for different chipselect regions. But this may be a usecase when connecting for example FPGA or ASIC modules to the gpmc, which only got one wait pin installed. The wait-pin allocation is now tracked by the gpmc driver in order to be sure that the wait pin has been indeed requested by gpmc. Therefore the "wait_pin_alloc_mask" has been introduced. Signed-off-by: Benedikt Niedermayr --- drivers/memory/omap-gpmc.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index d9bf1c2ac319..ea495e93766b 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -232,6 +232,7 @@ struct gpmc_device { int irq; struct irq_chip irq_chip; struct gpio_chip gpio_chip; + unsigned long wait_pin_alloc_mask; int nirqs; struct resource *data; }; @@ -2221,9 +2222,16 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, GPIO_ACTIVE_HIGH, GPIOD_IN); if (IS_ERR(waitpin_desc)) { - dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); ret = PTR_ERR(waitpin_desc); - goto err; + if (ret == -EBUSY && + test_bit(wait_pin, &gpmc->wait_pin_alloc_mask)) { + dev_info(&pdev->dev, "shared wait-pin: %d\n", wait_pin); + } else { + dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); + goto err; + } + } else { + set_bit(wait_pin, &gpmc->wait_pin_alloc_mask); } } From patchwork Fri Sep 16 12:07:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benedikt Niedermayr X-Patchwork-Id: 12978466 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED07DECAAD8 for ; Fri, 16 Sep 2022 12:08:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231273AbiIPMIS (ORCPT ); Fri, 16 Sep 2022 08:08:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59158 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231346AbiIPMIM (ORCPT ); Fri, 16 Sep 2022 08:08:12 -0400 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2043.outbound.protection.outlook.com [40.107.22.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3837DAFACE; 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Niedermayr" To: , CC: , , , Subject: [PATCH v5 2/3] memory: omap-gpmc: add support for wait pin polarity Date: Fri, 16 Sep 2022 14:07:48 +0200 Message-ID: <20220916120749.2517727-3-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916120749.2517727-1-benedikt.niedermayr@siemens.com> References: <20220916120749.2517727-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [144.145.220.65] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC89XA.ad011.siemens.net (139.25.226.103) X-TM-AS-Product-Ver: SMEX-14.0.0.3080-8.6.1018-26680.007 X-TM-AS-Result: No-10--11.619300-8.000000 X-TMASE-MatchedRID: POsRPqSDEnZ2JssOPetOeImIDnzSS8mZE34mKqQRiel+J3gtIe0gA2tq QgJyb0BRWgm4fq9o0LPhkjv78Hej4ekIezYN3SFOKPXQFKk5uQGTCob0Yf2X3j8Ckw9b/GFeTJD l9FKHbrlHpEd1UrzmFY4nd5BIQmYqQjWDB8SvIeIkrBjqqIzVOO/Pzxjxyhd5EVuC0eNRYvJ7xI KEgZq/AeJiUqjHevI0F51v32DYCPs5GnFStuFoW0vAMVBNN3ewEnwQg0CZxZurm7DrUlmNkIAy6 p60ZV62fJ5/bZ6npdjKayT/BQTiGpefsKoW209bhhQN2X8ImVVHZZcelBAWAp1ZWdlQ94S0ahpn rRh/388= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--11.619300-8.000000 X-TMASE-Version: SMEX-14.0.0.3080-8.6.1018-26680.007 X-TM-SNTS-SMTP: 18D638CE024905B1A5EEE6137C9942F082B02C652B858DCBB557C510CEEAA18B2000:8 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: HE1EUR01FT063:EE_|AS1PR10MB5392:EE_ X-MS-Office365-Filtering-Correlation-Id: 48131a6d-6b18-4b91-aa12-08da97dc1c80 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bH7yoWVGEssySiz0tdAr0lRzSBvdD4A/y88csUbUb0K7RSFYcj7Lp3wPCrage1BFYFBeVtVR1wIlVxXndERD/W8kKnfaFZTLZSjHLQyhIww/Zl0bL4ryTfDl9raqMzKb1LTRlBbiuPaF1X6mSUemyxwgQzclEB4z6N/5JMG2ga9G4FfNTOx751+Rvc/tFZ1vOHhjd7e1yyWpureWLViPCVGdpMUbiXI4Osun7qnKiVemsYxkSCabshELNxgpC7g5IlPxN/MuSTmI1x2YYPhJ6QCpxZVspv9QOrcBOZZlAdHO95toKJsUx8keMctqPl5lapkJrWTqS/9vYEFmW8hOCguAwqX7D0e3lU63KRbAcsYjCU0FBeoXzedRln0AQ+3I06sx9MC5uzSfXDT1Dc2Ogzg1sdcbgOKaIfFltrWt2jd2TE5JRdFWUeXMU4HAucdXfRNu0/5pdzD3B4F+/JWzs4hQbvymazL022h1DYJtgkoJZELvGwJYZD/sNKdpXKYnbP4hxGqljyGCL5ljKUVNyR7+iPxFNTfFvxkDpGv3g6D/xvUGM9X+0pNVNrE8FxkqJaxBPVuyl8g5ld/kXQU2cCYUkMDdL7w4oscXuoTEFoaa2npECw2gd0qXr2b6XBTIdjTCb7E3djZL+l6KlLS2exovlIyQvFgXvBmRmQqrbpFeGl3/iIUlAQ+V93pn3MOL/HPkiUi0y96O/irihDHutXzixGnh4xTpux+L7rCCHAFTUYPVhQ4GRH4zR3UmI9mfFOm2WAjzhmzqrY3g6gNeSw== X-Forefront-Antispam-Report: CIP:194.138.21.74;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:hybrid.siemens.com;CAT:NONE;SFS:(13230022)(4636009)(346002)(136003)(39860400002)(376002)(396003)(451199015)(36840700001)(40470700004)(46966006)(7596003)(16526019)(70586007)(110136005)(4326008)(70206006)(54906003)(7636003)(956004)(2616005)(2906002)(356005)(82740400003)(186003)(40480700001)(1076003)(47076005)(8676002)(8936002)(82960400001)(5660300002)(36756003)(41300700001)(82310400005)(336012)(26005)(36860700001)(478600001)(316002)(86362001)(6666004)(40460700003);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Sep 2022 12:08:05.2046 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 48131a6d-6b18-4b91-aa12-08da97dc1c80 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.74];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: HE1EUR01FT063.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS1PR10MB5392 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr The waitpin polarity can be configured via the WAITPINPOLARITY bits in the GPMC_CONFIG register. This is currently not supported by the driver. This patch adds support for setting the required register bits with the "gpmc,wait-pin-polarity" dt-property. Signed-off-by: Benedikt Niedermayr --- drivers/memory/omap-gpmc.c | 27 +++++++++++++++++++++++++ include/linux/platform_data/gpmc-omap.h | 6 ++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index ea495e93766b..2853fc28bccc 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -132,6 +132,7 @@ #define GPMC_CONFIG_DEV_SIZE 0x00000002 #define GPMC_CONFIG_DEV_TYPE 0x00000003 +#define GPMC_CONFIG_WAITPINPOLARITY(pin) (BIT(pin) << 8) #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) @@ -1882,6 +1883,17 @@ int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1); + if (p->wait_pin_polarity != WAITPINPOLARITY_DEFAULT) { + config1 = gpmc_read_reg(GPMC_CONFIG); + + if (p->wait_pin_polarity == WAITPINPOLARITY_ACTIVE_LOW) + config1 &= ~GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin); + else if (p->wait_pin_polarity == WAITPINPOLARITY_ACTIVE_HIGH) + config1 |= GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin); + + gpmc_write_reg(GPMC_CONFIG, config1); + } + return 0; } @@ -1981,7 +1993,22 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) __func__); } + p->wait_pin_polarity = WAITPINPOLARITY_DEFAULT; + if (!of_property_read_u32(np, "gpmc,wait-pin", &p->wait_pin)) { + if (!of_property_read_u32(np, "gpmc,wait-pin-polarity", + &p->wait_pin_polarity)) { + if (p->wait_pin_polarity != WAITPINPOLARITY_ACTIVE_HIGH && + p->wait_pin_polarity != WAITPINPOLARITY_ACTIVE_LOW && + p->wait_pin_polarity != WAITPINPOLARITY_DEFAULT) { + pr_err("%s: Invalid wait-pin-polarity (pin: %d, pol: %d)\n", + __func__, p->wait_pin, p->wait_pin_polarity); + p->wait_pin_polarity = WAITPINPOLARITY_DEFAULT; + } + } else { + pr_err("%s: Failed to read gpmc,wait-pin-polarity\n", __func__); + } + p->wait_on_read = of_property_read_bool(np, "gpmc,wait-on-read"); p->wait_on_write = of_property_read_bool(np, diff --git a/include/linux/platform_data/gpmc-omap.h b/include/linux/platform_data/gpmc-omap.h index c9cc4e32435d..c46c28069c31 100644 --- a/include/linux/platform_data/gpmc-omap.h +++ b/include/linux/platform_data/gpmc-omap.h @@ -136,6 +136,11 @@ struct gpmc_device_timings { #define GPMC_MUX_AAD 1 /* Addr-Addr-Data multiplex */ #define GPMC_MUX_AD 2 /* Addr-Data multiplex */ +/* Wait pin polarity values */ +#define WAITPINPOLARITY_DEFAULT -1 +#define WAITPINPOLARITY_ACTIVE_LOW 0 +#define WAITPINPOLARITY_ACTIVE_HIGH 1 + struct gpmc_settings { bool burst_wrap; /* enables wrap bursting */ bool burst_read; /* enables read page/burst mode */ @@ -149,6 +154,7 @@ struct gpmc_settings { u32 device_width; /* device bus width (8 or 16 bit) */ u32 mux_add_data; /* multiplex address & data */ u32 wait_pin; /* wait-pin to be used */ + u32 wait_pin_polarity; /* wait-pin polarity */ }; /* Data for each chip select */ From patchwork Fri Sep 16 12:07:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benedikt Niedermayr X-Patchwork-Id: 12978468 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0EC5C6FA92 for ; Fri, 16 Sep 2022 12:08:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230512AbiIPMIV (ORCPT ); Fri, 16 Sep 2022 08:08:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231266AbiIPMIN (ORCPT ); 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Niedermayr" To: , CC: , , , Subject: [PATCH v5 3/3] dt-bindings: memory-controllers: gpmc-child: add wait-pin polarity Date: Fri, 16 Sep 2022 14:07:49 +0200 Message-ID: <20220916120749.2517727-4-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916120749.2517727-1-benedikt.niedermayr@siemens.com> References: <20220916120749.2517727-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [144.145.220.65] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC89XA.ad011.siemens.net (139.25.226.103) X-TM-AS-Product-Ver: SMEX-14.0.0.3080-8.6.1018-26680.007 X-TM-AS-Result: No-10--9.764200-8.000000 X-TMASE-MatchedRID: FgBlj4RFa/fEuqVdWhBa8X8otomh/kVbH9B97WCZlj2VyEX4i+SWU0yQ 5fRSh265B0L0/Ut7x1D47Xv617HbR+THRSYVdIx5q9dxv4TizKefv2cITmCgNtfeP+V/VXwsm2C Uy/KcAJ4RxZBQI0dbZ/WKGThQ2qZNfKZSSl2fkbJNVVoqlq60cKPFjJEFr+oldywMrbEEeHuNo+ PRbWqfRMprJP8FBOIaSV75InlJNiVWinQHdvOEPaUSlfmMuqTbB6/NalQ+MetfLg8e3/TOYg== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--9.764200-8.000000 X-TMASE-Version: SMEX-14.0.0.3080-8.6.1018-26680.007 X-TM-SNTS-SMTP: D6C2432536DEF1B57229023358F3385994EC9B5EE406E35E2474F5590CE04B8B2000:8 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VE1EUR01FT021:EE_|VE1PR10MB3936:EE_ X-MS-Office365-Filtering-Correlation-Id: bcf16aac-2b3d-4a53-93a7-08da97dc1d86 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PTeEIpnccWrRCTQ1fIsjTN6wbzEuVLC171f9aRmzQLeOcqmLdMfkBBA+FAmiBYc0rmOVme5jOJY0lXO+jet5lo1/Sz8bzr9XyuDKce5rPZDqocu5OYocKDuyaWxaJ0dPz5wdRfbFOtRznpssRHWc3x4nhied9LKGbipytkXor/MJ5p0T4V/vh3XO+EHivIF1Ur29Aa9XTxG5DWH3yXSQvjzeagioiEg4qtqxMImqL3rim5k3Wp7YNcBe7ln/mWnPEZMht92Gh4YMT1Kstx13zSQJpz78yQo2iV+gkYyf/RAo4ltwUkwSy6iKhbNJyyAcq8hqCa+0Uz+RCOVH199mBCx1vx5p2CuS+bpRQeA6MsZtEoeyGJdyqbxKn0mUDmw9KQIrWml1CikeIavSgDOq2sPyAx28x/zcrpIc8IAU7GudZPFPE5O4WB1D2SjOG6BrgY1qOc+QI1WYLyMeWHyDkPht2CtXR+j+DIlO6Se+HqvYhDffShqmIYDYjG5aex72AGwfNpEFe2ERTZ58M+4a0Bf+U0KeQCvf7iWJ7lo+wsUnWitfQXRahKZt6Gx8QkD7oRKtaji+Cca7/RBR5DuVICWGOqe6oJRXEs5cCO8E7WXSKuodjpvjU3Jaf5oZY5/EgmyWVkiJE0wcsDPg/++4ixhdRpXeu14TCVEmMyz0rtba3EjNbexATeTxRIMmGmBe3mpGiL2zJNXeyRB7t98mN+obRWHvChVo8qnDqXtfvrs6rpywYUp2hJCqv0hAaviD/UVwYLadeD5IVf1otWLjlWGAULnTioUDC79KIcVEUvFIdKyRiRO73f2odfGawsJj X-Forefront-Antispam-Report: CIP:194.138.21.76;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(136003)(346002)(376002)(39860400002)(396003)(451199015)(40470700004)(36840700001)(46966006)(8676002)(316002)(8936002)(5660300002)(54906003)(86362001)(4326008)(70206006)(70586007)(110136005)(82960400001)(36860700001)(82740400003)(47076005)(40460700003)(41300700001)(6666004)(956004)(478600001)(26005)(2616005)(81166007)(16526019)(336012)(186003)(1076003)(356005)(40480700001)(82310400005)(36756003)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Sep 2022 12:08:06.9679 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bcf16aac-2b3d-4a53-93a7-08da97dc1d86 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.76];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR01FT021.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR10MB3936 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr The GPMC controller has the ability to configure the polarity for the wait pin. The current properties do not allow this configuration. This binding directly configures the WAITPINPOLARITY bit in the GPMC_CONFIG register by setting the gpmc,wait-pin-polarity dt-property. Signed-off-by: Benedikt Niedermayr --- .../bindings/memory-controllers/ti,gpmc-child.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml index 6e3995bb1630..8e541acdb1ff 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml @@ -230,6 +230,13 @@ properties: Wait-pin used by client. Must be less than "gpmc,num-waitpins". $ref: /schemas/types.yaml#/definitions/uint32 + gpmc,wait-pin-polarity: + description: | + Set the desired polarity for the selected wait pin. + 0 for active low, 1 for active high. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + gpmc,wait-on-read: description: Enables wait monitoring on reads. type: boolean