From patchwork Mon Sep 19 18:06:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Iskren Chernev X-Patchwork-Id: 12980923 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20870C6FA86 for ; Mon, 19 Sep 2022 18:06:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229509AbiISSGe (ORCPT ); Mon, 19 Sep 2022 14:06:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58726 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230206AbiISSGc (ORCPT ); Mon, 19 Sep 2022 14:06:32 -0400 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82B0815A23; Mon, 19 Sep 2022 11:06:31 -0700 (PDT) Received: by mail-wr1-x42d.google.com with SMTP id k9so487185wri.0; Mon, 19 Sep 2022 11:06:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=fcEevRZ0SucZvq2o64TKWJQCCIRt2vtZIyxf3obxZMg=; b=HfS/6FMh6neVb+T6OTZCfaSlL8cB27aeX4f9r2OY+3iNRBtPLN6jI12mENcwQg5rub RT9sQXQ91VkjWWDDarsun4W1I6nWh5Sdpg5zDqIIChwxbriksgWV19M7lm69sRUsbUgQ wrkLAGtpRk/ct1cHA4GJ0TpTul5VDdo1msejkWFQdrpzCT8PyiRCp1jV+Tj6VaEtci1L cUIcx6qRbg6fjNeUaW5KHbq6B4CehHTYf8FzJpTho0fxRciWpSglFAV2Pz6feTYqGcG3 yiq0HL04G++9opyRL4veXfPZNI9u78ZjJd4WEHjoHjfyWwaR2MkDQ/o2out8pkLknjiF S4cQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=fcEevRZ0SucZvq2o64TKWJQCCIRt2vtZIyxf3obxZMg=; b=X7fDVsoWp0LYJ1DKPSz6F4AUZw1QKVeToakE13p3LwkMTzOkqMBw2dnuBlZwjeRvuP 6Af3J1fq2MegbqxaPwXmr2w+ReDR5s/hAPc+p5Bz/rfbPOr1WeWBd9OX+o8Dp9kJolv5 i7To4/wpR7lKWUWQ1aRgzN1sZO4t07DDCvpConDP/6SCTyywn2sitB0A1xwD+OLSCv3B xvuXasAjm8yfltW3MNGMX1nqGzWuhxVxwPIw1Hr7oOP7UALuGFXXTY8REdogXCiNQdzo PEs0P5pJdZg7cva5ya3Y3I/i1QH1QAAKiWhQPFerlGoduhyKTKyOGL1kNIngBsAEDn5E PhIA== X-Gm-Message-State: ACrzQf1Nldwo3xfmt+g67yXdbNVyodlrOI+/vyEGfqA1vAdAmPTP/pPT cJ2jfLR8W+ybYryxHWgXEuI= X-Google-Smtp-Source: AMsMyM6xCLp+Ifwl03CPU6QtAwUp+0S4UvqUhhukFRjzmHlMERNv08HcepYTx1GCWMCiE7OqY7e2gA== X-Received: by 2002:a5d:628e:0:b0:228:6961:aa6f with SMTP id k14-20020a5d628e000000b002286961aa6fmr11998172wru.36.1663610790045; Mon, 19 Sep 2022 11:06:30 -0700 (PDT) Received: from localhost ([77.78.20.135]) by smtp.gmail.com with ESMTPSA id l3-20020a5d4bc3000000b002238ea5750csm17227126wrt.72.2022.09.19.11.06.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Sep 2022 11:06:29 -0700 (PDT) From: Iskren Chernev To: Krzysztof Kozlowski , Bjorn Andersson , Rob Herring Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Iskren Chernev , Andy Gross , Konrad Dybcio , Alim Akhtar , Avri Altman , Bart Van Assche , Krzysztof Kozlowski , linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 1/8] dt-bindings: ufs: qcom: Add sm6115 binding Date: Mon, 19 Sep 2022 21:06:11 +0300 Message-Id: <20220919180618.1840194-2-iskren.chernev@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919180618.1840194-1-iskren.chernev@gmail.com> References: <20220919180618.1840194-1-iskren.chernev@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add SM6115 UFS to DT schema. Signed-off-by: Iskren Chernev Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/ufs/qcom,ufs.yaml | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index f2d6298d926c..b517d76215e3 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -28,6 +28,7 @@ properties: - qcom,msm8998-ufshc - qcom,sc8280xp-ufshc - qcom,sdm845-ufshc + - qcom,sm6115-ufshc - qcom,sm6350-ufshc - qcom,sm8150-ufshc - qcom,sm8250-ufshc @@ -178,6 +179,31 @@ allOf: minItems: 1 maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - qcom,sm6115-ufshc + then: + properties: + clocks: + minItems: 8 + maxItems: 8 + clock-names: + items: + - const: core_clk + - const: bus_aggr_clk + - const: iface_clk + - const: core_clk_unipro + - const: ref_clk + - const: tx_lane0_sync_clk + - const: rx_lane0_sync_clk + - const: ice_core_clk + reg: + minItems: 2 + maxItems: 2 + # TODO: define clock bindings for qcom,msm8994-ufshc unevaluatedProperties: false From patchwork Mon Sep 19 18:06:12 2022 Content-Type: text/plain; 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Mon, 19 Sep 2022 11:06:34 -0700 (PDT) Received: from localhost ([77.78.20.135]) by smtp.gmail.com with ESMTPSA id 2-20020a1c1902000000b003b49aa8083esm14709624wmz.42.2022.09.19.11.06.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Sep 2022 11:06:33 -0700 (PDT) From: Iskren Chernev To: Krzysztof Kozlowski , Bjorn Andersson , Rob Herring Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Iskren Chernev , Vinod Koul , Krzysztof Kozlowski , Luca Weiss , Stephan Gerhold , Thierry Reding , Robin Murphy , Bartosz Dudziak , Lorenzo Pieralisi , linux-kernel@vger.kernel.org Subject: [PATCH v4 2/8] dt-bindings: arm: cpus: Add kryo240 compatible Date: Mon, 19 Sep 2022 21:06:12 +0300 Message-Id: <20220919180618.1840194-3-iskren.chernev@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919180618.1840194-1-iskren.chernev@gmail.com> References: <20220919180618.1840194-1-iskren.chernev@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Kryo240 is found in SM4250, the slower sibling of the SM6115. Signed-off-by: Iskren Chernev Reviewed-by: Vinod Koul Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index a07c5bac7c46..5c13b73e4d57 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -174,6 +174,7 @@ properties: - nvidia,tegra194-carmel - qcom,krait - qcom,kryo + - qcom,kryo240 - qcom,kryo250 - qcom,kryo260 - qcom,kryo280 From patchwork Mon Sep 19 18:06:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Iskren Chernev X-Patchwork-Id: 12980925 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8361AC6FA91 for ; Mon, 19 Sep 2022 18:06:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231330AbiISSGk (ORCPT ); Mon, 19 Sep 2022 14:06:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230206AbiISSGj (ORCPT ); Mon, 19 Sep 2022 14:06:39 -0400 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37DE845980; Mon, 19 Sep 2022 11:06:38 -0700 (PDT) Received: by mail-wr1-x432.google.com with SMTP id b5so387994wrr.5; Mon, 19 Sep 2022 11:06:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=QfWW3Bgk8p54Ws6mo7HUHIpRuHazfcXLyPjujKD+Bao=; b=Lr550RupUK0YccgUrYx5Sfx29b8xaU5VmqyKT8Lh0Uh0nnGUtgtzv3mulSxLthCH3I aF4hb4wITBc6rd03wYiz4+Mwo2sjBmjbrM4yJg1DcQbECHCzCzwQSJSuhWxDU7YEllCf OsLvOse6aF2Cvv0wDaxPGooQnig5mOVxr5msEyfz6Q+2y8GivItHFo2FyDnJI+xmksne CIvLHaq1hkF6eW8jgoTI1IObi2osqHgEECfecWrsY8Vfo1BJd7twnXUVqSKwMk4ruHYo aUZZmU5JH6y2nnzUMfmfszlVJPLUwL5hrEAhRl/DJxHrUsx71YajRNoj4kppZiFMZTby 4vUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=QfWW3Bgk8p54Ws6mo7HUHIpRuHazfcXLyPjujKD+Bao=; b=xZG89ybW7naGonLCcLu/IPHiIGp6lR77uNSMVcHD2Wi4Gv6j1N1M9IWbFbsRpZpx5Q 89+JCjIONjoxnza8FsIxrifRnl6uAW+Ry0zxN8Whublxgl5uxkAQtTLh5aoeNGeCGlUY xZwescE1rRKtfTeijy4ztwj6zR/12G4UPl1VPjgVyrZqpqrVzXa30n1GozN56i2Wz/j3 N5dCl34N/rBFKKSi6WtL7YkhwU+75mJjuWTDWu2+Rz6zxmj1FiTGVJyqSe0VD891io+D h+cCLWKYQo0uIOy4/pvY/gAQa8XCQH+gxca1XjPHzySwkR844G4tRu+iAzmjXa5RNauI 0OUw== X-Gm-Message-State: ACrzQf0nNIgjsWYOQ0XKW8PrMRGJ0/DKE+wYgdVRlKti/U4SPiQonkwD h8DP9+ZHgWVAlCbyO+rJbEw= X-Google-Smtp-Source: AMsMyM62KrjeHWnEOgnvk6O0kZn16SPBrxKiWIb47tnj0HtXUNHOA1P1cViRE2UsK14mhJC9zYTQLQ== X-Received: by 2002:a5d:588e:0:b0:22a:feea:6c09 with SMTP id n14-20020a5d588e000000b0022afeea6c09mr3878663wrf.112.1663610796663; Mon, 19 Sep 2022 11:06:36 -0700 (PDT) Received: from localhost ([77.78.20.135]) by smtp.gmail.com with ESMTPSA id e5-20020adff345000000b0022ac672654dsm14895071wrp.58.2022.09.19.11.06.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Sep 2022 11:06:36 -0700 (PDT) From: Iskren Chernev To: Krzysztof Kozlowski , Bjorn Andersson , Rob Herring Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Iskren Chernev , Caleb Connolly , Andy Gross , Konrad Dybcio , Krzysztof Kozlowski , linux-kernel@vger.kernel.org Subject: [PATCH v4 3/8] dt-bindings: arm: qcom: Add compatible for oneplus,billie2 phone Date: Mon, 19 Sep 2022 21:06:13 +0300 Message-Id: <20220919180618.1840194-4-iskren.chernev@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919180618.1840194-1-iskren.chernev@gmail.com> References: <20220919180618.1840194-1-iskren.chernev@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org oneplus,billie2 (OnePlus Nord N100) is based on QualComm Snapdragon SM4250 SoC. Add support for the same in dt-bindings. Signed-off-by: Iskren Chernev Reviewed-by: Krzysztof Kozlowski Reviewed-by: Caleb Connolly --- Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 1b5ac6b02bc5..35cfc1ef7522 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -54,6 +54,8 @@ description: | sdm845 sdx55 sdx65 + sm4250 + sm6115 sm6125 sm6350 sm7225 @@ -690,6 +692,11 @@ properties: - xiaomi,polaris - const: qcom,sdm845 + - items: + - enum: + - oneplus,billie2 + - const: qcom,sm4250 + - items: - enum: - sony,pdx201 From patchwork Mon Sep 19 18:06:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Iskren Chernev X-Patchwork-Id: 12980927 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60B80ECAAA1 for ; Mon, 19 Sep 2022 18:06:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231372AbiISSGp (ORCPT ); Mon, 19 Sep 2022 14:06:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230335AbiISSGl (ORCPT ); Mon, 19 Sep 2022 14:06:41 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6CD3B4599C; Mon, 19 Sep 2022 11:06:40 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id c11so328994wrp.11; Mon, 19 Sep 2022 11:06:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=6o/84kfK4xdwTkYBv2fG3jImlB7S6+cVbXt6vDjpfIE=; b=ht7pYL30ye8ua9awvg3LxLGDnMjoWRRlRLaG9QDB35JVIB+1KFOI6iyZAvQ33J/Rvp 30V66POKe5nspYmO3dI64HnWRcOS9pm30RBhMKSxCLuePnvUfOJq8fR+YKil+mLtyogx WrON9vmzBm9GPEIrhA52KDqtW1aMow/SinwKEiitQKnUdY987xoRN9lmPpALhKk73Jfm 5dHyd3V/NmAClp0I17NFX8X6nPMSpr3+wmurqUvo3/k2tQMQKgaXCLnFLFZzqBE9Q2hv XFsIXdXRzntU914D7ek5CrWkO6uBxzLJIPQE6n5bW3RN6pgD+X/nTCXuIbYeRx+HU3RM 4/Jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=6o/84kfK4xdwTkYBv2fG3jImlB7S6+cVbXt6vDjpfIE=; b=5z0gFQHigqzJ4Xs+LhxCSDBWZnTno2iWRJYHXN0tgk+P6EdCXp0IPeDp8FfUzWaQh8 OryloKOtOz0huXW60R/S7luz7XdDu1C2ej9Mk8KkxVN4XCqqC5XPa56cdxUnoQzPc9LN o3o5m7NTJIMnwfrD0+FC67wV9lvhutP/5UnMEX9llCksqOx0hE2IPoB1dkuxga8Iquc9 7DJ2TuKgGXlELBWk5dtmdESdfLzKKlS0dm81brBOdzkP5wwS+W7t3xj8jARHTmnB0vNW tZXJDKCF7aQzSG5Fo1uOeveFQeHQlBU6+pdQBwOyn2yu1vA7uNi1Ie5268F+TOrFX3P4 XJuQ== X-Gm-Message-State: ACrzQf0//KxM/+IIEX3IltNBQVaqdEiKAzXMZaC0yaXe5X+5VzWRXFYu wFGekebR6coKTERh5GjhxiU= X-Google-Smtp-Source: AMsMyM5bvWOJCqx4mOVN0KyIB0uluk5u/oMUo0Cbtapb6sfO+XCML06C1K8dg8xNAhtDw1AlgnVTHA== X-Received: by 2002:a5d:6245:0:b0:225:41ae:a930 with SMTP id m5-20020a5d6245000000b0022541aea930mr11723087wrv.342.1663610799015; Mon, 19 Sep 2022 11:06:39 -0700 (PDT) Received: from localhost ([77.78.20.135]) by smtp.gmail.com with ESMTPSA id n6-20020a1c7206000000b003b4764442f0sm14192711wmc.11.2022.09.19.11.06.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Sep 2022 11:06:38 -0700 (PDT) From: Iskren Chernev To: Krzysztof Kozlowski , Bjorn Andersson , Rob Herring Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Iskren Chernev , Andy Gross , Konrad Dybcio , Greg Kroah-Hartman , Krzysztof Kozlowski , Wesley Cheng , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 4/8] dt-bindings: usb: qcom,dwc3: Fix SM6115 clocks, irqs Date: Mon, 19 Sep 2022 21:06:14 +0300 Message-Id: <20220919180618.1840194-5-iskren.chernev@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919180618.1840194-1-iskren.chernev@gmail.com> References: <20220919180618.1840194-1-iskren.chernev@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org SM6115 has 6 clocks and 2 interrupts. Signed-off-by: Iskren Chernev Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index cd2f7cb6745a..4ca07c79819d 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -294,6 +294,7 @@ allOf: compatible: contains: enum: + - qcom,sm6115-dwc3 - qcom,sm6125-dwc3 - qcom,sm8150-dwc3 - qcom,sm8250-dwc3 @@ -348,7 +349,6 @@ allOf: - qcom,sdx55-dwc3 - qcom,sdx65-dwc3 - qcom,sm4250-dwc3 - - qcom,sm6115-dwc3 - qcom,sm6125-dwc3 - qcom,sm6350-dwc3 - qcom,sm8150-dwc3 @@ -380,6 +380,7 @@ allOf: - qcom,msm8953-dwc3 - qcom,msm8996-dwc3 - qcom,msm8998-dwc3 + - qcom,sm6115-dwc3 then: properties: interrupts: From patchwork Mon Sep 19 18:06:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Iskren Chernev X-Patchwork-Id: 12980926 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 170D9C6FA92 for ; Mon, 19 Sep 2022 18:06:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231392AbiISSGq (ORCPT ); Mon, 19 Sep 2022 14:06:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230385AbiISSGo (ORCPT ); Mon, 19 Sep 2022 14:06:44 -0400 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C146445F5B; Mon, 19 Sep 2022 11:06:42 -0700 (PDT) Received: by mail-wm1-x334.google.com with SMTP id c2-20020a1c3502000000b003b2973dafb7so5243615wma.2; Mon, 19 Sep 2022 11:06:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=nFv4Tohd2giyViEtmIJ+DkJDZX8rBCWBLAqJ264IXgc=; b=DzprM+EVmuciNfN5MjSEQFntwLFiXzYspWF+B8bHoRhRHYpGlIVNhYHAe7LVd+vnr2 9BCGJDWuiMto327LPx14iISVBQ5Qj3fWVvHvF9LCn6M41LDDRFpLJEBaw8tT9iDodJjN VcefXkiyM+p062WpDtMt1T82mQNKf3nGj+5So538bvFvLFfj4mTxg+1Oo8CS4mvB93Bt QDPaFnA0kZfDZUTVOihlCCBUn9N7+6NslsFCG4mq1lTTcTpxipqx36udcZVym3apBMaX HkuadDB+Zaf6ZNvgpPCIUhA1upFAb+aPU1F/FQuj8ruv//jwYPhX3lCUGaOiYM50PD/9 h04w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=nFv4Tohd2giyViEtmIJ+DkJDZX8rBCWBLAqJ264IXgc=; b=k6IfS4SV+fgQtSFq3z0GF6+2c8/xtxFVmkRNJex5eT0G+9kMKdx06Uk6lKMhAdRw/p oJTqaRlVL66C6gSSzuW4AUEOWmcDPfZZdZsG0cHgFRzJKpywP/kVg/YC6k4a2qkNRkHn n9dOS1pct82/V8qEjNaPOolWbVd1YCVW0Xe3GinIQnWTySqDT+M4IUdYfGg97W5iYTUS rG4u6DrusJamGmDAgbshn9VIEZTyhhwQ63QQjue6HhaElhdnzbLhcsPMCRuaIDL/SK4I nmrxnuqqR6l0n0Hoo+nnkWjo4s9FFcPJtTGMXLz78rjJWIHhsDYZfvYNSjLfA77rh1GE DHyA== X-Gm-Message-State: ACgBeo2oFSQLocl2N///qSL4KHEw+0GeEpQAQ9wBcLB5yFpSEjPMrFlt C3VH3Iq7SNzLlbNS1QPh07s= X-Google-Smtp-Source: AA6agR7WFHf/c/7ZGkKNjSowQOgBbUt0q40ZFOAhfWInvty/BMFYjQ17wi0j/rWq2kman714us9Bsw== X-Received: by 2002:a7b:c84c:0:b0:3b3:3faa:10c3 with SMTP id c12-20020a7bc84c000000b003b33faa10c3mr20015521wml.94.1663610801419; Mon, 19 Sep 2022 11:06:41 -0700 (PDT) Received: from localhost ([77.78.20.135]) by smtp.gmail.com with ESMTPSA id o13-20020a05600c4fcd00b003b332a7bf15sm15051410wmq.7.2022.09.19.11.06.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Sep 2022 11:06:41 -0700 (PDT) From: Iskren Chernev To: Krzysztof Kozlowski , Bjorn Andersson , Rob Herring Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Iskren Chernev , Andy Gross , Konrad Dybcio , Kishon Vijay Abraham I , Vinod Koul , Krzysztof Kozlowski , linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 5/8] dt-bindings: phy: qcom,qmp-ufs: Fix SM6115 clocks, regs Date: Mon, 19 Sep 2022 21:06:15 +0300 Message-Id: <20220919180618.1840194-6-iskren.chernev@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919180618.1840194-1-iskren.chernev@gmail.com> References: <20220919180618.1840194-1-iskren.chernev@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Sm6115 UFS PHY has 2 clocks and 3 regs. Signed-off-by: Iskren Chernev Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/phy/qcom,qmp-ufs-phy.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-ufs-phy.yaml index 6e3c186b9972..815c375d0f7b 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-ufs-phy.yaml @@ -121,6 +121,7 @@ allOf: - qcom,sc8180x-qmp-ufs-phy - qcom,sc8280xp-qmp-ufs-phy - qcom,sdm845-qmp-ufs-phy + - qcom,sm6115-qmp-ufs-phy - qcom,sm6350-qmp-ufs-phy - qcom,sm8150-qmp-ufs-phy - qcom,sm8250-qmp-ufs-phy @@ -180,7 +181,6 @@ allOf: contains: enum: - qcom,sc8180x-qmp-ufs-phy - - qcom,sm6115-qmp-ufs-phy then: patternProperties: "^phy@[0-9a-f]+$": @@ -198,6 +198,7 @@ allOf: contains: enum: - qcom,msm8996-qmp-ufs-phy + - qcom,sm6115-qmp-ufs-phy then: patternProperties: "^phy@[0-9a-f]+$": From patchwork Mon Sep 19 18:06:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Iskren Chernev X-Patchwork-Id: 12980928 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8578EC6FA86 for ; Mon, 19 Sep 2022 18:07:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231418AbiISSHV (ORCPT ); Mon, 19 Sep 2022 14:07:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59364 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229932AbiISSHG (ORCPT ); Mon, 19 Sep 2022 14:07:06 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC00046200; Mon, 19 Sep 2022 11:06:47 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id ay36so110166wmb.0; Mon, 19 Sep 2022 11:06:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=iiLWfdvLt8SUvuu8fmq/3fJYI0hfAKP/g9TqOzig3EI=; b=HvgzHmP+TfUN0OlkUOT/oeS3sinf0Tt8qkXG7I8YKar01uBJUl4qMRtFmxjFrBwg8N IgepzTA/6ceOGIhwdmr47LqSz/vRt1YU9NAWHTDbhsewjrc3Zq2j0izSXNyfa+Ee+YtX 3KPyou+u9c1qre1wthRB7jfRAyQYo0apyOihvOsv0KI8E4u7kGAeJaxnUvFCeCf4bH35 UHrAnc8SjfOn9skRkPueAh4Jm/LO6XI8Gt2oIZOxS9dxJ6bT69a6wnPXvqw8L/d83FNx GmMkkkt+OmWBg13XMGD/jCXKpZjSpLrUS8RC+5nq4vjuIFXeaC+V5yg6OWUusCYVZ7ER IQJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=iiLWfdvLt8SUvuu8fmq/3fJYI0hfAKP/g9TqOzig3EI=; b=Y/Aew6Cnep2Z/5F1PtN/NO+PZ1/E6b/bPgMeRX8no6CR8LbF9CaDbJ9ZMAZsYOxdvV YAPh7+m1ZjfeNEUmIx5kePzT9Xl2WhvL/lgYVPubLCIo4y9w9YZdWbMoRNRouOatVrRA OVRNh6u3NTfUlPcK33trBDfnufmoji9Xqis3elMK9eE8gdERAp7mMRIHHas4ny6W0fcz NZtHykEj0/QfBJ8XD+ENq+kUntf8R5M9RM9FSXCpaHL8zsIIRhKJkauwnA0rSMUoSaB0 TU7UyJOLtjrX3V8FW9xBWSr6lqU+pxd04Lpcjvrl1ehElUbN2Axp7D5+M1Qbtq7dPdPd 8e9w== X-Gm-Message-State: ACrzQf2wrUZGy9mZIE5QUbIBjmWqbdEzKyOuUZLRSjSvj0/O4wyJhDdq 1iwxfDmeGQBPuDqMznfHnug= X-Google-Smtp-Source: AMsMyM4mOs950iWBnjj+nbgQNoXxBdHFPg1dOFhXjPcWi80q+HszX7H8XWeoV1oHMSKsvFqS1gKPjw== X-Received: by 2002:a05:600c:1f18:b0:3b4:c4ae:f666 with SMTP id bd24-20020a05600c1f1800b003b4c4aef666mr8527451wmb.88.1663610805603; Mon, 19 Sep 2022 11:06:45 -0700 (PDT) Received: from localhost ([77.78.20.135]) by smtp.gmail.com with ESMTPSA id bk23-20020a0560001d9700b0022b014fb0b7sm3678970wrb.110.2022.09.19.11.06.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Sep 2022 11:06:45 -0700 (PDT) From: Iskren Chernev To: Krzysztof Kozlowski , Bjorn Andersson , Rob Herring Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Iskren Chernev , Andy Gross , Konrad Dybcio , Krzysztof Kozlowski , linux-kernel@vger.kernel.org Subject: [PATCH v4 6/8] arm64: dts: qcom: sm6115: Add basic soc dtsi Date: Mon, 19 Sep 2022 21:06:16 +0300 Message-Id: <20220919180618.1840194-7-iskren.chernev@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919180618.1840194-1-iskren.chernev@gmail.com> References: <20220919180618.1840194-1-iskren.chernev@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for Qualcomm SM6115 SoC. This includes: - GCC - Pinctrl - RPM (CC+PD) - USB - MMC - UFS Signed-off-by: Iskren Chernev --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 854 +++++++++++++++++++++++++++ 1 file changed, 854 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm6115.dtsi diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi new file mode 100644 index 000000000000..0340ed21be05 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -0,0 +1,854 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (c) 2021, Iskren Chernev + */ + +#include +#include +#include +#include +#include + +/ { + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + clocks { + xo_board: xo-board { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + + sleep_clk: sleep-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x0>; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <100>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + compatible = "cache"; + cache-level = <2>; + }; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x1>; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <100>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + }; + + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x2>; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <100>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + }; + + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x3>; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <100>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + }; + + CPU4: cpu@100 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x100>; + enable-method = "psci"; + capacity-dmips-mhz = <1638>; + dynamic-power-coefficient = <282>; + next-level-cache = <&L2_1>; + L2_1: l2-cache { + compatible = "cache"; + cache-level = <2>; + }; + }; + + CPU5: cpu@101 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x101>; + capacity-dmips-mhz = <1638>; + dynamic-power-coefficient = <282>; + enable-method = "psci"; + next-level-cache = <&L2_1>; + }; + + CPU6: cpu@102 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x102>; + capacity-dmips-mhz = <1638>; + dynamic-power-coefficient = <282>; + enable-method = "psci"; + next-level-cache = <&L2_1>; + }; + + CPU7: cpu@103 { + device_type = "cpu"; + compatible = "qcom,kryo260"; + reg = <0x0 0x103>; + capacity-dmips-mhz = <1638>; + dynamic-power-coefficient = <282>; + enable-method = "psci"; + next-level-cache = <&L2_1>; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + }; + + cluster1 { + core0 { + cpu = <&CPU4>; + }; + + core1 { + cpu = <&CPU5>; + }; + + core2 { + cpu = <&CPU6>; + }; + + core3 { + cpu = <&CPU7>; + }; + }; + }; + }; + + firmware { + scm: scm { + compatible = "qcom,scm-sm6115", "qcom,scm"; + #reset-cells = <1>; + }; + }; + + memory@80000000 { + device_type = "memory"; + /* We expect the bootloader to fill in the size */ + reg = <0 0x80000000 0 0>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + hyp_mem: memory@45700000 { + reg = <0x0 0x45700000 0x0 0x600000>; + no-map; + }; + + xbl_aop_mem: memory@45e00000 { + reg = <0x0 0x45e00000 0x0 0x140000>; + no-map; + }; + + sec_apps_mem: memory@45fff000 { + reg = <0x0 0x45fff000 0x0 0x1000>; + no-map; + }; + + smem_mem: memory@46000000 { + compatible = "qcom,smem"; + reg = <0x0 0x46000000 0x0 0x200000>; + no-map; + + hwlocks = <&tcsr_mutex 3>; + qcom,rpm-msg-ram = <&rpm_msg_ram>; + }; + + cdsp_sec_mem: memory@46200000 { + reg = <0x0 0x46200000 0x0 0x1e00000>; + no-map; + }; + + pil_modem_mem: memory@4ab00000 { + reg = <0x0 0x4ab00000 0x0 0x6900000>; + no-map; + }; + + pil_video_mem: memory@51400000 { + reg = <0x0 0x51400000 0x0 0x500000>; + no-map; + }; + + wlan_msa_mem: memory@51900000 { + reg = <0x0 0x51900000 0x0 0x100000>; + no-map; + }; + + pil_cdsp_mem: memory@51a00000 { + reg = <0x0 0x51a00000 0x0 0x1e00000>; + no-map; + }; + + pil_adsp_mem: memory@53800000 { + reg = <0x0 0x53800000 0x0 0x2800000>; + no-map; + }; + + pil_ipa_fw_mem: memory@56100000 { + reg = <0x0 0x56100000 0x0 0x10000>; + no-map; + }; + + pil_ipa_gsi_mem: memory@56110000 { + reg = <0x0 0x56110000 0x0 0x5000>; + no-map; + }; + + pil_gpu_mem: memory@56115000 { + reg = <0x0 0x56115000 0x0 0x2000>; + no-map; + }; + + cont_splash_memory: memory@5c000000 { + reg = <0x0 0x5c000000 0x0 0x00f00000>; + no-map; + }; + + dfps_data_memory: memory@5cf00000 { + reg = <0x0 0x5cf00000 0x0 0x0100000>; + no-map; + }; + + removed_mem: memory@60000000 { + reg = <0x0 0x60000000 0x0 0x3900000>; + no-map; + }; + }; + + rpm-glink { + compatible = "qcom,glink-rpm"; + + interrupts = ; + qcom,rpm-msg-ram = <&rpm_msg_ram>; + mboxes = <&apcs_glb 0>; + + rpm_requests: rpm-requests { + compatible = "qcom,rpm-sm6115"; + qcom,glink-channels = "rpm_requests"; + + rpmcc: clock-controller { + compatible = "qcom,rpmcc-sm6115", "qcom,rpmcc"; + #clock-cells = <1>; + }; + + rpmpd: power-controller { + compatible = "qcom,sm6115-rpmpd"; + #power-domain-cells = <1>; + operating-points-v2 = <&rpmpd_opp_table>; + + rpmpd_opp_table: opp-table { + compatible = "operating-points-v2"; + + rpmpd_opp_min_svs: opp1 { + opp-level = ; + }; + + rpmpd_opp_low_svs: opp2 { + opp-level = ; + }; + + rpmpd_opp_svs: opp3 { + opp-level = ; + }; + + rpmpd_opp_svs_plus: opp4 { + opp-level = ; + }; + + rpmpd_opp_nom: opp5 { + opp-level = ; + }; + + rpmpd_opp_nom_plus: opp6 { + opp-level = ; + }; + + rpmpd_opp_turbo: opp7 { + opp-level = ; + }; + + rpmpd_opp_turbo_plus: opp8 { + opp-level = ; + }; + }; + }; + }; + }; + + soc: soc@0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + + tcsr_mutex: hwlock@340000 { + compatible = "qcom,tcsr-mutex"; + reg = <0x00340000 0x20000>; + #hwlock-cells = <1>; + }; + + tlmm: pinctrl@500000 { + compatible = "qcom,sm6115-tlmm"; + reg = <0x00500000 0x400000>, <0x00900000 0x400000>, <0x00d00000 0x400000>; + reg-names = "west", "south", "east"; + interrupts = ; + gpio-controller; + gpio-ranges = <&tlmm 0 0 121>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + sdc1_state_on: sdc1-on-state { + clk-pins { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <16>; + }; + + cmd-pins { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + data-pins { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <10>; + }; + + rclk-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + sdc1_state_off: sdc1-off-state { + clk-pins { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <2>; + }; + + cmd-pins { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + + data-pins { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <2>; + }; + + rclk-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + sdc2_state_on: sdc2-on-state { + clk-pins { + pins = "sdc2_clk"; + bias-disable; + drive-strength = <16>; + }; + + cmd-pins { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + data-pins { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <10>; + }; + + sd-cd-pins { + pins = "gpio88"; + function = "gpio"; + bias-pull-up; + drive-strength = <2>; + }; + }; + + sdc2_state_off: sdc2-off-state { + clk-pins { + pins = "sdc2_clk"; + bias-disable; + drive-strength = <2>; + }; + + cmd-pins { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + + data-pins { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <2>; + }; + + sd-cd-pins { + pins = "gpio88"; + function = "gpio"; + bias-disable; + drive-strength = <2>; + }; + }; + }; + + gcc: clock-controller@1400000 { + compatible = "qcom,gcc-sm6115"; + reg = <0x01400000 0x1f0000>; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>; + clock-names = "bi_tcxo", "sleep_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + + usb_1_hsphy: phy@1613000 { + compatible = "qcom,sm6115-qusb2-phy"; + reg = <0x01613000 0x180>; + #phy-cells = <0>; + + clocks = <&gcc GCC_AHB2PHY_USB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; + nvmem-cells = <&qusb2_hstx_trim>; + + status = "disabled"; + }; + + qfprom@1b40000 { + compatible = "qcom,sm6115-qfprom", "qcom,qfprom"; + reg = <0x01b40000 0x7000>; + #address-cells = <1>; + #size-cells = <1>; + + qusb2_hstx_trim: hstx-trim@25b { + reg = <0x25b 0x1>; + bits = <1 4>; + }; + }; + + spmi_bus: spmi@1c40000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x01c40000 0x1100>, + <0x01e00000 0x2000000>, + <0x03e00000 0x100000>, + <0x03f00000 0xa0000>, + <0x01c0a000 0x26000>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupt-names = "periph_irq"; + interrupts = ; + qcom,ee = <0>; + qcom,channel = <0>; + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + }; + + rpm_msg_ram: sram@45f0000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0x045f0000 0x7000>; + }; + + sdhc_1: mmc@4744000 { + compatible = "qcom,sm6115-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x04744000 0x1000>, <0x04745000 0x1000>, <0x04748000 0x8000>; + reg-names = "hc", "cqhci", "ice"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>, + <&xo_board>, + <&gcc GCC_SDCC1_ICE_CORE_CLK>; + clock-names = "iface", "core", "xo", "ice"; + + pinctrl-0 = <&sdc1_state_on>; + pinctrl-1 = <&sdc1_state_off>; + pinctrl-names = "default", "sleep"; + + bus-width = <8>; + status = "disabled"; + }; + + sdhc_2: mmc@4784000 { + compatible = "qcom,sm6115-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x04784000 0x1000>; + reg-names = "hc"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC2_AHB_CLK>, <&gcc GCC_SDCC2_APPS_CLK>, <&xo_board>; + clock-names = "iface", "core", "xo"; + + pinctrl-0 = <&sdc2_state_on>; + pinctrl-1 = <&sdc2_state_off>; + pinctrl-names = "default", "sleep"; + + power-domains = <&rpmpd SM6115_VDDCX>; + operating-points-v2 = <&sdhc2_opp_table>; + iommus = <&apps_smmu 0x00a0 0x0>; + resets = <&gcc GCC_SDCC2_BCR>; + + bus-width = <4>; + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; + status = "disabled"; + + sdhc2_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmpd_opp_low_svs>; + }; + + opp-202000000 { + opp-hz = /bits/ 64 <202000000>; + required-opps = <&rpmpd_opp_nom>; + }; + }; + }; + + ufs_mem_hc: ufs@4804000 { + compatible = "qcom,sm6115-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; + reg = <0x04804000 0x3000>, <0x04810000 0x8000>; + interrupts = ; + phys = <&ufs_mem_phy_lanes>; + phy-names = "ufsphy"; + lanes-per-direction = <1>; + #reset-cells = <1>; + resets = <&gcc GCC_UFS_PHY_BCR>; + reset-names = "rst"; + + power-domains = <&gcc GCC_UFS_PHY_GDSC>; + iommus = <&apps_smmu 0x100 0>; + + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>, + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + clock-names = "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "ice_core_clk"; + + freq-table-hz = <50000000 200000000>, + <0 0>, + <0 0>, + <37500000 150000000>, + <75000000 300000000>, + <0 0>, + <0 0>, + <0 0>; + + status = "disabled"; + }; + + ufs_mem_phy: phy@4807000 { + compatible = "qcom,sm6115-qmp-ufs-phy"; + reg = <0x04807000 0x1c4>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + clock-names = "ref", "ref_aux"; + + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + status = "disabled"; + + ufs_mem_phy_lanes: phy@4807400 { + reg = <0x4807400 0x098>, + <0x4807600 0x130>, + <0x4807c00 0x16c>; + #phy-cells = <0>; + }; + }; + + usb_1: usb@4ef8800 { + compatible = "qcom,sm6115-dwc3", "qcom,dwc3"; + reg = <0x04ef8800 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, + <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB3_PRIM_CLKREF_CLK>; + clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi", "xo"; + + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>; + assigned-clock-rates = <19200000>, <66666667>; + + interrupts = , + ; + interrupt-names = "hs_phy_irq", "ss_phy_irq"; + + resets = <&gcc GCC_USB30_PRIM_BCR>; + power-domains = <&gcc GCC_USB30_PRIM_GDSC>; + qcom,select-utmi-as-pipe-clk; + status = "disabled"; + + usb_1_dwc3: usb@4e00000 { + compatible = "snps,dwc3"; + reg = <0x04e00000 0xcd00>; + interrupts = ; + phys = <&usb_1_hsphy>; + phy-names = "usb2-phy"; + iommus = <&apps_smmu 0x120 0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + snps,has-lpm-erratum; + snps,hird-threshold = /bits/ 8 <0x10>; + snps,usb3_lpm_capable; + maximum-speed = "high-speed"; + dr_mode = "peripheral"; + }; + }; + + apps_smmu: iommu@c600000 { + compatible = "qcom,sm6115-smmu-500", "arm,mmu-500"; + reg = <0x0c600000 0x80000>; + #iommu-cells = <2>; + #global-interrupts = <1>; + + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + apcs_glb: mailbox@f111000 { + compatible = "qcom,sm6115-apcs-hmss-global"; + reg = <0x0f111000 0x1000>; + + #mbox-cells = <1>; + }; + + timer@f120000 { + compatible = "arm,armv7-timer-mem"; + reg = <0x0f120000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clock-frequency = <19200000>; + + frame@f121000 { + reg = <0x0f121000 0x1000>, <0x0f122000 0x1000>; + frame-number = <0>; + interrupts = , + ; + }; + + frame@f123000 { + reg = <0x0f123000 0x1000>; + frame-number = <1>; + interrupts = ; + status = "disabled"; + }; + + frame@f124000 { + reg = <0x0f124000 0x1000>; + frame-number = <2>; + interrupts = ; + status = "disabled"; + }; + + frame@f125000 { + reg = <0x0f125000 0x1000>; + frame-number = <3>; + interrupts = ; + status = "disabled"; + }; + + frame@f126000 { + reg = <0x0f126000 0x1000>; + frame-number = <4>; + interrupts = ; + status = "disabled"; + }; + + frame@f127000 { + reg = <0x0f127000 0x1000>; + frame-number = <5>; + interrupts = ; + status = "disabled"; + }; + + frame@f128000 { + reg = <0x0f128000 0x1000>; + frame-number = <6>; + interrupts = ; + status = "disabled"; + }; + }; + + intc: interrupt-controller@f200000 { + compatible = "arm,gic-v3"; + reg = <0x0f200000 0x10000>, <0x0f300000 0x100000>; + #interrupt-cells = <3>; + interrupt-controller; + interrupt-parent = <&intc>; + #redistributor-regions = <1>; + redistributor-stride = <0x0 0x20000>; + interrupts = ; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; +}; From patchwork Mon Sep 19 18:06:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Iskren Chernev X-Patchwork-Id: 12980929 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19021C6FA90 for ; Mon, 19 Sep 2022 18:07:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231174AbiISSHZ (ORCPT ); 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Mon, 19 Sep 2022 11:06:49 -0700 (PDT) From: Iskren Chernev To: Krzysztof Kozlowski , Bjorn Andersson , Rob Herring Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Iskren Chernev , Andy Gross , Konrad Dybcio , Krzysztof Kozlowski , linux-kernel@vger.kernel.org Subject: [PATCH v4 7/8] arm64: dts: qcom: sm4250: Add soc dtsi Date: Mon, 19 Sep 2022 21:06:17 +0300 Message-Id: <20220919180618.1840194-8-iskren.chernev@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919180618.1840194-1-iskren.chernev@gmail.com> References: <20220919180618.1840194-1-iskren.chernev@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The SM4250 is a downclocked version of the SM6115. Signed-off-by: Iskren Chernev Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm4250.dtsi | 38 ++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm4250.dtsi diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qcom/sm4250.dtsi new file mode 100644 index 000000000000..c5add8f44fc0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm4250.dtsi @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (c) 2021, Iskren Chernev + */ + +#include "sm6115.dtsi" + +&CPU0 { + compatible = "qcom,kryo240"; +}; + +&CPU1 { + compatible = "qcom,kryo240"; +}; + +&CPU2 { + compatible = "qcom,kryo240"; +}; + +&CPU3 { + compatible = "qcom,kryo240"; +}; + +&CPU4 { + compatible = "qcom,kryo240"; +}; + +&CPU5 { + compatible = "qcom,kryo240"; +}; + +&CPU6 { + compatible = "qcom,kryo240"; +}; + +&CPU7 { + compatible = "qcom,kryo240"; +}; From patchwork Mon Sep 19 18:06:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Iskren Chernev X-Patchwork-Id: 12980930 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 264C8ECAAD3 for ; Mon, 19 Sep 2022 18:07:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231462AbiISSHb (ORCPT ); Mon, 19 Sep 2022 14:07:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59364 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230145AbiISSHV (ORCPT ); Mon, 19 Sep 2022 14:07:21 -0400 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F218446600; Mon, 19 Sep 2022 11:06:54 -0700 (PDT) Received: by mail-wm1-x331.google.com with SMTP id h130-20020a1c2188000000b003b4cadadce7so3935872wmh.3; Mon, 19 Sep 2022 11:06:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=uv5yxjHWeGx+AJdbwQSqj4Y1uDvP+yaBUQDlqTuyNZA=; b=I6BAx6U2zm10wBKyL1BFpAb6OfD8y61z8c69Dy4dFPGkE9msxcZMlFNkHFm+TlqfAS 9UKkny8dogVNIPzQP9R9mq9YlLrkyhDVCgskyb0sPjjsMkkfbPUxpouWapsKj937uwHp nbM9h2vFRexOGw0b7JP3AgFakOt77MJag4CSJ60yguVGfDQavJd9O76xPTjgbrcq+QUw RKhyxAHLLY4WV35qnvEKHbyOmuiMG3id8SWJiocgZLMKhm1xlgw+Bw7HbYrqbAjQTGMR C47zDo+vN0MwEirmUX5z6XUOANOhRZ0VJHKxmZMy77w4BK7MfBUlAWdxTdPY1BqJf3m9 F5Og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=uv5yxjHWeGx+AJdbwQSqj4Y1uDvP+yaBUQDlqTuyNZA=; b=rwMwyta+VpYBtHqM0MZ2zTN6mrUbzLr1SXqIIdtiVaB9BEbJqOLnYDB0VX2xyAVvo9 zb8rDUHiT8en2PQoXTRhHxjIcUCIVtZKUxKLliScUggJ96DWbfHPVNPSYmg0amG7zhep UQY92phI6GCZwQLfGQNzrLJ7gEjqcZVNDgg2eTeti8KSEuCSl4nXvvGCissrqDahocKF n10JUIdUEwL8Ux4Ntpr64igKIiYnfi3YFPju9RJU5BZZjRvyxZTef3rbC0eMdXc6NC7o kTh96dGeSMCBlXv8yUgG2PE2Ea2ob5QdxfdyLF5F65tbADV0+HHXruosFQz/Y+xkSppX bIVg== X-Gm-Message-State: ACrzQf0YbGP+XZVxXMg19Sp6Uv3sq4p5yjGcXI9fAnC0ktnJzoGBz2LG rgaHeU1vOwKMo8BHCe4doGA= X-Google-Smtp-Source: AMsMyM4PReTywtWunIeOFMI0KmAyMIImk1H2iypB4z+I83MZ7JOfRcAVjQvzJtBZvb2floc0Os6sPg== X-Received: by 2002:a05:600c:3506:b0:3b4:c086:fa37 with SMTP id h6-20020a05600c350600b003b4c086fa37mr10735538wmq.165.1663610813348; Mon, 19 Sep 2022 11:06:53 -0700 (PDT) Received: from localhost ([77.78.20.135]) by smtp.gmail.com with ESMTPSA id m2-20020a5d6242000000b00228df23bd51sm14487524wrv.82.2022.09.19.11.06.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Sep 2022 11:06:52 -0700 (PDT) From: Iskren Chernev To: Krzysztof Kozlowski , Bjorn Andersson , Rob Herring Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Iskren Chernev , Andy Gross , Konrad Dybcio , Krzysztof Kozlowski , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-kernel@vger.kernel.org Subject: [PATCH v4 8/8] arm64: dts: qcom: sm4250: Add support for oneplus-billie2 Date: Mon, 19 Sep 2022 21:06:18 +0300 Message-Id: <20220919180618.1840194-9-iskren.chernev@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220919180618.1840194-1-iskren.chernev@gmail.com> References: <20220919180618.1840194-1-iskren.chernev@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add initial support for OnePlus Nord N100, based on SM4250. Currently working: - boots - usb - built-in flash storage (UFS) - SD card reader Signed-off-by: Iskren Chernev --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sm4250-oneplus-billie2.dts | 241 ++++++++++++++++++ 2 files changed, 242 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index d7669a7cee9f..2656ef21b943 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -139,6 +139,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-xiaomi-polaris.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-shift-axolotl.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb +dtb-$(CONFIG_ARCH_QCOM) += sm4250-oneplus-billie2.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7225-fairphone-fp4.dtb diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts new file mode 100644 index 000000000000..a3f1c7c41fd7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts @@ -0,0 +1,241 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (c) 2021, Iskren Chernev + */ + +/dts-v1/; + +#include "sm4250.dtsi" + +/ { + model = "OnePlus Nord N100"; + compatible = "oneplus,billie2", "qcom,sm4250"; + + /* required for bootloader to select correct board */ + qcom,msm-id = <0x1a1 0x10000 0x1bc 0x10000>; + qcom,board-id = <0x1000b 0x00>; + + aliases { + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "framebuffer0"; + + framebuffer0: framebuffer@9d400000 { + compatible = "simple-framebuffer"; + reg = <0 0x5c000000 0 (1600 * 720 * 4)>; + width = <720>; + height = <1600>; + stride = <(720 * 4)>; + format = "a8r8g8b8"; + }; + }; +}; + +&reserved_memory { + bootloader_log_mem: memory@5fff7000 { + reg = <0x0 0x5fff7000 0x0 0x8000>; + no-map; + }; + + ramoops@cbe00000 { + compatible = "ramoops"; + reg = <0x0 0xcbe00000 0x0 0x400000>; + record-size = <0x40000>; + pmsg-size = <0x200000>; + console-size = <0x40000>; + ftrace-size = <0x40000>; + }; + + param_mem: memory@cc200000 { + reg = <0x0 0xcc200000 0x0 0x100000>; + no-map; + }; + + mtp_mem: memory@cc300000 { + reg = <0x00 0xcc300000 0x00 0xb00000>; + no-map; + }; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm6125-regulators"; + + vreg_s6a: s6 { + regulator-min-microvolt = <320000>; + regulator-max-microvolt = <1456000>; + }; + + vreg_s7a: s7 { + regulator-min-microvolt = <1280000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_s8a: s8 { + regulator-min-microvolt = <1064000>; + regulator-max-microvolt = <1304000>; + }; + + vreg_l1a: l1 { + regulator-min-microvolt = <952000>; + regulator-max-microvolt = <1152000>; + }; + + vreg_l4a: l4 { + regulator-min-microvolt = <488000>; + regulator-max-microvolt = <1000000>; + }; + + vreg_l5a: l5 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3056000>; + }; + + vreg_l6a: l6 { + regulator-min-microvolt = <576000>; + regulator-max-microvolt = <656000>; + }; + + vreg_l7a: l7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1304000>; + }; + + vreg_l8a: l8 { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <728000>; + }; + + vreg_l9a: l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + }; + + vreg_l10a: l10 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1904000>; + }; + + vreg_l11a: l11 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1952000>; + }; + + vreg_l12a: l12 { + regulator-min-microvolt = <1624000>; + regulator-max-microvolt = <1984000>; + }; + + vreg_l13a: l13 { + regulator-min-microvolt = <1504000>; + regulator-max-microvolt = <1952000>; + }; + + vreg_l14a: l14 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1904000>; + }; + + vreg_l15a: l15 { + regulator-min-microvolt = <2920000>; + regulator-max-microvolt = <3232000>; + }; + + vreg_l16a: l16 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1904000>; + }; + + vreg_l17a: l17 { + regulator-min-microvolt = <1152000>; + regulator-max-microvolt = <1304000>; + }; + + vreg_l18a: l18 { + regulator-min-microvolt = <1104000>; + regulator-max-microvolt = <1304000>; + }; + + vreg_l19a: l19 { + regulator-min-microvolt = <1624000>; + regulator-max-microvolt = <3304000>; + }; + + vreg_l20a: l20 { + regulator-min-microvolt = <1624000>; + regulator-max-microvolt = <3304000>; + }; + + vreg_l21a: l21 { + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3544000>; + }; + + vreg_l22a: l22 { + regulator-min-microvolt = <2952000>; + regulator-max-microvolt = <3304000>; + }; + + vreg_l23a: l23 { + regulator-min-microvolt = <3296000>; + regulator-max-microvolt = <3304000>; + }; + + vreg_l24a: l24 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <3544000>; + }; + }; +}; + +&sleep_clk { + clock-frequency = <32764>; +}; + +&sdhc_2 { + vmmc-supply = <&vreg_l22a>; + vqmmc-supply = <&vreg_l5a>; + + cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>; + + status = "okay"; +}; + +&tlmm { + gpio-reserved-ranges = <14 4>; +}; + +&ufs_mem_hc { + vcc-supply = <&vreg_l24a>; + vcc-max-microamp = <600000>; + vccq2-supply = <&vreg_l11a>; + vccq2-max-microamp = <600000>; + status = "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply = <&vreg_l4a>; + vdda-pll-supply = <&vreg_l12a>; + vddp-ref-clk-supply = <&vreg_l18a>; + status = "okay"; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_hsphy { + vdd-supply = <&vreg_l4a>; + vdda-pll-supply = <&vreg_l12a>; + vdda-phy-dpdm-supply = <&vreg_l15a>; + status = "okay"; +}; + +&xo_board { + clock-frequency = <19200000>; +};