From patchwork Tue Sep 27 06:26:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 12989930 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6CB74C54EE9 for ; Tue, 27 Sep 2022 06:32:50 +0000 (UTC) Received: from localhost ([::1]:36574 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1od491-0005BM-5S for qemu-devel@archiver.kernel.org; Tue, 27 Sep 2022 02:32:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49566) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1od43L-0001wH-8Y for qemu-devel@nongnu.org; Tue, 27 Sep 2022 02:26:48 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:59753) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1od43J-0000Zn-8W for qemu-devel@nongnu.org; Tue, 27 Sep 2022 02:26:46 -0400 Received: from quad ([82.142.8.70]) by mrelayeu.kundenserver.de (mreue106 [212.227.15.183]) with ESMTPSA (Nemesis) id 1M8xsm-1oZBtc46be-0063Pn; Tue, 27 Sep 2022 08:26:35 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Cc: Laurent Vivier , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PULL 1/3] target/m68k: increase size of m68k CPU features from uint32_t to uint64_t Date: Tue, 27 Sep 2022 08:26:31 +0200 Message-Id: <20220927062633.618677-2-laurent@vivier.eu> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220927062633.618677-1-laurent@vivier.eu> References: <20220927062633.618677-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:aWbMteovk0Fsy5K+3nNKLLzndI0uND8TELJqH23Qyhm8WBGB3wR +FspVlHeNFBfr2A8/qxe3t4NYBMET0AbRzZvqoZ7bVOzG72+/87cOcCHXJBoduWUNF5DSoJ KXGGUPHsydj9Zo3ca7wxk72wt9eHMJkD+R0Ah2dm+KEpO6lAOHDIGgciMu3JYUtZemZgWVE QCYtmunn+yRDSqbrww+DA== X-UI-Out-Filterresults: notjunk:1;V03:K0:MCM26cFk0t0=:H9yYOGtNq37ThQ97rO/Y3u a/lX+LY9Br0MDkVAL62K7mg0Ilhr368yBlo/UYHBb+/dd31cOpOSv9yQKwdRMq4vVK+wvsbrI m6L5y52umuitOBw6YuEDMJm4ijsAa1YoSxDbOJheqCXMQvyBd52PdlsyoL6jAKZSJcLutYfhw 47t8i6HFku1kylHfMiNgTSK5fwZZzPeE0z0HsImaVqVqQOjqtQT3nbp//UhlQfKqeWNDFnxd4 fOwrejfXT6QVOnHbfN8gLof9iAL0gXwnmMqhkOJcmUNtg7FzALDKfC8nbC0Uc9scI+LuNMMrV b6YCtOPdeXgF3+bb9450PPtwYqzDQzNFOJCkRQvHAY0mzGwajvlp/zIvxIVfhFRSslSYMms6d 2Wu/C4BLlfkS8eQ/R1Cf1ZvE00W54U82+uFNGpBSJrVJ1YD3P2POXrFpMwGV2ZtWDA656Nh8u thFnzDG2qq41U/i5qYcUchTV7JlcIDnc15ZMOrSWvfYeY1eO11I0o00NIIzT/Z+wrDTHaVyD5 LvPefKzeZcPzNPcnYnOWGZXBq+me1aYP06xXmBXQyNhkcwTYxzEfndquUHpAfuy365j8NEI+i pWw8WsWgTYDp/c1IEZxcgJT848zGwBBw2/WZuLqN7zDhs4pohJl9UgFYXdvfqrUk7Rvm2exKk 2wam6FBaf3998/yaKl4hO4+Zmm8K7lx2xWiz3AvxYXGLg3rXIIDJiiPo81QCDCoJs3NHR9ZcE YacnBtvv3HeoPYxYwRCBMJrHxXzSx/wjmgN3plYIp+M9jQoZzBllsT9kGiA/W0IQllAPRjr/i BlSbNgr Received-SPF: none client-ip=217.72.192.74; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Mark Cave-Ayland There are already 32 feature bits in use, so change the size of the m68k CPU features to uint64_t (along with the associated m68k_feature() functions) to allow up to 64 feature bits to be used. At the same time make use of the BIT_ULL() macro when reading/writing the CPU feature bits to improve readability, and also update m68k_feature() to return a bool rather than an int. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220925134804.139706-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier --- target/m68k/cpu.h | 6 +++--- target/m68k/cpu.c | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 67b6c12c2892..f5c6e95cb44a 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -154,7 +154,7 @@ typedef struct CPUArchState { struct {} end_reset_fields; /* Fields from here on are preserved across CPU reset. */ - uint32_t features; + uint64_t features; } CPUM68KState; /* @@ -539,9 +539,9 @@ enum m68k_features { M68K_FEATURE_TRAPCC, }; -static inline int m68k_feature(CPUM68KState *env, int feature) +static inline bool m68k_feature(CPUM68KState *env, int feature) { - return (env->features & (1u << feature)) != 0; + return (env->features & BIT_ULL(feature)) != 0; } void m68k_cpu_list(void); diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index f681be3a2a58..8d23c72056fd 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -38,12 +38,12 @@ static bool m68k_cpu_has_work(CPUState *cs) static void m68k_set_feature(CPUM68KState *env, int feature) { - env->features |= (1u << feature); + env->features |= BIT_ULL(feature); } static void m68k_unset_feature(CPUM68KState *env, int feature) { - env->features &= (-1u - (1u << feature)); + env->features &= ~BIT_ULL(feature); } static void m68k_cpu_reset(DeviceState *dev) From patchwork Tue Sep 27 06:26:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 12989948 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A3A9BC54EE9 for ; Tue, 27 Sep 2022 07:10:33 +0000 (UTC) Received: from localhost ([::1]:55662 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1od4BA-0007Cn-Hw for qemu-devel@archiver.kernel.org; Tue, 27 Sep 2022 02:34:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38872) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1od43D-0001uK-Ow for qemu-devel@nongnu.org; Tue, 27 Sep 2022 02:26:42 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:55355) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1od43C-0000ZP-1u for qemu-devel@nongnu.org; Tue, 27 Sep 2022 02:26:39 -0400 Received: from quad ([82.142.8.70]) by mrelayeu.kundenserver.de (mreue106 [212.227.15.183]) with ESMTPSA (Nemesis) id 1MXH7g-1okInl1wRK-00YlRz; Tue, 27 Sep 2022 08:26:35 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Cc: Laurent Vivier , Mark Cave-Ayland , Richard Henderson Subject: [PULL 2/3] target/m68k: use M68K_FEATURE_MOVEFROMSR_PRIV feature for move_from_sr privilege check Date: Tue, 27 Sep 2022 08:26:32 +0200 Message-Id: <20220927062633.618677-3-laurent@vivier.eu> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220927062633.618677-1-laurent@vivier.eu> References: <20220927062633.618677-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:QjL1m1fsxNqQUN6vmn7GKig/flH15DYtQMz7TRZP/pJOhrX+ef0 d/2gCw3PTnzEnJqaKRKHcz+xQxa0VQrMzG2mUSSx9m9y2HFxWhronH2EB1+krzb1jqWPRQb SJu9mX0OIqnf/rvuPvrCMqiTksIR2kQ1P5MdXMfOOosrEdKd83o4fEj8ED+Qjp7m3cK15Go pdMHoyEcVh0DsELo0Tdsg== X-UI-Out-Filterresults: notjunk:1;V03:K0:h+3HM1+H3do=:iGQnpFcB5lEB9I6FLirnrz rp8mSNtgWQ8hB3kR9xQYViUoPTAF5skdna9RX9CDx2zsAhym3L5o/xWBF6FpHCXW5iAYWValk /1gyFqSPH6+ZAQFivBFn010RNo7YdCcUl3cgfF9LLwbS5nfIl9UtyxKV23cca2AKNajjJjQ7Y zrXyv9kEaO+sW/wNHs9mHIe5KPkEJ/rjoVVmCON9ti72nzWGiOrEijIbVxNI0v2mvV/fXr232 rG0oqERkzxgotMD0mfwIAmvmkDfr2SuTtVl78c9XEqSD0mihatWBwvZ1FPjVmgN6RbbtlNQjf oZO3kVjo4mRiDr8QCODHixKgGhlOkJ1ZiF/lI2HUT0q3BbT/+28mix67p4uPWDdxnOCLPc26U ASOWwK/d6LitydwvoZEZ9moW6cwBUsYa5aCpaa2yDcAzhaNPbPtpNfDzJgT5wVxi4LlHB8Cmj Vujtl9lgAKTvTLi0PZf3+TbpjZq7bXSjIs9fBaQWN7AUpzbxi6dt+6zNzjMxrgZ3mpUKiAlJQ UTGpKpUmo3hBqCyMXC4ZAoT6xOUl9qDnp+EuGA4ZYIIoIrqCEvg1oJVWWVNhnzR5XXRB4OOMs E7Kin97vmrbAGGhpKoSJdoaa9mVpzDfb5+gnxaQAwpHVK5/5XKyTkFoRXYfFv84pdkDfxEWe0 z3LGOwcjVRCopFqRHR57+XCGF/LemY0ffhprY7IXyttOCn5MnTK6TJ3fMD3nOf6kPVw8Wc1nc LGhFWei7fRTqXibZUhMSdoqTsVn5qOiIuX69bE9EG7VxehFMXx0USNv//y3Ghqx/FQUb0A8FZ 35vTRLx Received-SPF: none client-ip=212.227.17.13; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Mark Cave-Ayland Now that M68K_FEATURE_M68000 has been renamed to M68K_FEATURE_M68K it is easier to see that the privilege exception check is wrong: it is currently only generated for ColdFire CPUs when in fact it should also be generated for Motorola CPUs from the 68010 onwards. Introduce a new M68K_FEATURE_MOVEFROMSR_PRIV feature which is set for all non- Motorola CPUs, and for all Motorola CPUs from the 68010 onwards and use it to determine whether a privilege exception should be generated for the MOVE-from-SR instruction. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Message-Id: <20220925134804.139706-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier --- target/m68k/cpu.h | 2 ++ target/m68k/cpu.c | 5 +++++ target/m68k/translate.c | 2 +- 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index f5c6e95cb44a..3a9cfe2f33a7 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -537,6 +537,8 @@ enum m68k_features { M68K_FEATURE_UNALIGNED_DATA, /* TRAPcc insn. (680[2346]0, and CPU32) */ M68K_FEATURE_TRAPCC, + /* MOVE from SR privileged (from 68010) */ + M68K_FEATURE_MOVEFROMSR_PRIV, }; static inline bool m68k_feature(CPUM68KState *env, int feature) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 8d23c72056fd..25d610db21f7 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -102,6 +102,7 @@ static void m5206_cpu_initfn(Object *obj) CPUM68KState *env = &cpu->env; m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } /* Base feature set, including isns. for m68k family */ @@ -129,6 +130,7 @@ static void m68010_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_RTD); m68k_set_feature(env, M68K_FEATURE_BKPT); m68k_set_feature(env, M68K_FEATURE_MOVEC); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } /* @@ -241,6 +243,7 @@ static void m5208_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_BRAL); m68k_set_feature(env, M68K_FEATURE_CF_EMAC); m68k_set_feature(env, M68K_FEATURE_USP); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } static void cfv4e_cpu_initfn(Object *obj) @@ -254,6 +257,7 @@ static void cfv4e_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_CF_FPU); m68k_set_feature(env, M68K_FEATURE_CF_EMAC); m68k_set_feature(env, M68K_FEATURE_USP); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } static void any_cpu_initfn(Object *obj) @@ -275,6 +279,7 @@ static void any_cpu_initfn(Object *obj) m68k_set_feature(env, M68K_FEATURE_USP); m68k_set_feature(env, M68K_FEATURE_EXT_FULL); m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); + m68k_set_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV); } static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 233b9d8e5783..9df17aa4b2d8 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4624,7 +4624,7 @@ DISAS_INSN(move_from_sr) { TCGv sr; - if (IS_USER(s) && !m68k_feature(env, M68K_FEATURE_M68K)) { + if (IS_USER(s) && m68k_feature(env, M68K_FEATURE_MOVEFROMSR_PRIV)) { gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } From patchwork Tue Sep 27 06:26:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 12989938 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 792F1C54EE9 for ; Tue, 27 Sep 2022 06:54:59 +0000 (UTC) Received: from localhost ([::1]:37410 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1od4Uc-0005RS-Az for qemu-devel@archiver.kernel.org; Tue, 27 Sep 2022 02:54:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49564) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1od43L-0001w5-33 for qemu-devel@nongnu.org; Tue, 27 Sep 2022 02:26:47 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:54375) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1od43J-0000Zp-Az for qemu-devel@nongnu.org; Tue, 27 Sep 2022 02:26:46 -0400 Received: from quad ([82.142.8.70]) by mrelayeu.kundenserver.de (mreue106 [212.227.15.183]) with ESMTPSA (Nemesis) id 1MsIbU-1pVRqr40C2-00tmNj; Tue, 27 Sep 2022 08:26:36 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Cc: Laurent Vivier , "Jason A. Donenfeld" , Geert Uytterhoeven Subject: [PULL 3/3] m68k: align bootinfo strings and data to 4 bytes Date: Tue, 27 Sep 2022 08:26:33 +0200 Message-Id: <20220927062633.618677-4-laurent@vivier.eu> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220927062633.618677-1-laurent@vivier.eu> References: <20220927062633.618677-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:3ErU7WZ+VCtw2Nrh78zJjF00pjkF9lhcFj3/H4Nt5gHwv5PmokS HcKLJwiIRFLLIqSsHugL0WaR/ML3oZYGrmVDWiocSJohbTJkjG+Y/SWEqBL5Xh5XZzEg+zk GdT9eiM7JIpRk//HmZjYOebbPpsqGFOw5XjzjV5MvjoZ3iInFhCXJJ7MI+euipo6nXE8BHJ w68YeW81I4csB01pCyDEw== X-UI-Out-Filterresults: notjunk:1;V03:K0:zepAkP3MoQ8=:t7v1204TtVkQ7ZLEXIi6uO NGz6IosjTP0ObSMMg/hGRLH8cCUiWDwUf0YkiH9GJxXMiML1XqmFCFdYFeN080HrH4NmjDEZc 0kP3x2cCRN1n0Io45FxGutrwms3Z7qGOyuYv9Tcmth/LknOyJaFml59MexX5js78jva1io7BZ 8kgawUpCAylXhe+kov/UWUHjUSzcqIAyllllA/MPac9KwVNqsn55/WH5Z3KKjMJa59Ng1tfBs WLEioOJLRH8XVFmRGslfMPeuLruUXu5r2S939cBTmrUD2cz5Qgvg+dMwMhl5+5Ag8B20Eoszb 139hgL18kiZS/LRp0Ye8eF43uooA8WQ7OWvfW0SyVn4cje46Vq6y1erWe6x0qxlNEDuonOLl2 zwD5aG78k598OMfiGX3A5pjPgd31bFuJlSBgG2+oR4dyuv8B1ptVVTK7HyzBEFEnIv85MYjq7 YdmWCZIjEObEDO3HXtsseBgRwTH2Wnxsyj8I9msJKFQ8QKDDfbI8KVT5TxlxiUZG2NMzTp6AD 5c4mxnwnyhxdz25pqJcJw3JPmnuqDyRjjLUjpHDo79TxNMAA6cTrR98ZEt2z9JBpNiPppNB3C 9Oeb+T2sxvMejZ0kmX9PzXDk8nkCNtWJfv8ry3QOAcZi+e+tjySwCzxhr45PRMv7oR5zdilb3 /6L907ka3VYMiIg2mKwnoDG+3FonFqmSDs3cVH10TXu60X2y7UcyGQNFU4UYLR5Vtv0Srf7he 4lmhTIEC3DKnlyCEo2XZlApHE/jOU5rALHCTO5+WYRM6FiA4mnjXyAJ2Sk34t9A50SZ4sWQ7o qwuLXyI Received-SPF: none client-ip=212.227.17.13; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: "Jason A. Donenfeld" Various tools, such as kexec-tools and m68k-bootinfo, expect each bootinfo entry to be aligned to 4 bytes, not 2 bytes. So adjust the padding to fill this out as such. Also, break apart the padding additions from the other field length additions, so that it's more clear why these magic numbers are being added, and comment them too. Reported-by: Geert Uytterhoeven Cc: Laurent Vivier Signed-off-by: Jason A. Donenfeld Reviewed-by: Laurent Vivier Message-Id: <20220926113900.1256630-2-Jason@zx2c4.com> Signed-off-by: Laurent Vivier --- hw/m68k/bootinfo.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/m68k/bootinfo.h b/hw/m68k/bootinfo.h index bd8b212fd35c..897162b8189c 100644 --- a/hw/m68k/bootinfo.h +++ b/hw/m68k/bootinfo.h @@ -48,13 +48,14 @@ stw_phys(as, base, id); \ base += 2; \ stw_phys(as, base, \ - (sizeof(struct bi_record) + strlen(string) + 2) & ~1); \ + (sizeof(struct bi_record) + strlen(string) + \ + 1 /* null termination */ + 3 /* padding */) & ~3); \ base += 2; \ for (i = 0; string[i]; i++) { \ stb_phys(as, base++, string[i]); \ } \ stb_phys(as, base++, 0); \ - base = (base + 1) & ~1; \ + base = (base + 3) & ~3; \ } while (0) #define BOOTINFODATA(as, base, id, data, len) \ @@ -63,13 +64,14 @@ stw_phys(as, base, id); \ base += 2; \ stw_phys(as, base, \ - (sizeof(struct bi_record) + len + 3) & ~1); \ + (sizeof(struct bi_record) + len + \ + 2 /* length field */ + 3 /* padding */) & ~3); \ base += 2; \ stw_phys(as, base, len); \ base += 2; \ for (i = 0; i < len; ++i) { \ stb_phys(as, base++, data[i]); \ } \ - base = (base + 1) & ~1; \ + base = (base + 3) & ~3; \ } while (0) #endif