From patchwork Tue Sep 27 22:53:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991442 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86EC1C07E9D for ; Tue, 27 Sep 2022 22:54:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229508AbiI0WyK (ORCPT ); Tue, 27 Sep 2022 18:54:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229698AbiI0WyJ (ORCPT ); Tue, 27 Sep 2022 18:54:09 -0400 Received: from mail-ot1-x331.google.com (mail-ot1-x331.google.com [IPv6:2607:f8b0:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2325B6D1D for ; Tue, 27 Sep 2022 15:54:06 -0700 (PDT) Received: by mail-ot1-x331.google.com with SMTP id u6-20020a056830118600b006595e8f9f3fso7219455otq.1 for ; Tue, 27 Sep 2022 15:54:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=FABGJYCg3ML5damim2lrDVnvSH7cs9gN7anGIiw2miY=; b=KYLRla7aDnN2wRrqTO6KznEiaHoXVbwq3uDT4QhGcRcNppVEti4QTVI5pbd+4KLDMc IuT/7/diP06j3IMOdtX4shrhYTUmoVwNzQBK4r0fbZIPyiVcrLSRfqet/R7Pu8KNyhtn lD2tyL4RXhkg0026erfE4FmgFqtK26if9VH7UUtPn/Q6hexEI3QIE3VRsGzX7RMWwAMS M5mIb0qLX83a6oSSFRZW2sK8bH4BOQV7ezsX5ubn99rd1dACcHGCGZf96rjovWlDvPKL ltfb5ChnJVVz0GIJlpgfTmQuO6AgwJN0AgvFyJwFex04LH7kYFHuko506NlUcaHJcMjz RpFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=FABGJYCg3ML5damim2lrDVnvSH7cs9gN7anGIiw2miY=; b=N13iz03b5rirozKV1pqISEJmBo3mrDki6q+P1n6+5Uu40+/6XE187xqD7UoerrectL BHbp/ikhb7amdfFRlqar7vWcNUNIvb2+WN7/NkvxNJmZ/z0yJnPkNR3tVyDYEWjJMjFR I5iJFWRWzdnJCFcWo0VVhJmlEn1YoEHrIHOeFY8qygL45yxEyfNNTTMMkt2hQ01qSMNd B/mftiz6egU2sd+/Ep1GsSqVAsvuQnyVVWVEvS+QaAz6lPGlSc1xtLYqFYhzLYMXPHr6 9fk+mn2JBhiPBo+8vz3rH5XcuNXYRu4J5z2e8K155yfY+dng+dfBTVW45oe+KdCLYG6z dUNQ== X-Gm-Message-State: ACrzQf1FK7UYq2ihjReYYxud07EE7JoiBFdMg4NAgVhP8TUAVE18FqqI PfLD59PveScoCL5Tia94KElZHQ== X-Google-Smtp-Source: AMsMyM4/MYi36gmiNKFEawuClnRfbQKVdX5Hyt+75WAoVzUCyY14nDCQNUfNc+1bGsk6lK8HO2Z5Jw== X-Received: by 2002:a05:6830:4129:b0:658:772:afe6 with SMTP id w41-20020a056830412900b006580772afe6mr13128911ott.307.1664319246318; Tue, 27 Sep 2022 15:54:06 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:06 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, William Breathitt Gray Subject: [PATCH 01/12] MAINTAINERS: Update Counter subsystem git tree repo link Date: Tue, 27 Sep 2022 18:53:35 -0400 Message-Id: <075c91bb0af32d27a139112701b12b118a50edd6.1664318353.git.william.gray@linaro.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Counter subsystem git tree is now located on the kernel.org git server. Signed-off-by: William Breathitt Gray --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 8a5012ba6ff9..d4999f68bda8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5289,7 +5289,7 @@ COUNTER SUBSYSTEM M: William Breathitt Gray L: linux-iio@vger.kernel.org S: Maintained -T: git https://git.linaro.org/people/william.gray/counter.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/wbg/counter.git F: Documentation/ABI/testing/sysfs-bus-counter F: Documentation/driver-api/generic-counter.rst F: drivers/counter/ From patchwork Tue Sep 27 22:53:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991444 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84BD0C6FA82 for ; Tue, 27 Sep 2022 22:54:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229698AbiI0WyM (ORCPT ); Tue, 27 Sep 2022 18:54:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40732 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229885AbiI0WyJ (ORCPT ); Tue, 27 Sep 2022 18:54:09 -0400 Received: from mail-oi1-x22a.google.com (mail-oi1-x22a.google.com [IPv6:2607:f8b0:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60B96CF4B3 for ; Tue, 27 Sep 2022 15:54:08 -0700 (PDT) Received: by mail-oi1-x22a.google.com with SMTP id n83so13502455oif.11 for ; Tue, 27 Sep 2022 15:54:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=MciPEz9A5X8un10orFZOdn2x2fMP8cVDFasDSDZI7dY=; b=UOGXpIJdGLTKuc4WhjDl9BaPNQIzoYXK/7LFnj4gQqkgtz6tec+aHbSh4vB7H/1vgj Iba2pTjfRZx6DLn0NIzuxl4wTQoFcrU3o134LMBs67kNbliaftzwzuTJ3MxJaHrk36Jf 7joJVbAsxPkCs7s9bUQl9HMG9C0x7GxfW1HJUhNhNMqQRUGWCyzpPcsefvsdytZYpMjx HsqQxEQVJBtC3XKd2/43RU6W18QwXA2PmxHtXR8clQdeD6BKdzx3N7OxW+6ZCKtrswvN VqdcUWuJIOwqr35Rv1UrvNkfzzOp1wRdoZVimbE1zgnBi9XFpKUCRErZsO1hLbg33ubN pjSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=MciPEz9A5X8un10orFZOdn2x2fMP8cVDFasDSDZI7dY=; b=4+2hsisyEvJ8JStmtnyMppHzY64PzeaB+h6nm9HCNqDnlpNCxuAAaBaMIaQ3l/OvFI 4EnjvoP97rdO3fJbriqnsbqQJRArXGDBZ+ShlrE+JkOJsDdfjmL4s5cG1+DsE6ZGWgea ktbx8nwf8X0zPor7SOYgKWuATpHetNsdU+caNqlSDosFgPOG2wGhQnM78ZAMgMqkVv4b E9PN7JE1t41xYfAfLsHScLeyAuxurZ6wVSRThZKHXqfXgS+U/KZ8y7BLTFotBXzDa9hV bky2QyojxPSbS+qw++dIQXsaethQDftHPb/xHXSRPn0Xzoa/Ri9OKdACZcgRtjgH/sMJ aj9Q== X-Gm-Message-State: ACrzQf0r4EL8Gq93lWtYvtQHOfSdkX5pN+At2BRYNdbEzSS7xF5o8fpT DcrvCzBEjyE/x35U+/+kta01Ew== X-Google-Smtp-Source: AMsMyM5q5EX57vdlDSLmulutwEHiiMyt/d10izxitUTWY1s+0nGr7U/9MBccGRmZb3LPv994mEsDmA== X-Received: by 2002:a05:6808:30a8:b0:350:2323:ef2e with SMTP id bl40-20020a05680830a800b003502323ef2emr2837890oib.38.1664319247649; Tue, 27 Sep 2022 15:54:07 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:07 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, William Breathitt Gray , Patrick Havelange , Jarkko Nikula , Oleksij Rempel , Pengutronix Kernel Team , Kamel Bouhara , Fabrice Gasnier , Maxime Coquelin , Alexandre Torgue , David Lechner , Jonathan Cameron Subject: [PATCH 02/12] counter: Move symbols into COUNTER namespace Date: Tue, 27 Sep 2022 18:53:36 -0400 Message-Id: <8a756df96c24946547a7ece5caa5f654809c5e7f.1664318353.git.william.gray@linaro.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Counter subsystem symbols are only relevant to counter drivers. A COUNTER namespace is created to control the availability of these symbols to modules that import this namespace explicitly. Cc: Patrick Havelange Cc: Jarkko Nikula Cc: Oleksij Rempel Cc: Pengutronix Kernel Team Cc: Kamel Bouhara Cc: Fabrice Gasnier Cc: Maxime Coquelin Cc: Alexandre Torgue Acked-by: David Lechner Reviewed-by: Jonathan Cameron Link: https://lore.kernel.org/r/20220815220321.74161-1-william.gray@linaro.org/ Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 1 + drivers/counter/counter-chrdev.c | 2 +- drivers/counter/counter-core.c | 14 +++++++------- drivers/counter/ftm-quaddec.c | 1 + drivers/counter/intel-qep.c | 1 + drivers/counter/interrupt-cnt.c | 1 + drivers/counter/microchip-tcb-capture.c | 1 + drivers/counter/stm32-lptimer-cnt.c | 1 + drivers/counter/stm32-timer-cnt.c | 1 + drivers/counter/ti-eqep.c | 1 + 10 files changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index 62c2b7ac4339..1323edfbe40c 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -1241,3 +1241,4 @@ module_isa_driver(quad8_driver, num_quad8); MODULE_AUTHOR("William Breathitt Gray "); MODULE_DESCRIPTION("ACCES 104-QUAD-8 driver"); MODULE_LICENSE("GPL v2"); +MODULE_IMPORT_NS(COUNTER); diff --git a/drivers/counter/counter-chrdev.c b/drivers/counter/counter-chrdev.c index 69d340be9c93..4e71a19d7e6a 100644 --- a/drivers/counter/counter-chrdev.c +++ b/drivers/counter/counter-chrdev.c @@ -574,4 +574,4 @@ void counter_push_event(struct counter_device *const counter, const u8 event, if (copied) wake_up_poll(&counter->events_wait, EPOLLIN); } -EXPORT_SYMBOL_GPL(counter_push_event); +EXPORT_SYMBOL_NS_GPL(counter_push_event, COUNTER); diff --git a/drivers/counter/counter-core.c b/drivers/counter/counter-core.c index 938651f9e9e0..09c77afb33ca 100644 --- a/drivers/counter/counter-core.c +++ b/drivers/counter/counter-core.c @@ -73,7 +73,7 @@ void *counter_priv(const struct counter_device *const counter) return &ch->privdata; } -EXPORT_SYMBOL_GPL(counter_priv); +EXPORT_SYMBOL_NS_GPL(counter_priv, COUNTER); /** * counter_alloc - allocate a counter_device @@ -133,13 +133,13 @@ struct counter_device *counter_alloc(size_t sizeof_priv) return NULL; } -EXPORT_SYMBOL_GPL(counter_alloc); +EXPORT_SYMBOL_NS_GPL(counter_alloc, COUNTER); void counter_put(struct counter_device *counter) { put_device(&counter->dev); } -EXPORT_SYMBOL_GPL(counter_put); +EXPORT_SYMBOL_NS_GPL(counter_put, COUNTER); /** * counter_add - complete registration of a counter @@ -166,7 +166,7 @@ int counter_add(struct counter_device *counter) /* implies device_add(dev) */ return cdev_device_add(&counter->chrdev, dev); } -EXPORT_SYMBOL_GPL(counter_add); +EXPORT_SYMBOL_NS_GPL(counter_add, COUNTER); /** * counter_unregister - unregister Counter from the system @@ -188,7 +188,7 @@ void counter_unregister(struct counter_device *const counter) mutex_unlock(&counter->ops_exist_lock); } -EXPORT_SYMBOL_GPL(counter_unregister); +EXPORT_SYMBOL_NS_GPL(counter_unregister, COUNTER); static void devm_counter_release(void *counter) { @@ -223,7 +223,7 @@ struct counter_device *devm_counter_alloc(struct device *dev, size_t sizeof_priv return counter; } -EXPORT_SYMBOL_GPL(devm_counter_alloc); +EXPORT_SYMBOL_NS_GPL(devm_counter_alloc, COUNTER); /** * devm_counter_add - complete registration of a counter @@ -244,7 +244,7 @@ int devm_counter_add(struct device *dev, return devm_add_action_or_reset(dev, devm_counter_release, counter); } -EXPORT_SYMBOL_GPL(devm_counter_add); +EXPORT_SYMBOL_NS_GPL(devm_counter_add, COUNTER); #define COUNTER_DEV_MAX 256 diff --git a/drivers/counter/ftm-quaddec.c b/drivers/counter/ftm-quaddec.c index 2a58582a9df4..aea6622a9b13 100644 --- a/drivers/counter/ftm-quaddec.c +++ b/drivers/counter/ftm-quaddec.c @@ -325,3 +325,4 @@ module_platform_driver(ftm_quaddec_driver); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Kjeld Flarup "); MODULE_AUTHOR("Patrick Havelange "); +MODULE_IMPORT_NS(COUNTER); diff --git a/drivers/counter/intel-qep.c b/drivers/counter/intel-qep.c index 47a6a9dfc9e8..af5942e66f7d 100644 --- a/drivers/counter/intel-qep.c +++ b/drivers/counter/intel-qep.c @@ -523,3 +523,4 @@ MODULE_AUTHOR("Jarkko Nikula "); MODULE_AUTHOR("Raymond Tan "); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("Intel Quadrature Encoder Peripheral driver"); +MODULE_IMPORT_NS(COUNTER); diff --git a/drivers/counter/interrupt-cnt.c b/drivers/counter/interrupt-cnt.c index 3b13f56bbb11..5a11b65fc0e5 100644 --- a/drivers/counter/interrupt-cnt.c +++ b/drivers/counter/interrupt-cnt.c @@ -242,3 +242,4 @@ MODULE_ALIAS("platform:interrupt-counter"); MODULE_AUTHOR("Oleksij Rempel "); MODULE_DESCRIPTION("Interrupt counter driver"); MODULE_LICENSE("GPL v2"); +MODULE_IMPORT_NS(COUNTER); diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c index 00844445143b..f9dee15d9777 100644 --- a/drivers/counter/microchip-tcb-capture.c +++ b/drivers/counter/microchip-tcb-capture.c @@ -394,3 +394,4 @@ module_platform_driver(mchp_tc_driver); MODULE_AUTHOR("Kamel Bouhara "); MODULE_DESCRIPTION("Microchip TCB Capture driver"); MODULE_LICENSE("GPL v2"); +MODULE_IMPORT_NS(COUNTER); diff --git a/drivers/counter/stm32-lptimer-cnt.c b/drivers/counter/stm32-lptimer-cnt.c index 68031d93ce89..d6b80b6dfc28 100644 --- a/drivers/counter/stm32-lptimer-cnt.c +++ b/drivers/counter/stm32-lptimer-cnt.c @@ -520,3 +520,4 @@ MODULE_AUTHOR("Fabrice Gasnier "); MODULE_ALIAS("platform:stm32-lptimer-counter"); MODULE_DESCRIPTION("STMicroelectronics STM32 LPTIM counter driver"); MODULE_LICENSE("GPL v2"); +MODULE_IMPORT_NS(COUNTER); diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c index 5779ae7c73cf..9bf20a5d6bda 100644 --- a/drivers/counter/stm32-timer-cnt.c +++ b/drivers/counter/stm32-timer-cnt.c @@ -417,3 +417,4 @@ MODULE_AUTHOR("Benjamin Gaignard "); MODULE_ALIAS("platform:stm32-timer-counter"); MODULE_DESCRIPTION("STMicroelectronics STM32 TIMER counter driver"); MODULE_LICENSE("GPL v2"); +MODULE_IMPORT_NS(COUNTER); diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c index 0489d26eb47c..b0f24cf3e891 100644 --- a/drivers/counter/ti-eqep.c +++ b/drivers/counter/ti-eqep.c @@ -456,3 +456,4 @@ module_platform_driver(ti_eqep_driver); MODULE_AUTHOR("David Lechner "); MODULE_DESCRIPTION("TI eQEP counter driver"); MODULE_LICENSE("GPL v2"); +MODULE_IMPORT_NS(COUNTER); From patchwork Tue Sep 27 22:53:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991443 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54880C6FA86 for ; Tue, 27 Sep 2022 22:54:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229885AbiI0WyM (ORCPT ); Tue, 27 Sep 2022 18:54:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40740 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230057AbiI0WyK (ORCPT ); Tue, 27 Sep 2022 18:54:10 -0400 Received: from mail-oa1-x2b.google.com (mail-oa1-x2b.google.com [IPv6:2001:4860:4864:20::2b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 397B9D33E6 for ; Tue, 27 Sep 2022 15:54:09 -0700 (PDT) Received: by mail-oa1-x2b.google.com with SMTP id 586e51a60fabf-127dca21a7dso15173568fac.12 for ; Tue, 27 Sep 2022 15:54:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=CASul9xD5hbR16hfyabPe4DssXGCvdhANQEzN1uO2aU=; b=lLC0mISCXqkmcF2cq00mcBUcVLE3is7bnBMh6HG5uDGz9PKT2E+e6p14KLL5npZXWE Uu9Gteo1jaIwu0yAO5yollSG5pvGhFWOxnDZqFyVl45sAltIh1nzKXv7k3QmXkI+Ls6D LcxiO13rdyYG5iOEZ08j8BUWS9NhFHcNa1uO5RHPqAivr1kqumYx+QP1KL1812Wc3iF7 vJpvzD9Rjh9I/pKpPhl4Qu9Jyhoy/9VvCRXF0S/P2vfMOhxaRxUbBQA4cb8H9MAGxQAP 3yT6fMhoQStH0bA+mGrXQi6NBzI3mHqtouZPST9t+S3H7WcWfJNRGCRAIYRi1G/zOVZh XYow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=CASul9xD5hbR16hfyabPe4DssXGCvdhANQEzN1uO2aU=; b=MrW1PFioYJFCMtwJKXT+pi/rcBSMKgSzvcRwu+GkO7TjoaGc5LUCPu0NDj3TiyjooE BlfBTXN5qaMjGCxU9E61A78O3jSbtxOcFhycp/ov6NbIRSCj+vxCbV4TpE0C0yGsUsRT FgvByvwc9cLQDfPedFIOWCeR+uxZm3A2d3oXV/c5J6fBu2aqyC9Sw3QB+Agnn+pUgl2D GYt1XEQ6M5hBNDGdEAYYnhCgR6kX7fDuaK/V/BWqsqLmFf9fywaGRIqQM0TEChnjNjvE Y3CjYncuJMN4vOjuQpgefH3LTHHXKRCrC4nPBc53hAToE/7F4HK4BNn9y/VytqWupYmj Mwgg== X-Gm-Message-State: ACrzQf0r7l/Kut02ShCYSbCa2VHwbfp4Nd/p/FX7sY7c7CXhSM1UqcQg CM/f0vqzV0ZyAT0PRdaTXMFt/w== X-Google-Smtp-Source: AMsMyM5PfY0Qpv11R+4yzxhnqq9pMVxuPT73uJ8j0dgfS3QWO9kv+1MrP4qzrncv66RyTVgN3z69dQ== X-Received: by 2002:a05:6870:ecab:b0:131:8c96:a1e with SMTP id eo43-20020a056870ecab00b001318c960a1emr2485114oab.122.1664319248511; Tue, 27 Sep 2022 15:54:08 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:08 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, William Breathitt Gray , Oleksij Rempel , Pengutronix Kernel Team Subject: [PATCH 03/12] counter: interrupt-cnt: Implement watch_validate callback Date: Tue, 27 Sep 2022 18:53:37 -0400 Message-Id: X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The interrupt-cnt counter driver only pushes one type of event on only one channel: COUNTER_EVENT_CHANGE_OF_STATE on channel 0. The interrupt_cnt_watch_validate() watch_valid callback is implemented to ensure watch configurations are valid for this driver. Cc: Oleksij Rempel Cc: Pengutronix Kernel Team Link: https://lore.kernel.org/r/20220815225058.144203-1-william.gray@linaro.org/ Signed-off-by: William Breathitt Gray --- drivers/counter/interrupt-cnt.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/counter/interrupt-cnt.c b/drivers/counter/interrupt-cnt.c index 5a11b65fc0e5..229473855c5b 100644 --- a/drivers/counter/interrupt-cnt.c +++ b/drivers/counter/interrupt-cnt.c @@ -139,12 +139,23 @@ static int interrupt_cnt_signal_read(struct counter_device *counter, return 0; } +static int interrupt_cnt_watch_validate(struct counter_device *counter, + const struct counter_watch *watch) +{ + if (watch->channel != 0 || + watch->event != COUNTER_EVENT_CHANGE_OF_STATE) + return -EINVAL; + + return 0; +} + static const struct counter_ops interrupt_cnt_ops = { .action_read = interrupt_cnt_action_read, .count_read = interrupt_cnt_read, .count_write = interrupt_cnt_write, .function_read = interrupt_cnt_function_read, .signal_read = interrupt_cnt_signal_read, + .watch_validate = interrupt_cnt_watch_validate, }; static int interrupt_cnt_probe(struct platform_device *pdev) From patchwork Tue Sep 27 22:53:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991445 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF4BBC07E9D for ; Tue, 27 Sep 2022 22:54:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230057AbiI0WyN (ORCPT ); Tue, 27 Sep 2022 18:54:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231139AbiI0WyL (ORCPT ); Tue, 27 Sep 2022 18:54:11 -0400 Received: from mail-oi1-x235.google.com (mail-oi1-x235.google.com [IPv6:2607:f8b0:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2005D58B4 for ; Tue, 27 Sep 2022 15:54:09 -0700 (PDT) Received: by mail-oi1-x235.google.com with SMTP id q10so5961600oib.5 for ; Tue, 27 Sep 2022 15:54:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=EWZt9wTa1gBSeOt9hkCnvFAqrX72cr1OInLn1L4w82c=; b=ZyCfgiM5VphrMbZsIxUOXbKFZugEVb6ITgbFCecABu7a4OogTIlVoKqhrdy0hVJ9Te tRRV1I4g06WViehAxRsKHoiQsBytV+8f6sNWuHZ0rvtRmQbfyyHYNh93Ru1KPyJaf0Ii 2Y/Sy3fsgVgrk4jhg6npfBbKHytKRtyNcUc4wc2cXmgeOC72a7MuJ8/YMPs463tu9EXr BZ18meWJUPU9UbHhWQs43SZRpVdiUCBDj0lna1BYa0Opn83TOt1NXqWrNXPEd0A/Ll88 a5SS0TO8rGcyaSYzeTyKKmajgCgtg+Lpt6WmjJ96MaGtJBuzDhh688nXDLDdwbT41i7t Kbqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=EWZt9wTa1gBSeOt9hkCnvFAqrX72cr1OInLn1L4w82c=; b=g07W4FtuJSNe2OGVAe3km5Be8/pMWOu2r6wC0xuqLPJlOtgZBbVPoG4PAqRVEY9g5O X+dOdHJB6Ddau6+7K2olD36ONG4SwtcC777PxrqRwYsylp0OL7+z8F64UZ9puFulUOkf gQIAuQAICWdBmsIGw4Va8JD5+H+1OToTR0R/Wf8204bsppT3WVc4tE3Eu4jrorD9+m6m ZCK4WpW2XIQMRkYcVcu2NTjwsgyL6D+aLxD0un8sIlHpVuKfMP6ZSlYqzBf6dN0oEZv/ E3RMfcvv85WXtca99z7jA9pCy1MuZGmVtQVgr1Do/1k7iu3bPlOu+mPPlyl9jF0C7vI6 exoQ== X-Gm-Message-State: ACrzQf3p9BL9zdlFow05DnAAX0+pRuL27eotR7eT8idcRueymQKZBajU OiSYror5ePPDiwqbjEtFL/SsLA== X-Google-Smtp-Source: AMsMyM4aMBTSh1rc+5Jb5V4O8xWxdipxUDj783rvJbMkw52jrFRGwmXENKZP8QsEqriKCihW2MSzHA== X-Received: by 2002:a05:6808:1391:b0:350:e93b:a4b4 with SMTP id c17-20020a056808139100b00350e93ba4b4mr2899020oiw.199.1664319249225; Tue, 27 Sep 2022 15:54:09 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:09 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, William Breathitt Gray , Julien Panis Subject: [PATCH 04/12] counter: Introduce the Signal polarity component Date: Tue, 27 Sep 2022 18:53:38 -0400 Message-Id: X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Signal polarity component represents the active level of a respective Signal. There are two possible states: positive (rising edge) and negative (falling edge); enum counter_signal_polarity represents these states. A convenience macro COUNTER_COMP_POLARITY() is provided for driver authors to declare a Signal polarity component. Cc: Julien Panis Link: https://lore.kernel.org/r/8f47d6e1db71a11bb1e2666f8e2a6e9d256d4131.1664204990.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray --- Documentation/ABI/testing/sysfs-bus-counter | 14 ++++++++++++++ drivers/counter/counter-chrdev.c | 1 + drivers/counter/counter-sysfs.c | 12 ++++++++++++ include/linux/counter.h | 10 ++++++++++ include/uapi/linux/counter.h | 6 ++++++ 5 files changed, 43 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index 06c2b3e27e0b..2a996deabe9e 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -217,6 +217,7 @@ What: /sys/bus/counter/devices/counterX/signalY/cable_fault_component_id What: /sys/bus/counter/devices/counterX/signalY/cable_fault_enable_component_id What: /sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler_component_id What: /sys/bus/counter/devices/counterX/signalY/index_polarity_component_id +What: /sys/bus/counter/devices/counterX/signalY/polarity_component_id What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_component_id KernelVersion: 5.16 Contact: linux-iio@vger.kernel.org @@ -303,6 +304,19 @@ Description: Discrete set of available values for the respective Signal Y configuration are listed in this file. +What: /sys/bus/counter/devices/counterX/signalY/polarity +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Active level of Signal Y. The following polarity values are + available: + + positive: + Signal high state considered active level (rising edge). + + negative: + Signal low state considered active level (falling edge). + What: /sys/bus/counter/devices/counterX/signalY/name KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org diff --git a/drivers/counter/counter-chrdev.c b/drivers/counter/counter-chrdev.c index 4e71a19d7e6a..120879ee2e87 100644 --- a/drivers/counter/counter-chrdev.c +++ b/drivers/counter/counter-chrdev.c @@ -487,6 +487,7 @@ static int counter_get_data(struct counter_device *const counter, case COUNTER_COMP_ENUM: case COUNTER_COMP_COUNT_DIRECTION: case COUNTER_COMP_COUNT_MODE: + case COUNTER_COMP_SIGNAL_POLARITY: switch (comp_node->component.scope) { case COUNTER_SCOPE_DEVICE: ret = comp->device_u32_read(counter, &value_u32); diff --git a/drivers/counter/counter-sysfs.c b/drivers/counter/counter-sysfs.c index 04eac41dad33..e5dd36e1a45f 100644 --- a/drivers/counter/counter-sysfs.c +++ b/drivers/counter/counter-sysfs.c @@ -91,6 +91,11 @@ static const char *const counter_count_mode_str[] = { [COUNTER_COUNT_MODE_MODULO_N] = "modulo-n" }; +static const char *const counter_signal_polarity_str[] = { + [COUNTER_SIGNAL_POLARITY_POSITIVE] = "positive", + [COUNTER_SIGNAL_POLARITY_NEGATIVE] = "negative" +}; + static ssize_t counter_comp_u8_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -201,6 +206,8 @@ static ssize_t counter_comp_u32_show(struct device *dev, return sysfs_emit(buf, "%s\n", counter_count_direction_str[data]); case COUNTER_COMP_COUNT_MODE: return sysfs_emit(buf, "%s\n", counter_count_mode_str[data]); + case COUNTER_COMP_SIGNAL_POLARITY: + return sysfs_emit(buf, "%s\n", counter_signal_polarity_str[data]); default: return sysfs_emit(buf, "%u\n", (unsigned int)data); } @@ -252,6 +259,10 @@ static ssize_t counter_comp_u32_store(struct device *dev, err = counter_find_enum(&data, avail->enums, avail->num_items, buf, counter_count_mode_str); break; + case COUNTER_COMP_SIGNAL_POLARITY: + err = counter_find_enum(&data, avail->enums, avail->num_items, + buf, counter_signal_polarity_str); + break; default: err = kstrtou32(buf, 0, &data); break; @@ -469,6 +480,7 @@ static int counter_attr_create(struct device *const dev, case COUNTER_COMP_ENUM: case COUNTER_COMP_COUNT_DIRECTION: case COUNTER_COMP_COUNT_MODE: + case COUNTER_COMP_SIGNAL_POLARITY: if (comp->device_u32_read) { dev_attr->attr.mode |= 0444; dev_attr->show = counter_comp_u32_show; diff --git a/include/linux/counter.h b/include/linux/counter.h index a81234bc8ea8..b3fb6b68881a 100644 --- a/include/linux/counter.h +++ b/include/linux/counter.h @@ -31,6 +31,7 @@ enum counter_comp_type { COUNTER_COMP_ENUM, COUNTER_COMP_COUNT_DIRECTION, COUNTER_COMP_COUNT_MODE, + COUNTER_COMP_SIGNAL_POLARITY, }; /** @@ -477,6 +478,15 @@ struct counter_available { #define COUNTER_COMP_FLOOR(_read, _write) \ COUNTER_COMP_COUNT_U64("floor", _read, _write) +#define COUNTER_COMP_POLARITY(_read, _write, _available) \ +{ \ + .type = COUNTER_COMP_SIGNAL_POLARITY, \ + .name = "polarity", \ + .signal_u32_read = (_read), \ + .signal_u32_write = (_write), \ + .priv = &(_available), \ +} + #define COUNTER_COMP_PRESET(_read, _write) \ COUNTER_COMP_COUNT_U64("preset", _read, _write) diff --git a/include/uapi/linux/counter.h b/include/uapi/linux/counter.h index 96c5ffd368ad..e9610e1944dc 100644 --- a/include/uapi/linux/counter.h +++ b/include/uapi/linux/counter.h @@ -153,4 +153,10 @@ enum counter_synapse_action { COUNTER_SYNAPSE_ACTION_BOTH_EDGES, }; +/* Signal polarity values */ +enum counter_signal_polarity { + COUNTER_SIGNAL_POLARITY_POSITIVE, + COUNTER_SIGNAL_POLARITY_NEGATIVE, +}; + #endif /* _UAPI_COUNTER_H_ */ From patchwork Tue Sep 27 22:53:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991446 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A59B6C54EE9 for ; Tue, 27 Sep 2022 22:54:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231139AbiI0WyO (ORCPT ); Tue, 27 Sep 2022 18:54:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40756 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229779AbiI0WyM (ORCPT ); Tue, 27 Sep 2022 18:54:12 -0400 Received: from mail-oa1-x2f.google.com (mail-oa1-x2f.google.com [IPv6:2001:4860:4864:20::2f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90CA6B514A for ; Tue, 27 Sep 2022 15:54:10 -0700 (PDT) Received: by mail-oa1-x2f.google.com with SMTP id 586e51a60fabf-1280590722dso15237469fac.1 for ; Tue, 27 Sep 2022 15:54:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=y2Nb7qwlsGg2W87p+FZPAizUVnpTSuZLXpD7yAHCFxY=; b=ezUcRZ6s+upZlQqP0rGnqjvYcj1+Yz6/MbYfC+4YGB9pMllYks03v33zt3U9Mkg6dM IqG9n03rc84UipsQdK3w1F5pVeznlCItTc/R1o+lvjt4QPoKmLB/Yr9wMbuabxzu723x CcL8hf6W7my5y5hHMaQ5rvmmAB3oZWIUnOy8quwq+MOWpIPNvWgcgDgj+enGdGbbMm6V D+m7CbHyC/kNIieO9tYouePTc2YpNgDZS1b3ODhZ/P6bbaoYy8wnIjYVCm9p9OTlG6Ao ZPFKZLbqT+w5TH4x1GnVJOgpExiHxgtcqDT3mbT2qxrlCrSQG5yi65BYZDCrmUIS28VF 0nSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=y2Nb7qwlsGg2W87p+FZPAizUVnpTSuZLXpD7yAHCFxY=; b=z+iGeE+hT9MGp5YIAA1z4+get3ro0OBrMv87/OmvLauC8PMtHvqV25nEHIC1E16354 h1LO+/2nn6uh+q6tUad+QCMd3tHLOefa8bwHYG2aZJvoU/AJGBbltJldm3/IAwoW3uTd wc4HdMhpPpfZ8A4G/ULiAQsfz0pCg7vfPHvs646fVKCNr4QxjijFkoXcTHz7Or/EKlyi 40QB8gW06aJU3AU/60F3QgjoEZREJJ9haHkVMKFDdwM/TnEfAd/4ZbKJ7jb7JrEDP9pN 6cRdE3YL0AeTR/k5xjELnli/z4KSSvjJNMAsDFf8P5OVBvSes0P18MqyqGXfp5bVoanI qttA== X-Gm-Message-State: ACrzQf30PahEWe7nhkWIic8mWG7nql3VM0rI1/MkOBBqumIFVabfFu/V HeFFB1U5G7e9JJkeNIe+R9RX3Q== X-Google-Smtp-Source: AMsMyM7DHTboXKOPpNBj/Ti0HpyvCExd+tarccrcCIETHRS7CzjTx84BJWEHLg8LZxxvgMUBNXOWoA== X-Received: by 2002:a05:6870:3052:b0:131:932c:3316 with SMTP id u18-20020a056870305200b00131932c3316mr1890923oau.288.1664319249886; Tue, 27 Sep 2022 15:54:09 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:09 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, William Breathitt Gray Subject: [PATCH 05/12] counter: 104-quad-8: Add Signal polarity component Date: Tue, 27 Sep 2022 18:53:39 -0400 Message-Id: <0bf840beee1665e9f04ea82368ecdde87c791a22.1664318353.git.william.gray@linaro.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The 104-quad-8 driver provides support for Index signal polarity modes via the "index_polarity" Signal component. This patch exposes the same functionality through the more standard "polarity" Signal component. Link: https://lore.kernel.org/r/01d00c21873159833035cb6775d0d0e8ad55f2ef.1664204990.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index 1323edfbe40c..2a9d8259ed4b 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -549,6 +549,32 @@ static int quad8_index_polarity_set(struct counter_device *counter, return 0; } +static int quad8_polarity_read(struct counter_device *counter, + struct counter_signal *signal, + enum counter_signal_polarity *polarity) +{ + int err; + u32 index_polarity; + + err = quad8_index_polarity_get(counter, signal, &index_polarity); + if (err) + return err; + + *polarity = (index_polarity) ? COUNTER_SIGNAL_POLARITY_POSITIVE : + COUNTER_SIGNAL_POLARITY_NEGATIVE; + + return 0; +} + +static int quad8_polarity_write(struct counter_device *counter, + struct counter_signal *signal, + enum counter_signal_polarity polarity) +{ + const u32 pol = (polarity == COUNTER_SIGNAL_POLARITY_POSITIVE) ? 1 : 0; + + return quad8_index_polarity_set(counter, signal, pol); +} + static const char *const quad8_synchronous_modes[] = { "non-synchronous", "synchronous" @@ -977,6 +1003,13 @@ static struct counter_comp quad8_signal_ext[] = { quad8_signal_fck_prescaler_write) }; +static const enum counter_signal_polarity quad8_polarities[] = { + COUNTER_SIGNAL_POLARITY_POSITIVE, + COUNTER_SIGNAL_POLARITY_NEGATIVE, +}; + +static DEFINE_COUNTER_AVAILABLE(quad8_polarity_available, quad8_polarities); + static DEFINE_COUNTER_ENUM(quad8_index_pol_enum, quad8_index_polarity_modes); static DEFINE_COUNTER_ENUM(quad8_synch_mode_enum, quad8_synchronous_modes); @@ -984,6 +1017,8 @@ static struct counter_comp quad8_index_ext[] = { COUNTER_COMP_SIGNAL_ENUM("index_polarity", quad8_index_polarity_get, quad8_index_polarity_set, quad8_index_pol_enum), + COUNTER_COMP_POLARITY(quad8_polarity_read, quad8_polarity_write, + quad8_polarity_available), COUNTER_COMP_SIGNAL_ENUM("synchronous_mode", quad8_synchronous_mode_get, quad8_synchronous_mode_set, quad8_synch_mode_enum), From patchwork Tue Sep 27 22:53:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991447 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAD1DC6FA82 for ; Tue, 27 Sep 2022 22:54:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229779AbiI0WyP (ORCPT ); Tue, 27 Sep 2022 18:54:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231269AbiI0WyN (ORCPT ); Tue, 27 Sep 2022 18:54:13 -0400 Received: from mail-oi1-x229.google.com (mail-oi1-x229.google.com [IPv6:2607:f8b0:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9786EB6D1D for ; Tue, 27 Sep 2022 15:54:11 -0700 (PDT) Received: by mail-oi1-x229.google.com with SMTP id j188so13596920oih.0 for ; Tue, 27 Sep 2022 15:54:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=0goa3iZq7fzhzlKMmlBdhP+G/08MKXZMle4tsbg1pLw=; b=KV9LhqzLg2iWY5VxLqdWxhUI5VgqgCq4qJ2XLxUMX5yFRqbCwLv7VvLNSAFq98dMiH hdCf29suRm4cX7MvbCml/ID4X+MiaWc7ysmTHAHr4SQzaLxtufBFyk1sR7Vzn2Z0yYcS 6gieguwwNvUra2uHAMTu3wNPVlcJh6Jh+E7WKOEAIiSLzrVB+hlaXQj6KPunseU/ozZa VckZ2DvXMJfg1mV3gDbcpJk16j9dcukKVxfkm/jLYQo4uBhLqdJPr52g0qjXMD3ulRyI TtznaMvEXiMuIuVy5dwizjCeyzxve+0ZhV+9ludqtnqlwR4sAGvTkIfJNfwEh+JrJ3xq YFHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=0goa3iZq7fzhzlKMmlBdhP+G/08MKXZMle4tsbg1pLw=; b=Hwt/SZZPceFKtuLXvnBvUTDv8SAeafl4+k1TPsNjW1c01PW2voGDTmankyQatJkUtM KJ4bNZo7RCqXap9g7vIFaw4HRIuFLaJc0AgZE6daVUCR64gzuS6b2Lbww2QN2Nzao+er ztsAv9IGpvnHQuiuNd4h/ck0jwEHzVWGSDUWoy/nqnaXTp9J5kxK9q/YG4AickXsO+xm aci/cjObtAB5QTYlTIpaeiC1dGkZHYhyhVtUaip/xoDaT+1xON5/pw4WRt3Ms5Jvd6sT KJUSJF6VFhwbk6rEVP9kAcabVIRCz4lLduNUwBVcVgbz0ssyMcHgrmfqX+IuRvRUxf4u vRZQ== X-Gm-Message-State: ACrzQf25CkJTViSArwTtIy5Sa4oh3WNSlbLtFvq2Bmt6U6St3vxs/CTV MVaHxhsAsMl4oHrwL/3tHCUYw8l3HhlyFJ2L X-Google-Smtp-Source: AMsMyM7HGaXCKBXeJwdlK/ZBtBLEUb4W4AkVFfEdtH979IuPc/AKjaRwRRdTcRT6AhY+1/q99QswYg== X-Received: by 2002:aca:1117:0:b0:350:42c:55ba with SMTP id 23-20020aca1117000000b00350042c55bamr2929750oir.113.1664319250865; Tue, 27 Sep 2022 15:54:10 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:10 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, William Breathitt Gray , Julien Panis Subject: [PATCH 06/12] counter: Introduce the Count capture component Date: Tue, 27 Sep 2022 18:53:40 -0400 Message-Id: <3cebaa0b807a225eb277d771504fe6dba7269ffd.1664318353.git.william.gray@linaro.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Some devices provide a latch function to save historic Count values. This patch standardizes exposure of such functionality as Count capture components. A COUNTER_COMP_CAPTURE macro is provided for driver authors to define a capture component. A new event COUNTER_EVENT_CAPTURE is introduced to represent Count value capture events. Cc: Julien Panis Link: https://lore.kernel.org/r/c239572ab4208d0d6728136e82a88ad464369a7a.1664204990.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray --- Documentation/ABI/testing/sysfs-bus-counter | 7 +++++++ include/linux/counter.h | 3 +++ include/uapi/linux/counter.h | 2 ++ 3 files changed, 12 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index 2a996deabe9e..3eb6b063970a 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -4,6 +4,12 @@ Contact: linux-iio@vger.kernel.org Description: Count data of Count Y represented as a string. +What: /sys/bus/counter/devices/counterX/countY/capture +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Historical capture of the Count Y count data. + What: /sys/bus/counter/devices/counterX/countY/ceiling KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org @@ -203,6 +209,7 @@ Description: both edges: Any state transition. +What: /sys/bus/counter/devices/counterX/countY/capture_component_id What: /sys/bus/counter/devices/counterX/countY/ceiling_component_id What: /sys/bus/counter/devices/counterX/countY/floor_component_id What: /sys/bus/counter/devices/counterX/countY/count_mode_component_id diff --git a/include/linux/counter.h b/include/linux/counter.h index b3fb6b68881a..e160197971dd 100644 --- a/include/linux/counter.h +++ b/include/linux/counter.h @@ -453,6 +453,9 @@ struct counter_available { .priv = &(_available), \ } +#define COUNTER_COMP_CAPTURE(_read, _write) \ + COUNTER_COMP_COUNT_U64("capture", _read, _write) + #define COUNTER_COMP_CEILING(_read, _write) \ COUNTER_COMP_COUNT_U64("ceiling", _read, _write) diff --git a/include/uapi/linux/counter.h b/include/uapi/linux/counter.h index e9610e1944dc..8ab12d731e3b 100644 --- a/include/uapi/linux/counter.h +++ b/include/uapi/linux/counter.h @@ -63,6 +63,8 @@ enum counter_event_type { COUNTER_EVENT_INDEX, /* State of counter is changed */ COUNTER_EVENT_CHANGE_OF_STATE, + /* Count value captured */ + COUNTER_EVENT_CAPTURE, }; /** From patchwork Tue Sep 27 22:53:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991448 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 963D7C54EE9 for ; Tue, 27 Sep 2022 22:54:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231455AbiI0WyQ (ORCPT ); Tue, 27 Sep 2022 18:54:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230443AbiI0WyN (ORCPT ); Tue, 27 Sep 2022 18:54:13 -0400 Received: from mail-oa1-x32.google.com (mail-oa1-x32.google.com [IPv6:2001:4860:4864:20::32]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 56ABECF4B3 for ; Tue, 27 Sep 2022 15:54:12 -0700 (PDT) Received: by mail-oa1-x32.google.com with SMTP id 586e51a60fabf-13175b79807so5137470fac.9 for ; Tue, 27 Sep 2022 15:54:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=IevjLYZWe9tsLyOFzg37+cXAWlF3HP2aFWQuERAyz5A=; b=ukKxclW1ytzXKj6woU7axpA+gQGFnvT9sR5jqbzXuoZu+viXO/KuEZkNzr1GboxOdT nqf+v33qNwiPCWPVUw0abYQTEJQCghbVjOFW/TTXon42d/fjIYg5KRfBVCV097KSxXnc VRRGx7w/qQKoqOMNQ82yXAQipXutuq2b7HF/hEjaatCqOx8HKCdJunYQ6FchggLyFtz2 62t0GpFsm0sRFxp+KRYITO3yrxhIVzpPB0iaKoucEOFIH/Hhzq27yYyDBsGNgH3PvwVJ sWFDJPr1tQI0Xtgf57jqK2Yimt9X2bhonG5reF5DV+vN3Yx1mCVdw6diA2T0P45C32Ul u7ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=IevjLYZWe9tsLyOFzg37+cXAWlF3HP2aFWQuERAyz5A=; b=KsyZN0fZ3UiH0cBlEKFA7ImJuYVYWEScCPBnQa3zE4v0rxpvn4nrl0MZvae7B0vIjd +TjaimAkRWG/NWbhmzQKgpDAQCqxrPKwzxapgAbECYCbgWglumsgKnUHDtMemnPkKx27 5xhkYpXzcPqSKNHOHWyvHINi69OiMrfNd81cu4lK9yyowtt3K6KH6pXGNQbv2NH1HzaG WWOkGaqpuNiNy1PhnwqIZdZjacs2HVKznwUVBkleZH+Wmyp7CQ9i2Y9ipRplXWy0yFoi CYwA/Orp2JYOofjx8OvnEQzr9rH2HZCXYbxCrioH/iycta0hYG1ZHuBHvnrmYQSmVHpg ci5Q== X-Gm-Message-State: ACrzQf056VzeEjwa798vNQ6IfJ1JFXrscg0jhnNsWOp8Qp1IMnfUYbOe wAkznI7T2gwPNs3Qtgaxiy4WyC07bxgUNw== X-Google-Smtp-Source: AMsMyM7ZjxyL1+Odk/m/s7QJiHTB2eq7uXA4LusDYdvP8wVs9gBSKf5tFJ+TWY+A8n9EamMnce5KZA== X-Received: by 2002:a05:6871:7a1:b0:131:946a:7b30 with SMTP id o33-20020a05687107a100b00131946a7b30mr1825083oap.67.1664319251636; Tue, 27 Sep 2022 15:54:11 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:11 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, William Breathitt Gray Subject: [PATCH 07/12] counter: Consolidate Counter extension sysfs attribute creation Date: Tue, 27 Sep 2022 18:53:41 -0400 Message-Id: <0469c3ae3fbccbca908993c78d94f221761a6a3a.1664318353.git.william.gray@linaro.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Counter extensions are handled for the Device, Counts, and Signals. The code loops through each Counter extension and creates the expected sysfs attributes. This patch consolidates that code into functions to reduce redundancy and make the intention of the code clearer. Link: https://lore.kernel.org/r/6f2121cf52073028c119dbf981a8b72f3eb625d2.1664204990.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray --- drivers/counter/counter-sysfs.c | 98 ++++++++++++++++----------------- 1 file changed, 49 insertions(+), 49 deletions(-) diff --git a/drivers/counter/counter-sysfs.c b/drivers/counter/counter-sysfs.c index e5dd36e1a45f..b393da402e0b 100644 --- a/drivers/counter/counter-sysfs.c +++ b/drivers/counter/counter-sysfs.c @@ -592,6 +592,46 @@ static int counter_comp_id_attr_create(struct device *const dev, return 0; } +static int counter_ext_attrs_create(struct device *const dev, + struct counter_attribute_group *const group, + const struct counter_comp *const ext, + const enum counter_scope scope, + void *const parent, const size_t id) +{ + int err; + + /* Create main extension attribute */ + err = counter_attr_create(dev, group, ext, scope, parent); + if (err < 0) + return err; + + /* Create extension id attribute */ + return counter_comp_id_attr_create(dev, group, ext->name, id); +} + +static int counter_sysfs_exts_add(struct device *const dev, + struct counter_attribute_group *const group, + const struct counter_comp *const exts, + const size_t num_ext, + const enum counter_scope scope, + void *const parent) +{ + size_t i; + const struct counter_comp *ext; + int err; + + /* Create attributes for each extension */ + for (i = 0; i < num_ext; i++) { + ext = &exts[i]; + err = counter_ext_attrs_create(dev, group, ext, scope, parent, + i); + if (err < 0) + return err; + } + + return 0; +} + static struct counter_comp counter_signal_comp = { .type = COUNTER_COMP_SIGNAL_LEVEL, .name = "signal", @@ -605,8 +645,6 @@ static int counter_signal_attrs_create(struct counter_device *const counter, struct device *const dev = &counter->dev; int err; struct counter_comp comp; - size_t i; - struct counter_comp *ext; /* Create main Signal attribute */ comp = counter_signal_comp; @@ -620,21 +658,9 @@ static int counter_signal_attrs_create(struct counter_device *const counter, if (err < 0) return err; - /* Create an attribute for each extension */ - for (i = 0; i < signal->num_ext; i++) { - ext = &signal->ext[i]; - - err = counter_attr_create(dev, cattr_group, ext, scope, signal); - if (err < 0) - return err; - - err = counter_comp_id_attr_create(dev, cattr_group, ext->name, - i); - if (err < 0) - return err; - } - - return 0; + /* Add Signal extensions */ + return counter_sysfs_exts_add(dev, cattr_group, signal->ext, + signal->num_ext, scope, signal); } static int counter_sysfs_signals_add(struct counter_device *const counter, @@ -719,8 +745,6 @@ static int counter_count_attrs_create(struct counter_device *const counter, struct device *const dev = &counter->dev; int err; struct counter_comp comp; - size_t i; - struct counter_comp *ext; /* Create main Count attribute */ comp = counter_count_comp; @@ -743,21 +767,9 @@ static int counter_count_attrs_create(struct counter_device *const counter, if (err < 0) return err; - /* Create an attribute for each extension */ - for (i = 0; i < count->num_ext; i++) { - ext = &count->ext[i]; - - err = counter_attr_create(dev, cattr_group, ext, scope, count); - if (err < 0) - return err; - - err = counter_comp_id_attr_create(dev, cattr_group, ext->name, - i); - if (err < 0) - return err; - } - - return 0; + /* Add Count extensions */ + return counter_sysfs_exts_add(dev, cattr_group, count->ext, + count->num_ext, scope, count); } static int counter_sysfs_counts_add(struct counter_device *const counter, @@ -850,8 +862,6 @@ static int counter_sysfs_attr_add(struct counter_device *const counter, const enum counter_scope scope = COUNTER_SCOPE_DEVICE; struct device *const dev = &counter->dev; int err; - size_t i; - struct counter_comp *ext; /* Add Signals sysfs attributes */ err = counter_sysfs_signals_add(counter, cattr_group); @@ -888,19 +898,9 @@ static int counter_sysfs_attr_add(struct counter_device *const counter, if (err < 0) return err; - /* Create an attribute for each extension */ - for (i = 0; i < counter->num_ext; i++) { - ext = &counter->ext[i]; - - err = counter_attr_create(dev, cattr_group, ext, scope, NULL); - if (err < 0) - return err; - - err = counter_comp_id_attr_create(dev, cattr_group, ext->name, - i); - if (err < 0) - return err; - } + /* Add device extensions */ + return counter_sysfs_exts_add(dev, cattr_group, counter->ext, + counter->num_ext, scope, NULL); return 0; } From patchwork Tue Sep 27 22:53:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991450 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4BE23C6FA83 for ; Tue, 27 Sep 2022 22:54:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231634AbiI0WyS (ORCPT ); Tue, 27 Sep 2022 18:54:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231702AbiI0WyP (ORCPT ); Tue, 27 Sep 2022 18:54:15 -0400 Received: from mail-oi1-x235.google.com (mail-oi1-x235.google.com [IPv6:2607:f8b0:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A37CD33E6 for ; Tue, 27 Sep 2022 15:54:13 -0700 (PDT) Received: by mail-oi1-x235.google.com with SMTP id q10so5961740oib.5 for ; Tue, 27 Sep 2022 15:54:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=Uy0N3S+2FFRqrYb9EwmOQcn9Z/YXulwCuTEH0UvbNKw=; b=dp2HOHqyQEPpHykMv/JjCIFNsD2mRLuT6/xhxFE7oZBvsPMnviomuauidaNuPz2A3b WQHk4MIGWBR1ksCGapfvWTvvmG2vvuKV+IH+M4NvEobAvExERhbFsiVVHCGCte8DSdIf gLFBbtPilrRu2sOmGvNeNCQECzywLe3yu1ExwM/7NjNpi4nmByMDACwYQrmY+8ZMyeiF 8odL2fwkDLptWafiJkt4P5+4SV9lc6avXIzKBA1CU+qx9+1Au78wwHtbmcfIfLe6bH7T HDI1/r3LCD7Doc5nWR6rxh5OJDD+FP16O6cmDBB6xMA6ug/ZAHZX02KQtxr/lXjBGt58 StGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=Uy0N3S+2FFRqrYb9EwmOQcn9Z/YXulwCuTEH0UvbNKw=; b=1atc30+smV/2w+cC/6n0E60G0P2WJHq/lQ36gTXYsE/zoZDmDpfJ9M8KZ0Nvk9bQ2o b72qQzfWt3vfVEBTfzdQQoM+IRupBR4L1Yu9IUVqhYjDmSNKhmLmSIeobGDYiKz99QF3 kzDkWV3TJCVw1q763xMNx/rDg4yMAErowOnenZO+uwoyw0xQuNDPKMNWZrYEWarssESh ESVJbesxQgx0h1mCREior1N9XUTcqy18ReLfsJZ0+/ves9jF4pMq4Lyw4uIVB4x3YvlU l6uO9KtOlwin7YL1eaKaBmU2xAq+9zvDT8hs44q1x3ac9dpd0Sg4L84Nnx3MDxlXyXLD G+EQ== X-Gm-Message-State: ACrzQf3H+ufmLVL7RO8ErEDV6ij262Xje+cwdINnihl/1oAVblje1eu0 sLm890JEHQQf1sLuNdzCkTbrGv1LR0aqQvPd X-Google-Smtp-Source: AMsMyM5+dCUnJ2ZHyEWFKHCqhWY4OD94psjC15QWDnDvhZZOfDLfWciVy+7PBrLJjwhTSap8HAujTw== X-Received: by 2002:a05:6808:14c8:b0:350:4b77:7bf3 with SMTP id f8-20020a05680814c800b003504b777bf3mr2866115oiw.52.1664319252620; Tue, 27 Sep 2022 15:54:12 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:12 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, William Breathitt Gray , Julien Panis Subject: [PATCH 08/12] counter: Introduce the COUNTER_COMP_ARRAY component type Date: Tue, 27 Sep 2022 18:53:42 -0400 Message-Id: X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The COUNTER_COMP_ARRAY Counter component type is introduced to enable support for Counter array components. With Counter array components, exposure for buffers on counter devices can be defined via new Counter array component macros. This should simplify code for driver authors who would otherwise need to define individual Counter components for each array element. Eight Counter array component macros are introduced:: DEFINE_COUNTER_ARRAY_U64(_name, _length) DEFINE_COUNTER_ARRAY_CAPTURE(_name, _length) DEFINE_COUNTER_ARRAY_POLARITY(_name, _enums, _length) COUNTER_COMP_DEVICE_ARRAY_U64(_name, _read, _write, _array) COUNTER_COMP_COUNT_ARRAY_U64(_name, _read, _write, _array) COUNTER_COMP_SIGNAL_ARRAY_U64(_name, _read, _write, _array) COUNTER_COMP_ARRAY_CAPTURE(_read, _write, _array) COUNTER_COMP_ARRAY_POLARITY(_read, _write, _array) Eight Counter array callbacks are introduced as well:: int (*signal_array_u32_read)(struct counter_device *counter, struct counter_signal *signal, size_t idx, u32 *val); int (*signal_array_u32_write)(struct counter_device *counter, struct counter_signal *signal, size_t idx, u32 val); int (*device_array_u64_read)(struct counter_device *counter, size_t idx, u64 *val); int (*count_array_u64_read)(struct counter_device *counter, struct counter_count *count, size_t idx, u64 *val); int (*signal_array_u64_read)(struct counter_device *counter, struct counter_signal *signal, size_t idx, u64 *val); int (*device_array_u64_write)(struct counter_device *counter, size_t idx, u64 val); int (*count_array_u64_write)(struct counter_device *counter, struct counter_count *count, size_t idx, u64 val); int (*signal_array_u64_write)(struct counter_device *counter, struct counter_signal *signal, size_t idx, u64 val); Driver authors can handle reads/writes for an array component by receiving an element index via the `idx` parameter and processing the respective value via the `val` parameter. For example, suppose a driver wants to expose a Count's read-only capture buffer of four elements using a callback `foobar_capture_read()`:: DEFINE_COUNTER_ARRAY_CAPTURE(foobar_capture_array, 4); COUNTER_COMP_ARRAY_CAPTURE(foobar_capture_read, NULL, foobar_capture_array) Respective sysfs attributes for each array element would appear for the respective Count: * /sys/bus/counter/devices/counterX/countY/capture0 * /sys/bus/counter/devices/counterX/countY/capture1 * /sys/bus/counter/devices/counterX/countY/capture2 * /sys/bus/counter/devices/counterX/countY/capture3 If a user tries to read _capture2_ for example, `idx` will be `2` when passed to the `foobar_capture_read()` callback, and thus the driver knows which array element to handle. Counter arrays for polarity elements can be defined in a similar manner as u64 elements:: const enum counter_signal_polarity foobar_polarity_states[] = { COUNTER_SIGNAL_POLARITY_POSITIVE, COUNTER_SIGNAL_POLARITY_NEGATIVE, }; DEFINE_COUNTER_ARRAY_POLARITY(foobar_polarity_array, foobar_polarity_states, 4); COUNTER_COMP_ARRAY_POLARITY(foobar_polarity_read, foobar_polarity_write, foobar_polarity_array) Tested-by: Julien Panis Link: https://lore.kernel.org/r/5310c22520aeae65b1b74952419f49ac4c8e1ec1.1664204990.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray --- drivers/counter/counter-chrdev.c | 134 ++++++++++++++++++--- drivers/counter/counter-sysfs.c | 198 ++++++++++++++++++++++++++++++- include/linux/counter.h | 134 +++++++++++++++++++++ 3 files changed, 446 insertions(+), 20 deletions(-) diff --git a/drivers/counter/counter-chrdev.c b/drivers/counter/counter-chrdev.c index 120879ee2e87..80acdf62794a 100644 --- a/drivers/counter/counter-chrdev.c +++ b/drivers/counter/counter-chrdev.c @@ -40,7 +40,11 @@ struct counter_comp_node { a.signal_u32_read == b.signal_u32_read || \ a.device_u64_read == b.device_u64_read || \ a.count_u64_read == b.count_u64_read || \ - a.signal_u64_read == b.signal_u64_read) + a.signal_u64_read == b.signal_u64_read || \ + a.signal_array_u32_read == b.signal_array_u32_read || \ + a.device_array_u64_read == b.device_array_u64_read || \ + a.count_array_u64_read == b.count_array_u64_read || \ + a.signal_array_u64_read == b.signal_array_u64_read) #define counter_comp_read_is_set(comp) \ (comp.action_read || \ @@ -52,7 +56,11 @@ struct counter_comp_node { comp.signal_u32_read || \ comp.device_u64_read || \ comp.count_u64_read || \ - comp.signal_u64_read) + comp.signal_u64_read || \ + comp.signal_array_u32_read || \ + comp.device_array_u64_read || \ + comp.count_array_u64_read || \ + comp.signal_array_u64_read) static ssize_t counter_chrdev_read(struct file *filp, char __user *buf, size_t len, loff_t *f_ps) @@ -228,6 +236,31 @@ static int counter_disable_events(struct counter_device *const counter) return err; } +static int counter_get_ext(const struct counter_comp *const ext, + const size_t num_ext, const size_t component_id, + size_t *const ext_idx, size_t *const id) +{ + struct counter_array *element; + + *id = 0; + for (*ext_idx = 0; *ext_idx < num_ext; (*ext_idx)++) { + if (*id == component_id) + return 0; + + if (ext->type == COUNTER_COMP_ARRAY) { + element = ext->priv; + + if (component_id - *id < element->length) + return 0; + + *id += element->length; + } else + (*id)++; + } + + return -EINVAL; +} + static int counter_add_watch(struct counter_device *const counter, const unsigned long arg) { @@ -237,6 +270,7 @@ static int counter_add_watch(struct counter_device *const counter, size_t parent, id; struct counter_comp *ext; size_t num_ext; + size_t ext_idx, ext_id; int err = 0; if (copy_from_user(&watch, uwatch, sizeof(watch))) @@ -314,11 +348,11 @@ static int counter_add_watch(struct counter_device *const counter, comp_node.comp.priv = counter->counts[parent].synapses + id; break; case COUNTER_COMPONENT_EXTENSION: - if (id >= num_ext) - return -EINVAL; - id = array_index_nospec(id, num_ext); + err = counter_get_ext(ext, num_ext, id, &ext_idx, &ext_id); + if (err < 0) + return err; - comp_node.comp = ext[id]; + comp_node.comp = ext[ext_idx]; break; default: return -EINVAL; @@ -451,14 +485,56 @@ void counter_chrdev_remove(struct counter_device *const counter) kfifo_free(&counter->events); } +static int counter_get_array_data(struct counter_device *const counter, + const enum counter_scope scope, + void *const parent, + const struct counter_comp *const comp, + const size_t idx, u64 *const value) +{ + const struct counter_array *const element = comp->priv; + u32 value_u32 = 0; + int ret; + + switch (element->type) { + case COUNTER_COMP_SIGNAL_POLARITY: + if (scope != COUNTER_SCOPE_SIGNAL) + return -EINVAL; + ret = comp->signal_array_u32_read(counter, parent, idx, + &value_u32); + *value = value_u32; + return ret; + case COUNTER_COMP_U64: + switch (scope) { + case COUNTER_SCOPE_DEVICE: + return comp->device_array_u64_read(counter, idx, value); + case COUNTER_SCOPE_SIGNAL: + return comp->signal_array_u64_read(counter, parent, idx, + value); + case COUNTER_SCOPE_COUNT: + return comp->count_array_u64_read(counter, parent, idx, + value); + default: + return -EINVAL; + } + default: + return -EINVAL; + } +} + static int counter_get_data(struct counter_device *const counter, const struct counter_comp_node *const comp_node, u64 *const value) { const struct counter_comp *const comp = &comp_node->comp; - void *const parent = comp_node->parent; + const enum counter_scope scope = comp_node->component.scope; + const size_t id = comp_node->component.id; + struct counter_signal *const signal = comp_node->parent; + struct counter_count *const count = comp_node->parent; u8 value_u8 = 0; u32 value_u32 = 0; + const struct counter_comp *ext; + size_t num_ext; + size_t ext_idx, ext_id; int ret; if (comp_node->component.type == COUNTER_COMPONENT_NONE) @@ -467,15 +543,15 @@ static int counter_get_data(struct counter_device *const counter, switch (comp->type) { case COUNTER_COMP_U8: case COUNTER_COMP_BOOL: - switch (comp_node->component.scope) { + switch (scope) { case COUNTER_SCOPE_DEVICE: ret = comp->device_u8_read(counter, &value_u8); break; case COUNTER_SCOPE_SIGNAL: - ret = comp->signal_u8_read(counter, parent, &value_u8); + ret = comp->signal_u8_read(counter, signal, &value_u8); break; case COUNTER_SCOPE_COUNT: - ret = comp->count_u8_read(counter, parent, &value_u8); + ret = comp->count_u8_read(counter, count, &value_u8); break; default: return -EINVAL; @@ -488,16 +564,16 @@ static int counter_get_data(struct counter_device *const counter, case COUNTER_COMP_COUNT_DIRECTION: case COUNTER_COMP_COUNT_MODE: case COUNTER_COMP_SIGNAL_POLARITY: - switch (comp_node->component.scope) { + switch (scope) { case COUNTER_SCOPE_DEVICE: ret = comp->device_u32_read(counter, &value_u32); break; case COUNTER_SCOPE_SIGNAL: - ret = comp->signal_u32_read(counter, parent, + ret = comp->signal_u32_read(counter, signal, &value_u32); break; case COUNTER_SCOPE_COUNT: - ret = comp->count_u32_read(counter, parent, &value_u32); + ret = comp->count_u32_read(counter, count, &value_u32); break; default: return -EINVAL; @@ -505,21 +581,43 @@ static int counter_get_data(struct counter_device *const counter, *value = value_u32; return ret; case COUNTER_COMP_U64: - switch (comp_node->component.scope) { + switch (scope) { case COUNTER_SCOPE_DEVICE: return comp->device_u64_read(counter, value); case COUNTER_SCOPE_SIGNAL: - return comp->signal_u64_read(counter, parent, value); + return comp->signal_u64_read(counter, signal, value); case COUNTER_SCOPE_COUNT: - return comp->count_u64_read(counter, parent, value); + return comp->count_u64_read(counter, count, value); default: return -EINVAL; } case COUNTER_COMP_SYNAPSE_ACTION: - ret = comp->action_read(counter, parent, comp->priv, - &value_u32); + ret = comp->action_read(counter, count, comp->priv, &value_u32); *value = value_u32; return ret; + case COUNTER_COMP_ARRAY: + switch (scope) { + case COUNTER_SCOPE_DEVICE: + ext = counter->ext; + num_ext = counter->num_ext; + break; + case COUNTER_SCOPE_SIGNAL: + ext = signal->ext; + num_ext = signal->num_ext; + break; + case COUNTER_SCOPE_COUNT: + ext = count->ext; + num_ext = count->num_ext; + break; + default: + return -EINVAL; + } + ret = counter_get_ext(ext, num_ext, id, &ext_idx, &ext_id); + if (ret < 0) + return ret; + + return counter_get_array_data(counter, scope, comp_node->parent, + comp, id - ext_id, value); default: return -EINVAL; } diff --git a/drivers/counter/counter-sysfs.c b/drivers/counter/counter-sysfs.c index b393da402e0b..b9efe66f9f8d 100644 --- a/drivers/counter/counter-sysfs.c +++ b/drivers/counter/counter-sysfs.c @@ -352,6 +352,124 @@ static ssize_t counter_comp_u64_store(struct device *dev, return len; } +static ssize_t counter_comp_array_u32_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + const struct counter_attribute *const a = to_counter_attribute(attr); + struct counter_device *const counter = counter_from_dev(dev); + const struct counter_array *const element = a->comp.priv; + int err; + u32 data = 0; + + if (a->scope != COUNTER_SCOPE_SIGNAL || + element->type != COUNTER_COMP_SIGNAL_POLARITY) + return -EINVAL; + + err = a->comp.signal_array_u32_read(counter, a->parent, element->idx, + &data); + if (err < 0) + return err; + + return sysfs_emit(buf, "%s\n", counter_signal_polarity_str[data]); +} + +static ssize_t counter_comp_array_u32_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + const struct counter_attribute *const a = to_counter_attribute(attr); + struct counter_device *const counter = counter_from_dev(dev); + const struct counter_array *const element = a->comp.priv; + int err; + u32 data = 0; + + if (element->type != COUNTER_COMP_SIGNAL_POLARITY || + a->scope != COUNTER_SCOPE_SIGNAL) + return -EINVAL; + + err = counter_find_enum(&data, element->avail->enums, + element->avail->num_items, buf, + counter_signal_polarity_str); + if (err < 0) + return err; + + err = a->comp.signal_array_u32_write(counter, a->parent, element->idx, + data); + if (err < 0) + return err; + + return len; +} + +static ssize_t counter_comp_array_u64_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + const struct counter_attribute *const a = to_counter_attribute(attr); + struct counter_device *const counter = counter_from_dev(dev); + const struct counter_array *const element = a->comp.priv; + int err; + u64 data = 0; + + switch (a->scope) { + case COUNTER_SCOPE_DEVICE: + err = a->comp.device_array_u64_read(counter, element->idx, + &data); + break; + case COUNTER_SCOPE_SIGNAL: + err = a->comp.signal_array_u64_read(counter, a->parent, + element->idx, &data); + break; + case COUNTER_SCOPE_COUNT: + err = a->comp.count_array_u64_read(counter, a->parent, + element->idx, &data); + break; + default: + return -EINVAL; + } + if (err < 0) + return err; + + return sysfs_emit(buf, "%llu\n", (unsigned long long)data); +} + +static ssize_t counter_comp_array_u64_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + const struct counter_attribute *const a = to_counter_attribute(attr); + struct counter_device *const counter = counter_from_dev(dev); + const struct counter_array *const element = a->comp.priv; + int err; + u64 data = 0; + + err = kstrtou64(buf, 0, &data); + if (err < 0) + return err; + + switch (a->scope) { + case COUNTER_SCOPE_DEVICE: + err = a->comp.device_array_u64_write(counter, element->idx, + data); + break; + case COUNTER_SCOPE_SIGNAL: + err = a->comp.signal_array_u64_write(counter, a->parent, + element->idx, data); + break; + case COUNTER_SCOPE_COUNT: + err = a->comp.count_array_u64_write(counter, a->parent, + element->idx, data); + break; + default: + return -EINVAL; + } + if (err < 0) + return err; + + return len; +} + static ssize_t enums_available_show(const u32 *const enums, const size_t num_enums, const char *const strs[], char *buf) @@ -446,6 +564,7 @@ static int counter_attr_create(struct device *const dev, const enum counter_scope scope, void *const parent) { + const struct counter_array *const array = comp->priv; struct counter_attribute *counter_attr; struct device_attribute *dev_attr; @@ -500,6 +619,32 @@ static int counter_attr_create(struct device *const dev, dev_attr->store = counter_comp_u64_store; } break; + case COUNTER_COMP_ARRAY: + switch (array->type) { + case COUNTER_COMP_SIGNAL_POLARITY: + if (comp->signal_array_u32_read) { + dev_attr->attr.mode |= 0444; + dev_attr->show = counter_comp_array_u32_show; + } + if (comp->signal_array_u32_write) { + dev_attr->attr.mode |= 0200; + dev_attr->store = counter_comp_array_u32_store; + } + break; + case COUNTER_COMP_U64: + if (comp->device_array_u64_read) { + dev_attr->attr.mode |= 0444; + dev_attr->show = counter_comp_array_u64_show; + } + if (comp->device_array_u64_write) { + dev_attr->attr.mode |= 0200; + dev_attr->store = counter_comp_array_u64_store; + } + break; + default: + return -EINVAL; + } + break; default: return -EINVAL; } @@ -609,6 +754,45 @@ static int counter_ext_attrs_create(struct device *const dev, return counter_comp_id_attr_create(dev, group, ext->name, id); } +static int counter_array_attrs_create(struct device *const dev, + struct counter_attribute_group *const group, + const struct counter_comp *const comp, + const enum counter_scope scope, + void *const parent, const size_t id) +{ + const struct counter_array *const array = comp->priv; + struct counter_comp ext = *comp; + struct counter_array *element; + size_t idx; + int err; + + /* Create an attribute for each array element */ + for (idx = 0; idx < array->length; idx++) { + /* Generate array element attribute name */ + ext.name = devm_kasprintf(dev, GFP_KERNEL, "%s%zu", comp->name, + idx); + if (!ext.name) + return -ENOMEM; + + /* Allocate and configure array element */ + element = devm_kzalloc(dev, sizeof(*element), GFP_KERNEL); + if (!element) + return -ENOMEM; + element->type = array->type; + element->avail = array->avail; + element->idx = idx; + ext.priv = element; + + /* Create all attributes associated with the array element */ + err = counter_ext_attrs_create(dev, group, &ext, scope, parent, + id + idx); + if (err < 0) + return err; + } + + return 0; +} + static int counter_sysfs_exts_add(struct device *const dev, struct counter_attribute_group *const group, const struct counter_comp *const exts, @@ -619,12 +803,22 @@ static int counter_sysfs_exts_add(struct device *const dev, size_t i; const struct counter_comp *ext; int err; + size_t id = 0; + const struct counter_array *array; /* Create attributes for each extension */ for (i = 0; i < num_ext; i++) { ext = &exts[i]; - err = counter_ext_attrs_create(dev, group, ext, scope, parent, - i); + if (ext->type == COUNTER_COMP_ARRAY) { + err = counter_array_attrs_create(dev, group, ext, scope, + parent, id); + array = ext->priv; + id += array->length; + } else { + err = counter_ext_attrs_create(dev, group, ext, scope, + parent, id); + id++; + } if (err < 0) return err; } diff --git a/include/linux/counter.h b/include/linux/counter.h index e160197971dd..c41fa602ed28 100644 --- a/include/linux/counter.h +++ b/include/linux/counter.h @@ -32,6 +32,7 @@ enum counter_comp_type { COUNTER_COMP_COUNT_DIRECTION, COUNTER_COMP_COUNT_MODE, COUNTER_COMP_SIGNAL_POLARITY, + COUNTER_COMP_ARRAY, }; /** @@ -69,6 +70,30 @@ enum counter_comp_type { * @signal_u64_read: Signal u64 component read callback. The read value of * the respective Signal u64 component should be passed * back via the val parameter. + * @signal_array_u32_read: Signal u32 array component read callback. The + * index of the respective Count u32 array + * component element is passed via the idx + * parameter. The read value of the respective + * Count u32 array component element should be + * passed back via the val parameter. + * @device_array_u64_read: Device u64 array component read callback. The + * index of the respective Device u64 array + * component element is passed via the idx + * parameter. The read value of the respective + * Device u64 array component element should be + * passed back via the val parameter. + * @count_array_u64_read: Count u64 array component read callback. The + * index of the respective Count u64 array + * component element is passed via the idx + * parameter. The read value of the respective + * Count u64 array component element should be + * passed back via the val parameter. + * @signal_array_u64_read: Signal u64 array component read callback. The + * index of the respective Count u64 array + * component element is passed via the idx + * parameter. The read value of the respective + * Count u64 array component element should be + * passed back via the val parameter. * @action_write: Synapse action mode write callback. The write value of * the respective Synapse action mode is passed via the * action parameter. @@ -99,6 +124,30 @@ enum counter_comp_type { * @signal_u64_write: Signal u64 component write callback. The write value of * the respective Signal u64 component is passed via the * val parameter. + * @signal_array_u32_write: Signal u32 array component write callback. The + * index of the respective Signal u32 array + * component element is passed via the idx + * parameter. The write value of the respective + * Signal u32 array component element is passed via + * the val parameter. + * @device_array_u64_write: Device u64 array component write callback. The + * index of the respective Device u64 array + * component element is passed via the idx + * parameter. The write value of the respective + * Device u64 array component element is passed via + * the val parameter. + * @count_array_u64_write: Count u64 array component write callback. The + * index of the respective Count u64 array + * component element is passed via the idx + * parameter. The write value of the respective + * Count u64 array component element is passed via + * the val parameter. + * @signal_array_u64_write: Signal u64 array component write callback. The + * index of the respective Signal u64 array + * component element is passed via the idx + * parameter. The write value of the respective + * Signal u64 array component element is passed via + * the val parameter. */ struct counter_comp { enum counter_comp_type type; @@ -126,6 +175,17 @@ struct counter_comp { struct counter_count *count, u64 *val); int (*signal_u64_read)(struct counter_device *counter, struct counter_signal *signal, u64 *val); + int (*signal_array_u32_read)(struct counter_device *counter, + struct counter_signal *signal, + size_t idx, u32 *val); + int (*device_array_u64_read)(struct counter_device *counter, + size_t idx, u64 *val); + int (*count_array_u64_read)(struct counter_device *counter, + struct counter_count *count, + size_t idx, u64 *val); + int (*signal_array_u64_read)(struct counter_device *counter, + struct counter_signal *signal, + size_t idx, u64 *val); }; union { int (*action_write)(struct counter_device *counter, @@ -149,6 +209,17 @@ struct counter_comp { struct counter_count *count, u64 val); int (*signal_u64_write)(struct counter_device *counter, struct counter_signal *signal, u64 val); + int (*signal_array_u32_write)(struct counter_device *counter, + struct counter_signal *signal, + size_t idx, u32 val); + int (*device_array_u64_write)(struct counter_device *counter, + size_t idx, u64 val); + int (*count_array_u64_write)(struct counter_device *counter, + struct counter_count *count, + size_t idx, u64 val); + int (*signal_array_u64_write)(struct counter_device *counter, + struct counter_signal *signal, + size_t idx, u64 val); }; }; @@ -453,6 +524,57 @@ struct counter_available { .priv = &(_available), \ } +struct counter_array { + enum counter_comp_type type; + const struct counter_available *avail; + union { + size_t length; + size_t idx; + }; +}; + +#define DEFINE_COUNTER_ARRAY_U64(_name, _length) \ + struct counter_array _name = { \ + .type = COUNTER_COMP_U64, \ + .length = (_length), \ + } + +#define DEFINE_COUNTER_ARRAY_CAPTURE(_name, _length) \ + DEFINE_COUNTER_ARRAY_U64(_name, _length) + +#define DEFINE_COUNTER_ARRAY_POLARITY(_name, _enums, _length) \ + DEFINE_COUNTER_AVAILABLE(_name##_available, _enums); \ + struct counter_array _name = { \ + .type = COUNTER_COMP_SIGNAL_POLARITY, \ + .avail = &(_name##_available), \ + .length = (_length), \ + } + +#define COUNTER_COMP_DEVICE_ARRAY_U64(_name, _read, _write, _array) \ +{ \ + .type = COUNTER_COMP_ARRAY, \ + .name = (_name), \ + .device_array_u64_read = (_read), \ + .device_array_u64_write = (_write), \ + .priv = &(_array), \ +} +#define COUNTER_COMP_COUNT_ARRAY_U64(_name, _read, _write, _array) \ +{ \ + .type = COUNTER_COMP_ARRAY, \ + .name = (_name), \ + .count_array_u64_read = (_read), \ + .count_array_u64_write = (_write), \ + .priv = &(_array), \ +} +#define COUNTER_COMP_SIGNAL_ARRAY_U64(_name, _read, _write, _array) \ +{ \ + .type = COUNTER_COMP_ARRAY, \ + .name = (_name), \ + .signal_array_u64_read = (_read), \ + .signal_array_u64_write = (_write), \ + .priv = &(_array), \ +} + #define COUNTER_COMP_CAPTURE(_read, _write) \ COUNTER_COMP_COUNT_U64("capture", _read, _write) @@ -496,4 +618,16 @@ struct counter_available { #define COUNTER_COMP_PRESET_ENABLE(_read, _write) \ COUNTER_COMP_COUNT_BOOL("preset_enable", _read, _write) +#define COUNTER_COMP_ARRAY_CAPTURE(_read, _write, _array) \ + COUNTER_COMP_COUNT_ARRAY_U64("capture", _read, _write, _array) + +#define COUNTER_COMP_ARRAY_POLARITY(_read, _write, _array) \ +{ \ + .type = COUNTER_COMP_ARRAY, \ + .name = "polarity", \ + .signal_array_u32_read = (_read), \ + .signal_array_u32_write = (_write), \ + .priv = &(_array), \ +} + #endif /* _COUNTER_H_ */ From patchwork Tue Sep 27 22:53:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991449 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E836C07E9D for ; Tue, 27 Sep 2022 22:54:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231759AbiI0WyR (ORCPT ); Tue, 27 Sep 2022 18:54:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40798 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231642AbiI0WyP (ORCPT ); Tue, 27 Sep 2022 18:54:15 -0400 Received: from mail-oa1-x29.google.com (mail-oa1-x29.google.com [IPv6:2001:4860:4864:20::29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 528C2B6D1D for ; Tue, 27 Sep 2022 15:54:14 -0700 (PDT) Received: by mail-oa1-x29.google.com with SMTP id 586e51a60fabf-12803ac8113so15215782fac.8 for ; Tue, 27 Sep 2022 15:54:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=a7VLezTD0+GPejxCp7dPxU8OWFTrlgtVBSlhx4E+t6E=; b=ALHzBCs/dzoKPi+sqH/xuMWcZDQrOIux1rIdClKBDNjFRs/UYr3DOfkcXIP7JYI+RK 8l7mj8YmpkwsLt3MQ1/fCsId/Z3n61miWc9/r6zmzbQsqqD0xcoiRjKa1APp32EA28WF WmlHZzkDUYZGATIxpyssGH4eD6wpRdAcZ/UlqVwgHCPGCi/jadv5cwy5woVgeT0onWDi 7KpOmFRJzN2WpRzYXrB8GJPr7fwxKBdqaYbos3Tt/PmNT7wU6rtF3HYMbzL5I6PVb/bk 3pySsR/BqUn6yycjnerJxMEMxkXH3zKA3YBXMIge+ONbHQ6ek2zxqtB4KEI3gsrMkT3P GZ8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=a7VLezTD0+GPejxCp7dPxU8OWFTrlgtVBSlhx4E+t6E=; b=6/PyGNSGxeT8cqr+dGhL0nred62nbJIFGcz5/j0Cwmbd21GqHhPCD1gUWTmXI/Nh12 OwVFzQUoTGAqiWUSOPkv2xF1jz7SF+sfZAUrxl09DOlPqPyDujku20aQRpoqbwTeN+fc egVxyh9mJGxqVIdyi31os15QRIx5XLOCnMT0vw+hLsZWiS1tz/o3+AKIXl0illsxeB1+ 5oFEPlbr75MvwOSj3pdJGJl+PDyz42Jc77gH0qIGv23wQqWqEvX67wrFeGvyloa81LrV tubY2iyRUwMkq/NRV4yKoJzrFV87VJRlrlDiwAOz4MpglDqZQUHhuohRfdHqmOghN0nv SIqw== X-Gm-Message-State: ACrzQf3fOCctzEQRXJEY2aofXLQT/nvSWEy88BsdAvYh/XEBTBwwh6gi 6udgWn5ib4JBSwv+akKXud7fT5dM6Fgura6y X-Google-Smtp-Source: AMsMyM7rb0be+4Y7sLi173c3HACIYoOgg18OfObCT7IKGhqRvLdunxf9mWReo0ueMj6xA40KiHRbaw== X-Received: by 2002:a05:6871:1d5:b0:12b:239:ef00 with SMTP id q21-20020a05687101d500b0012b0239ef00mr3534738oad.85.1664319253520; Tue, 27 Sep 2022 15:54:13 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:13 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, Julien Panis , Krzysztof Kozlowski , William Breathitt Gray Subject: [PATCH 09/12] dt-bindings: counter: add ti,am62-ecap-capture.yaml Date: Tue, 27 Sep 2022 18:53:43 -0400 Message-Id: <33c27451f61b3a01d886da5e6bf6456088956439.1664318353.git.william.gray@linaro.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Julien Panis This commit adds a YAML binding for TI ECAP used in capture operating mode. Signed-off-by: Julien Panis Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220923142437.271328-2-jpanis@baylibre.com/ Signed-off-by: William Breathitt Gray --- .../counter/ti,am62-ecap-capture.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml diff --git a/Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml b/Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml new file mode 100644 index 000000000000..4e0b2d2b303e --- /dev/null +++ b/Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/counter/ti,am62-ecap-capture.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments Enhanced Capture (eCAP) Module + +maintainers: + - Julien Panis + +description: | + The eCAP module resources can be used to capture timestamps + on input signal events (falling/rising edges). + +properties: + compatible: + const: ti,am62-ecap-capture + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: fck + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + capture@23100000 { /* eCAP in capture mode on am62x */ + compatible = "ti,am62-ecap-capture"; + reg = <0x00 0x23100000 0x00 0x100>; + interrupts = ; + power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 51 0>; + clock-names = "fck"; + }; + }; From patchwork Tue Sep 27 22:53:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991451 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15B08C54EE9 for ; Tue, 27 Sep 2022 22:54:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230443AbiI0WyT (ORCPT ); Tue, 27 Sep 2022 18:54:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231726AbiI0WyP (ORCPT ); Tue, 27 Sep 2022 18:54:15 -0400 Received: from mail-oa1-x35.google.com (mail-oa1-x35.google.com [IPv6:2001:4860:4864:20::35]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 965C5D2D7B for ; Tue, 27 Sep 2022 15:54:14 -0700 (PDT) Received: by mail-oa1-x35.google.com with SMTP id 586e51a60fabf-1318106fe2cso4056165fac.13 for ; Tue, 27 Sep 2022 15:54:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=T28xl67JTcqzGa+zRCl34epQWllKYimbVGVDsx/ZVLY=; b=KOXOpIy2oQHrS08NBXl/Za99dtDOBx5CYz3RPm86J9fHly0eNgX9TzLwvTKFmbq2mk +BHhm29UdQVk2kWqyBXCIZqUqmx77BYv6203ceIAu/9ILD1Gg46rIvz74gZtnBD9pzQL H/UJ1JSwmXfEt+d1zJBCs7DFBvwqeJOWIR0qQ8mCZVzJHO3kIlabBzbU7bjsyl2PYH8G db7Cghv3kMrzKnaFqJKFR70ZftYPIBs1alYXoheZ8TJBCqIpyP3lvhvyXrvU6f22Bop/ yLVB3VBMYMUNtpIKCsY91sZLd340FxxIzHwydmYUx7qpq/7qH/nXkTLlRIWR0YQ4spuc zT7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=T28xl67JTcqzGa+zRCl34epQWllKYimbVGVDsx/ZVLY=; b=4VqMwQIcLZ2ssiiij4bhQQskQMvuKdNWV8OtUM//Tyd/0uKYYj7BULHg4eUnSk8487 1gYgeJCsmtSEfodKt2tLkVdhoks+KtD1UVHGxJ15edccoB88lW+AiWXYzuAii7doKPRx 3tpJfxoXGiLE549mYJu7IZnPMalbMmEp1jIzI8aEWs/yCC5FQld7F5PIvDX2M9HauyAC L9OKcyGlqA1wO9XgfxFILknWfbvtV5LZeKckaSN6R0os3pUYrBiRAopQKJChBXXRj7Hd uzIlL4k0Ixsh59Nn18ucgS9VyWG3JOnDwWKe+SrJl4xlnxFHbpMKEiqro1M8P60cKREZ 7OrA== X-Gm-Message-State: ACrzQf1g+sb270STNvvbBWgNV6b2h3sRq5SHHMqsaOgmYkt+uhvzPVYU xbMF/PFQxjGS5pKmhWHnsEodogX9VrhRc+KK X-Google-Smtp-Source: AMsMyM7WQTeaSTMTJkG54/z5mo6taS/5EQLRq8heCO4qVWz0jRYWcbDel8ADJ8pocWjY60W/3AJAIA== X-Received: by 2002:a05:6870:82ac:b0:131:9468:b9b6 with SMTP id q44-20020a05687082ac00b001319468b9b6mr1805644oae.240.1664319254330; Tue, 27 Sep 2022 15:54:14 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:14 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, Julien Panis , William Breathitt Gray Subject: [PATCH 10/12] Documentation: ABI: sysfs-bus-counter: add frequency & num_overflows items Date: Tue, 27 Sep 2022 18:53:44 -0400 Message-Id: <467ae80e97c586c6bc9c453c6156ffcb5d4853d6.1664318353.git.william.gray@linaro.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Julien Panis This commit adds frequency and num_overflows items to counter ABI file (e.g. for TI ECAP hardware used in capture operating mode). Signed-off-by: Julien Panis Link: https://lore.kernel.org/r/20220923142437.271328-3-jpanis@baylibre.com/ Signed-off-by: William Breathitt Gray --- Documentation/ABI/testing/sysfs-bus-counter | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index 3eb6b063970a..ff83320b4255 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -209,6 +209,12 @@ Description: both edges: Any state transition. +What: /sys/bus/counter/devices/counterX/countY/num_overflows +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + This attribute indicates the number of overflows of count Y. + What: /sys/bus/counter/devices/counterX/countY/capture_component_id What: /sys/bus/counter/devices/counterX/countY/ceiling_component_id What: /sys/bus/counter/devices/counterX/countY/floor_component_id @@ -220,12 +226,14 @@ What: /sys/bus/counter/devices/counterX/countY/prescaler_component_id What: /sys/bus/counter/devices/counterX/countY/preset_component_id What: /sys/bus/counter/devices/counterX/countY/preset_enable_component_id What: /sys/bus/counter/devices/counterX/countY/signalZ_action_component_id +What: /sys/bus/counter/devices/counterX/countY/num_overflows_component_id What: /sys/bus/counter/devices/counterX/signalY/cable_fault_component_id What: /sys/bus/counter/devices/counterX/signalY/cable_fault_enable_component_id What: /sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler_component_id What: /sys/bus/counter/devices/counterX/signalY/index_polarity_component_id What: /sys/bus/counter/devices/counterX/signalY/polarity_component_id What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_component_id +What: /sys/bus/counter/devices/counterX/signalY/frequency_component_id KernelVersion: 5.16 Contact: linux-iio@vger.kernel.org Description: @@ -366,3 +374,9 @@ Description: via index_polarity. The index function (as enabled via preset_enable) is performed synchronously with the quadrature clock on the active level of the index input. + +What: /sys/bus/counter/devices/counterX/signalY/frequency +KernelVersion: 6.1 +Contact: linux-iio@vger.kernel.org +Description: + Read-only attribute that indicates the signal Y frequency, in Hz. From patchwork Tue Sep 27 22:53:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991452 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90148C07E9D for ; Tue, 27 Sep 2022 22:54:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231702AbiI0WyU (ORCPT ); Tue, 27 Sep 2022 18:54:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40842 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231782AbiI0WyR (ORCPT ); Tue, 27 Sep 2022 18:54:17 -0400 Received: from mail-oa1-x32.google.com (mail-oa1-x32.google.com [IPv6:2001:4860:4864:20::32]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E023BDCCF9 for ; Tue, 27 Sep 2022 15:54:15 -0700 (PDT) Received: by mail-oa1-x32.google.com with SMTP id 586e51a60fabf-13175b79807so5137603fac.9 for ; Tue, 27 Sep 2022 15:54:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=8hl/LLCzlNgia18tGLkMxMwC+o/IWFixbYnY6JNcFbA=; b=NssydsdDOkfs8fdK8IPPowgk5rjezDufbURAJw6NICZl5QbD/LPCldkK0r5MGDGLTD A3ZXAtBOOZLFFbkaqV8wznXQVfsN0i2uB4crjLZTzNjsI5odd2JlIQvuOvQWah+CBkIH y87TGKzxcJytCut/SPVKT0FPMS20IKQZLY9vPcY32q2ZB1ScLCDY+kpSn+/mx9Xx5a6N 0Qcd3NKKxHvVABY2RRyLvbfHwbKb+yJ+KpcaEeqWgmNQ8EtGlJmbR+0USrTubQaBbRjL FjIq/VjdTFFCxFM9ZjhvaxvWUGqPM/4Jb+NdDc/wyZRzS8vM5rN5Zs/BaYfzaW0RHqvh j22w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=8hl/LLCzlNgia18tGLkMxMwC+o/IWFixbYnY6JNcFbA=; b=mnlPtizBqWvJ43iHrOJ7msHDUPYRCuzWEP3Cb9VskqYcQ9VV6nVniK5A/rtArXkBPv Rl/tzNyBHm1rMAla1hZsFr8fEDR06V1IWJXfbrY6rm5zDFroaAXKUQHt2/udsuTgcNpx AqJ7TK6ZAvh+KsPyKndk36T7bWydgmZ+/ebnpXEsgOSPzNOcaOo2DKMq3iuxVtwsV98V VPY/DKEe5/wZKCGdrnk7N5Nd8OPQQkKmglj1SD1HsoVsXp2hOaYpYexGxJAyc9DyLjOy XmAVRczG63seI4iE4OP2F7c/WIpeiCgAl2vQsPHpI7BG7pdSE+ZbkkiZ6AmR5o5DZNVX igMQ== X-Gm-Message-State: ACrzQf3aEwss3AHRN4RH39ALREahTtHFePjj97OWM8tm0x1bso3vPPh4 F47J4j5AVxaKXsisqAKHkPZT6A== X-Google-Smtp-Source: AMsMyM6pMcYxtOluL32pI2tmxKz4ufwSf6mc+ZyTTF40Lcym/AIaYxXSAMASqOMU6uD5yPxAkhYnQw== X-Received: by 2002:a05:6871:b26:b0:127:7d57:9e28 with SMTP id fq38-20020a0568710b2600b001277d579e28mr3425797oab.141.1664319255441; Tue, 27 Sep 2022 15:54:15 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:15 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, Julien Panis , William Breathitt Gray Subject: [PATCH 11/12] counter: ti-ecap-capture: capture driver support for ECAP Date: Tue, 27 Sep 2022 18:53:45 -0400 Message-Id: <25644ce1f2fd15d116977770ede20e024f658513.1664318353.git.william.gray@linaro.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Julien Panis ECAP hardware on TI AM62x SoC supports capture feature. It can be used to timestamp events (falling/rising edges) detected on input signal. This commit adds capture driver support for ECAP hardware on AM62x SoC. In the ECAP hardware, capture pin can also be configured to be in PWM mode. Current implementation only supports capture operating mode. Hardware also supports timebase sync between multiple instances, but this driver supports simple independent capture functionality. Signed-off-by: Julien Panis Link: https://lore.kernel.org/r/20220923142437.271328-4-jpanis@baylibre.com/ Signed-off-by: William Breathitt Gray --- drivers/counter/Kconfig | 15 + drivers/counter/Makefile | 1 + drivers/counter/ti-ecap-capture.c | 614 ++++++++++++++++++++++++++++++ 3 files changed, 630 insertions(+) create mode 100644 drivers/counter/ti-ecap-capture.c diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig index 5edd155f1911..d388bf26f4dc 100644 --- a/drivers/counter/Kconfig +++ b/drivers/counter/Kconfig @@ -101,4 +101,19 @@ config INTEL_QEP To compile this driver as a module, choose M here: the module will be called intel-qep. +config TI_ECAP_CAPTURE + tristate "TI eCAP capture driver" + depends on ARCH_OMAP2PLUS || ARCH_DAVINCI_DA8XX || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST + depends on HAS_IOMEM + select REGMAP_MMIO + help + Select this option to enable the Texas Instruments Enhanced Capture + (eCAP) driver in input mode. + + It can be used to timestamp events (falling/rising edges) detected + on ECAP input signal. + + To compile this driver as a module, choose M here: the module + will be called ti-ecap-capture. + endif # COUNTER diff --git a/drivers/counter/Makefile b/drivers/counter/Makefile index 8fde6c100ebc..b9a369e0d4fc 100644 --- a/drivers/counter/Makefile +++ b/drivers/counter/Makefile @@ -14,3 +14,4 @@ obj-$(CONFIG_TI_EQEP) += ti-eqep.o obj-$(CONFIG_FTM_QUADDEC) += ftm-quaddec.o obj-$(CONFIG_MICROCHIP_TCB_CAPTURE) += microchip-tcb-capture.o obj-$(CONFIG_INTEL_QEP) += intel-qep.o +obj-$(CONFIG_TI_ECAP_CAPTURE) += ti-ecap-capture.o diff --git a/drivers/counter/ti-ecap-capture.c b/drivers/counter/ti-ecap-capture.c new file mode 100644 index 000000000000..af10de30aba5 --- /dev/null +++ b/drivers/counter/ti-ecap-capture.c @@ -0,0 +1,614 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * ECAP Capture driver + * + * Copyright (C) 2022 Julien Panis + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define ECAP_DRV_NAME "ecap" + +/* ECAP event IDs */ +#define ECAP_CEVT1 0 +#define ECAP_CEVT2 1 +#define ECAP_CEVT3 2 +#define ECAP_CEVT4 3 +#define ECAP_CNTOVF 4 + +#define ECAP_CEVT_LAST ECAP_CEVT4 +#define ECAP_NB_CEVT (ECAP_CEVT_LAST + 1) + +#define ECAP_EVT_LAST ECAP_CNTOVF +#define ECAP_NB_EVT (ECAP_EVT_LAST + 1) + +/* Registers */ +#define ECAP_TSCNT_REG 0x00 + +#define ECAP_CAP_REG(i) (((i) << 2) + 0x08) + +#define ECAP_ECCTL_REG 0x28 +#define ECAP_CAPPOL_BIT(i) BIT((i) << 1) +#define ECAP_EV_MODE_MASK GENMASK(7, 0) +#define ECAP_CAPLDEN_BIT BIT(8) +#define ECAP_CONT_ONESHT_BIT BIT(16) +#define ECAP_STOPVALUE_MASK GENMASK(18, 17) +#define ECAP_TSCNTSTP_BIT BIT(20) +#define ECAP_SYNCO_DIS_MASK GENMASK(23, 22) +#define ECAP_CAP_APWM_BIT BIT(25) +#define ECAP_ECCTL_EN_MASK (ECAP_CAPLDEN_BIT | ECAP_TSCNTSTP_BIT) +#define ECAP_ECCTL_CFG_MASK (ECAP_SYNCO_DIS_MASK | ECAP_STOPVALUE_MASK \ + | ECAP_ECCTL_EN_MASK | ECAP_CAP_APWM_BIT \ + | ECAP_CONT_ONESHT_BIT) + +#define ECAP_ECINT_EN_FLG_REG 0x2c +#define ECAP_EVT_EN_MASK GENMASK(ECAP_NB_EVT, ECAP_NB_CEVT) +#define ECAP_EVT_FLG_BIT(i) BIT((i) + 17) + +#define ECAP_ECINT_CLR_FRC_REG 0x30 +#define ECAP_INT_CLR_BIT BIT(0) +#define ECAP_EVT_CLR_BIT(i) BIT((i) + 1) +#define ECAP_EVT_CLR_MASK GENMASK(ECAP_NB_EVT, 0) + +#define ECAP_PID_REG 0x5c + +/* ECAP signals */ +#define ECAP_CLOCK_SIG 0 +#define ECAP_INPUT_SIG 1 + +static const struct regmap_config ecap_cnt_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = ECAP_PID_REG, +}; + +/** + * struct ecap_cnt_dev - device private data structure + * @enabled: device state + * @lock: synchronization lock to prevent I/O race conditions + * @clk: device clock + * @regmap: device register map + * @nb_ovf: number of overflows since capture start + * @pm_ctx: device context for PM operations + * @pm_ctx.ev_mode: event mode bits + * @pm_ctx.time_cntr: timestamp counter value + */ +struct ecap_cnt_dev { + bool enabled; + struct mutex lock; + struct clk *clk; + struct regmap *regmap; + atomic_t nb_ovf; + struct { + u8 ev_mode; + u32 time_cntr; + } pm_ctx; +}; + +static u8 ecap_cnt_capture_get_evmode(struct counter_device *counter) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + unsigned int regval; + + pm_runtime_get_sync(counter->parent); + regmap_read(ecap_dev->regmap, ECAP_ECCTL_REG, ®val); + pm_runtime_put_sync(counter->parent); + + return regval; +} + +static void ecap_cnt_capture_set_evmode(struct counter_device *counter, u8 ev_mode) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + + pm_runtime_get_sync(counter->parent); + regmap_update_bits(ecap_dev->regmap, ECAP_ECCTL_REG, ECAP_EV_MODE_MASK, ev_mode); + pm_runtime_put_sync(counter->parent); +} + +static void ecap_cnt_capture_enable(struct counter_device *counter) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + + pm_runtime_get_sync(counter->parent); + + /* Enable interrupts on events */ + regmap_update_bits(ecap_dev->regmap, ECAP_ECINT_EN_FLG_REG, + ECAP_EVT_EN_MASK, ECAP_EVT_EN_MASK); + + /* Run counter */ + regmap_update_bits(ecap_dev->regmap, ECAP_ECCTL_REG, ECAP_ECCTL_CFG_MASK, + ECAP_SYNCO_DIS_MASK | ECAP_STOPVALUE_MASK | ECAP_ECCTL_EN_MASK); +} + +static void ecap_cnt_capture_disable(struct counter_device *counter) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + + /* Stop counter */ + regmap_update_bits(ecap_dev->regmap, ECAP_ECCTL_REG, ECAP_ECCTL_EN_MASK, 0); + + /* Disable interrupts on events */ + regmap_update_bits(ecap_dev->regmap, ECAP_ECINT_EN_FLG_REG, ECAP_EVT_EN_MASK, 0); + + pm_runtime_put_sync(counter->parent); +} + +static u32 ecap_cnt_count_get_val(struct counter_device *counter, unsigned int reg) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + unsigned int regval; + + pm_runtime_get_sync(counter->parent); + regmap_read(ecap_dev->regmap, reg, ®val); + pm_runtime_put_sync(counter->parent); + + return regval; +} + +static void ecap_cnt_count_set_val(struct counter_device *counter, unsigned int reg, u32 val) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + + pm_runtime_get_sync(counter->parent); + regmap_write(ecap_dev->regmap, reg, val); + pm_runtime_put_sync(counter->parent); +} + +static int ecap_cnt_count_read(struct counter_device *counter, + struct counter_count *count, u64 *val) +{ + *val = ecap_cnt_count_get_val(counter, ECAP_TSCNT_REG); + + return 0; +} + +static int ecap_cnt_count_write(struct counter_device *counter, + struct counter_count *count, u64 val) +{ + if (val > U32_MAX) + return -ERANGE; + + ecap_cnt_count_set_val(counter, ECAP_TSCNT_REG, val); + + return 0; +} + +static int ecap_cnt_function_read(struct counter_device *counter, + struct counter_count *count, + enum counter_function *function) +{ + *function = COUNTER_FUNCTION_INCREASE; + + return 0; +} + +static int ecap_cnt_action_read(struct counter_device *counter, + struct counter_count *count, + struct counter_synapse *synapse, + enum counter_synapse_action *action) +{ + *action = (synapse->signal->id == ECAP_CLOCK_SIG) ? + COUNTER_SYNAPSE_ACTION_RISING_EDGE : + COUNTER_SYNAPSE_ACTION_NONE; + + return 0; +} + +static int ecap_cnt_watch_validate(struct counter_device *counter, + const struct counter_watch *watch) +{ + if (watch->channel > ECAP_CEVT_LAST) + return -EINVAL; + + switch (watch->event) { + case COUNTER_EVENT_CAPTURE: + case COUNTER_EVENT_OVERFLOW: + return 0; + default: + return -EINVAL; + } +} + +static int ecap_cnt_clk_get_freq(struct counter_device *counter, + struct counter_signal *signal, u64 *freq) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + + *freq = clk_get_rate(ecap_dev->clk); + + return 0; +} + +static int ecap_cnt_pol_read(struct counter_device *counter, + struct counter_signal *signal, + size_t idx, enum counter_signal_polarity *pol) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + int bitval; + + pm_runtime_get_sync(counter->parent); + bitval = regmap_test_bits(ecap_dev->regmap, ECAP_ECCTL_REG, ECAP_CAPPOL_BIT(idx)); + pm_runtime_put_sync(counter->parent); + + *pol = bitval ? COUNTER_SIGNAL_POLARITY_NEGATIVE : COUNTER_SIGNAL_POLARITY_POSITIVE; + + return 0; +} + +static int ecap_cnt_pol_write(struct counter_device *counter, + struct counter_signal *signal, + size_t idx, enum counter_signal_polarity pol) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + + pm_runtime_get_sync(counter->parent); + if (pol == COUNTER_SIGNAL_POLARITY_NEGATIVE) + regmap_set_bits(ecap_dev->regmap, ECAP_ECCTL_REG, ECAP_CAPPOL_BIT(idx)); + else + regmap_clear_bits(ecap_dev->regmap, ECAP_ECCTL_REG, ECAP_CAPPOL_BIT(idx)); + pm_runtime_put_sync(counter->parent); + + return 0; +} + +static int ecap_cnt_cap_read(struct counter_device *counter, + struct counter_count *count, + size_t idx, u64 *cap) +{ + *cap = ecap_cnt_count_get_val(counter, ECAP_CAP_REG(idx)); + + return 0; +} + +static int ecap_cnt_cap_write(struct counter_device *counter, + struct counter_count *count, + size_t idx, u64 cap) +{ + if (cap > U32_MAX) + return -ERANGE; + + ecap_cnt_count_set_val(counter, ECAP_CAP_REG(idx), cap); + + return 0; +} + +static int ecap_cnt_nb_ovf_read(struct counter_device *counter, + struct counter_count *count, u64 *val) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + + *val = atomic_read(&ecap_dev->nb_ovf); + + return 0; +} + +static int ecap_cnt_nb_ovf_write(struct counter_device *counter, + struct counter_count *count, u64 val) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + + if (val > U32_MAX) + return -ERANGE; + + atomic_set(&ecap_dev->nb_ovf, val); + + return 0; +} + +static int ecap_cnt_ceiling_read(struct counter_device *counter, + struct counter_count *count, u64 *val) +{ + *val = U32_MAX; + + return 0; +} + +static int ecap_cnt_enable_read(struct counter_device *counter, + struct counter_count *count, u8 *enable) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + + *enable = ecap_dev->enabled; + + return 0; +} + +static int ecap_cnt_enable_write(struct counter_device *counter, + struct counter_count *count, u8 enable) +{ + struct ecap_cnt_dev *ecap_dev = counter_priv(counter); + + mutex_lock(&ecap_dev->lock); + + if (enable == ecap_dev->enabled) + goto out; + + if (enable) + ecap_cnt_capture_enable(counter); + else + ecap_cnt_capture_disable(counter); + ecap_dev->enabled = enable; + +out: + mutex_unlock(&ecap_dev->lock); + + return 0; +} + +static const struct counter_ops ecap_cnt_ops = { + .count_read = ecap_cnt_count_read, + .count_write = ecap_cnt_count_write, + .function_read = ecap_cnt_function_read, + .action_read = ecap_cnt_action_read, + .watch_validate = ecap_cnt_watch_validate, +}; + +static const enum counter_function ecap_cnt_functions[] = { + COUNTER_FUNCTION_INCREASE, +}; + +static const enum counter_synapse_action ecap_cnt_clock_actions[] = { + COUNTER_SYNAPSE_ACTION_RISING_EDGE, +}; + +static const enum counter_synapse_action ecap_cnt_input_actions[] = { + COUNTER_SYNAPSE_ACTION_NONE, +}; + +static struct counter_comp ecap_cnt_clock_ext[] = { + COUNTER_COMP_SIGNAL_U64("frequency", ecap_cnt_clk_get_freq, NULL), +}; + +static const enum counter_signal_polarity ecap_cnt_pol_avail[] = { + COUNTER_SIGNAL_POLARITY_POSITIVE, + COUNTER_SIGNAL_POLARITY_NEGATIVE, +}; + +static DEFINE_COUNTER_ARRAY_POLARITY(ecap_cnt_pol_array, ecap_cnt_pol_avail, ECAP_NB_CEVT); + +static struct counter_comp ecap_cnt_signal_ext[] = { + COUNTER_COMP_ARRAY_POLARITY(ecap_cnt_pol_read, ecap_cnt_pol_write, ecap_cnt_pol_array), +}; + +static struct counter_signal ecap_cnt_signals[] = { + { + .id = ECAP_CLOCK_SIG, + .name = "Clock Signal", + .ext = ecap_cnt_clock_ext, + .num_ext = ARRAY_SIZE(ecap_cnt_clock_ext), + }, + { + .id = ECAP_INPUT_SIG, + .name = "Input Signal", + .ext = ecap_cnt_signal_ext, + .num_ext = ARRAY_SIZE(ecap_cnt_signal_ext), + }, +}; + +static struct counter_synapse ecap_cnt_synapses[] = { + { + .actions_list = ecap_cnt_clock_actions, + .num_actions = ARRAY_SIZE(ecap_cnt_clock_actions), + .signal = &ecap_cnt_signals[ECAP_CLOCK_SIG], + }, + { + .actions_list = ecap_cnt_input_actions, + .num_actions = ARRAY_SIZE(ecap_cnt_input_actions), + .signal = &ecap_cnt_signals[ECAP_INPUT_SIG], + }, +}; + +static DEFINE_COUNTER_ARRAY_CAPTURE(ecap_cnt_cap_array, ECAP_NB_CEVT); + +static struct counter_comp ecap_cnt_count_ext[] = { + COUNTER_COMP_ARRAY_CAPTURE(ecap_cnt_cap_read, ecap_cnt_cap_write, ecap_cnt_cap_array), + COUNTER_COMP_COUNT_U64("num_overflows", ecap_cnt_nb_ovf_read, ecap_cnt_nb_ovf_write), + COUNTER_COMP_CEILING(ecap_cnt_ceiling_read, NULL), + COUNTER_COMP_ENABLE(ecap_cnt_enable_read, ecap_cnt_enable_write), +}; + +static struct counter_count ecap_cnt_counts[] = { + { + .name = "Timestamp Counter", + .functions_list = ecap_cnt_functions, + .num_functions = ARRAY_SIZE(ecap_cnt_functions), + .synapses = ecap_cnt_synapses, + .num_synapses = ARRAY_SIZE(ecap_cnt_synapses), + .ext = ecap_cnt_count_ext, + .num_ext = ARRAY_SIZE(ecap_cnt_count_ext), + }, +}; + +static irqreturn_t ecap_cnt_isr(int irq, void *dev_id) +{ + struct counter_device *counter_dev = dev_id; + struct ecap_cnt_dev *ecap_dev = counter_priv(counter_dev); + unsigned int clr = 0; + unsigned int flg; + int i; + + regmap_read(ecap_dev->regmap, ECAP_ECINT_EN_FLG_REG, &flg); + + /* Check capture events */ + for (i = 0 ; i < ECAP_NB_CEVT ; i++) { + if (flg & ECAP_EVT_FLG_BIT(i)) { + counter_push_event(counter_dev, COUNTER_EVENT_CAPTURE, i); + clr |= ECAP_EVT_CLR_BIT(i); + } + } + + /* Check counter overflow */ + if (flg & ECAP_EVT_FLG_BIT(ECAP_CNTOVF)) { + atomic_inc(&ecap_dev->nb_ovf); + for (i = 0 ; i < ECAP_NB_CEVT ; i++) + counter_push_event(counter_dev, COUNTER_EVENT_OVERFLOW, i); + clr |= ECAP_EVT_CLR_BIT(ECAP_CNTOVF); + } + + clr |= ECAP_INT_CLR_BIT; + regmap_update_bits(ecap_dev->regmap, ECAP_ECINT_CLR_FRC_REG, ECAP_EVT_CLR_MASK, clr); + + return IRQ_HANDLED; +} + +static void ecap_cnt_pm_disable(void *dev) +{ + pm_runtime_disable(dev); +} + +static int ecap_cnt_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct ecap_cnt_dev *ecap_dev; + struct counter_device *counter_dev; + void __iomem *mmio_base; + unsigned long clk_rate; + int ret; + + counter_dev = devm_counter_alloc(dev, sizeof(*ecap_dev)); + if (IS_ERR(counter_dev)) + return PTR_ERR(counter_dev); + + counter_dev->name = ECAP_DRV_NAME; + counter_dev->parent = dev; + counter_dev->ops = &ecap_cnt_ops; + counter_dev->signals = ecap_cnt_signals; + counter_dev->num_signals = ARRAY_SIZE(ecap_cnt_signals); + counter_dev->counts = ecap_cnt_counts; + counter_dev->num_counts = ARRAY_SIZE(ecap_cnt_counts); + + ecap_dev = counter_priv(counter_dev); + + mutex_init(&ecap_dev->lock); + + ecap_dev->clk = devm_clk_get_enabled(dev, "fck"); + if (IS_ERR(ecap_dev->clk)) + return dev_err_probe(dev, PTR_ERR(ecap_dev->clk), "failed to get clock\n"); + + clk_rate = clk_get_rate(ecap_dev->clk); + if (!clk_rate) { + dev_err(dev, "failed to get clock rate\n"); + return -EINVAL; + } + + mmio_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(mmio_base)) + return PTR_ERR(mmio_base); + + ecap_dev->regmap = devm_regmap_init_mmio(dev, mmio_base, &ecap_cnt_regmap_config); + if (IS_ERR(ecap_dev->regmap)) + return dev_err_probe(dev, PTR_ERR(ecap_dev->regmap), "failed to init regmap\n"); + + ret = platform_get_irq(pdev, 0); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to get irq\n"); + + ret = devm_request_irq(dev, ret, ecap_cnt_isr, 0, pdev->name, counter_dev); + if (ret) + return dev_err_probe(dev, ret, "failed to request irq\n"); + + platform_set_drvdata(pdev, counter_dev); + + pm_runtime_enable(dev); + + /* Register a cleanup callback to care for disabling PM */ + ret = devm_add_action_or_reset(dev, ecap_cnt_pm_disable, dev); + if (ret) + return dev_err_probe(dev, ret, "failed to add pm disable action\n"); + + ret = devm_counter_add(dev, counter_dev); + if (ret) + return dev_err_probe(dev, ret, "failed to add counter\n"); + + return 0; +} + +static int ecap_cnt_remove(struct platform_device *pdev) +{ + struct counter_device *counter_dev = platform_get_drvdata(pdev); + struct ecap_cnt_dev *ecap_dev = counter_priv(counter_dev); + + if (ecap_dev->enabled) + ecap_cnt_capture_disable(counter_dev); + + return 0; +} + +static int ecap_cnt_suspend(struct device *dev) +{ + struct counter_device *counter_dev = dev_get_drvdata(dev); + struct ecap_cnt_dev *ecap_dev = counter_priv(counter_dev); + + /* If eCAP is running, stop capture then save timestamp counter */ + if (ecap_dev->enabled) { + /* + * Disabling capture has the following effects: + * - interrupts are disabled + * - loading of capture registers is disabled + * - timebase counter is stopped + */ + ecap_cnt_capture_disable(counter_dev); + ecap_dev->pm_ctx.time_cntr = ecap_cnt_count_get_val(counter_dev, ECAP_TSCNT_REG); + } + + ecap_dev->pm_ctx.ev_mode = ecap_cnt_capture_get_evmode(counter_dev); + + clk_disable(ecap_dev->clk); + + return 0; +} + +static int ecap_cnt_resume(struct device *dev) +{ + struct counter_device *counter_dev = dev_get_drvdata(dev); + struct ecap_cnt_dev *ecap_dev = counter_priv(counter_dev); + + clk_enable(ecap_dev->clk); + + ecap_cnt_capture_set_evmode(counter_dev, ecap_dev->pm_ctx.ev_mode); + + /* If eCAP was running, restore timestamp counter then run capture */ + if (ecap_dev->enabled) { + ecap_cnt_count_set_val(counter_dev, ECAP_TSCNT_REG, ecap_dev->pm_ctx.time_cntr); + ecap_cnt_capture_enable(counter_dev); + } + + return 0; +} + +static DEFINE_SIMPLE_DEV_PM_OPS(ecap_cnt_pm_ops, ecap_cnt_suspend, ecap_cnt_resume); + +static const struct of_device_id ecap_cnt_of_match[] = { + { .compatible = "ti,am62-ecap-capture" }, + {}, +}; +MODULE_DEVICE_TABLE(of, ecap_cnt_of_match); + +static struct platform_driver ecap_cnt_driver = { + .probe = ecap_cnt_probe, + .remove = ecap_cnt_remove, + .driver = { + .name = "ecap-capture", + .of_match_table = ecap_cnt_of_match, + .pm = pm_sleep_ptr(&ecap_cnt_pm_ops), + }, +}; +module_platform_driver(ecap_cnt_driver); + +MODULE_DESCRIPTION("ECAP Capture driver"); +MODULE_AUTHOR("Julien Panis "); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(COUNTER); From patchwork Tue Sep 27 22:53:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12991453 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BDC4C54EE9 for ; Tue, 27 Sep 2022 22:54:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231726AbiI0WyW (ORCPT ); Tue, 27 Sep 2022 18:54:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231269AbiI0WyR (ORCPT ); Tue, 27 Sep 2022 18:54:17 -0400 Received: from mail-oa1-x2f.google.com (mail-oa1-x2f.google.com [IPv6:2001:4860:4864:20::2f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8593DB514A for ; Tue, 27 Sep 2022 15:54:16 -0700 (PDT) Received: by mail-oa1-x2f.google.com with SMTP id 586e51a60fabf-1280590722dso15237723fac.1 for ; Tue, 27 Sep 2022 15:54:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=TSmzC4k5RDlY3jB66Q9l4SG5pWj9tmKJxCdO7HIT4mA=; b=TUGRr/9vIRDAvWK9o5G7Hf8VSrXugLilSiMbDYHPjejjZCRWfIu4Z/qp1MyvEA36uV uuLCH2g2oB4XmEp228HJ6QWJ71Gw3Pw6veajbUTlYB7UCoLdFgiv1FkDecaCwA/pZCAJ 7aOgz025kQXHwRZ7b/ttiy9wdkwgksQDTN1DJavXWJUn4Yorp7ZLs6taZLLwSSUlmfdA C+SkBws9IIWLAgQ5iqUcJ98phqRXsgG8L8oED7z1+l6GZc0SIjJu8huMFq3eNGB4Irqm KVnJl2Bf+7pQg57yzr+OKe+AaVgG1Xjkr9tVvIEkDr53ovgarwjHoYeJIWe5PLZs16pH 3GDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=TSmzC4k5RDlY3jB66Q9l4SG5pWj9tmKJxCdO7HIT4mA=; b=pQcgD3OiKMHx8XVxOSWO1k2z5QHWvU8MSwrUPq/0KkDz4Tcg7eOh0eEdwxRGLqeJTE PnvT4upfSIOCESjx7h+CgfR18udE77EFEz4goZW1RYBuLp7Oqu35uZQc1bHUVlo0xo4M IQj49iafgMKyzWGHyI3tHVGm3FXjzsxjW09L92RXmROsnlllVeFwdtPjrHkNA2k47hIk uFMcFJh0Nmk4yXwVixxm2EifvR23ke21bQGfeMP1m1myP8AspjBnin5XE+F9SQSI1wey FvSIBRfkdYrPwUWzDWD6t6c0aaB+hovyX1Rwuy8nnl5951vQas1H9eJ4g8C4b4cpo/Km cYeA== X-Gm-Message-State: ACrzQf20h+wS7X04KkzS/5/AHDFcB3TQQRYMa7tKT6wesdVUxhX3tmjp IJv68QnQ9xThwIbk+7ECxm/a1n9rycA/kjom X-Google-Smtp-Source: AMsMyM6XTRy1t/WFI+/Rmc0deOf4NfdItQVd8UHg/gjchlBdUi/LE7GHeO3KT88Y89EzzUSeLB+EyA== X-Received: by 2002:a05:6870:639e:b0:127:bbc2:223e with SMTP id t30-20020a056870639e00b00127bbc2223emr3591065oap.167.1664319256262; Tue, 27 Sep 2022 15:54:16 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id v186-20020aca61c3000000b00350c5d946casm1188965oib.4.2022.09.27.15.54.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 15:54:16 -0700 (PDT) From: William Breathitt Gray To: gregkh@linuxfoundation.org Cc: linux-iio@vger.kernel.org, Julien Panis , William Breathitt Gray Subject: [PATCH 12/12] MAINTAINERS: add TI ECAP driver info Date: Tue, 27 Sep 2022 18:53:46 -0400 Message-Id: X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Julien Panis This commit adds driver info for TI ECAP used in capture operating mode. Signed-off-by: Julien Panis Link: https://lore.kernel.org/r/20220923142437.271328-5-jpanis@baylibre.com/ Signed-off-by: William Breathitt Gray --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d4999f68bda8..c189117f58eb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20322,6 +20322,15 @@ T: git git://linuxtv.org/mhadli/v4l-dvb-davinci_devices.git F: drivers/media/platform/ti/davinci/ F: include/media/davinci/ +TI ENHANCED CAPTURE (eCAP) DRIVER +M: Vignesh Raghavendra +R: Julien Panis +L: linux-iio@vger.kernel.org +L: linux-omap@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml +F: drivers/counter/ti-ecap-capture.c + TI ENHANCED QUADRATURE ENCODER PULSE (eQEP) DRIVER R: David Lechner L: linux-iio@vger.kernel.org