From patchwork Thu Sep 29 17:04:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Diogo Ivo X-Patchwork-Id: 12994512 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7AD7FC433FE for ; Thu, 29 Sep 2022 17:52:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 66D6A10EBA9; Thu, 29 Sep 2022 17:52:41 +0000 (UTC) Received: from smtp1.tecnico.ulisboa.pt (smtp1.tecnico.ulisboa.pt [193.136.128.21]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1BD6910E031 for ; Thu, 29 Sep 2022 17:11:50 +0000 (UTC) Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp1.tecnico.ulisboa.pt (Postfix) with ESMTP id D36626003C1A; Thu, 29 Sep 2022 18:05:00 +0100 (WEST) X-Virus-Scanned: by amavisd-new-2.11.0 (20160426) (Debian) at tecnico.ulisboa.pt Received: from smtp1.tecnico.ulisboa.pt ([127.0.0.1]) by localhost (smtp1.tecnico.ulisboa.pt [127.0.0.1]) (amavisd-new, port 10025) with LMTP id e9jcLLVYttq7; Thu, 29 Sep 2022 18:04:56 +0100 (WEST) Received: from mail1.tecnico.ulisboa.pt (mail1.ist.utl.pt [193.136.128.10]) by smtp1.tecnico.ulisboa.pt (Postfix) with ESMTPS id C4C766005C23; Thu, 29 Sep 2022 18:04:56 +0100 (WEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=tecnico.ulisboa.pt; s=mail; t=1664471096; bh=ll+g2rDaCObbl1dD5PlnPH9uSgkTwBiWKYOxd79ugPQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Ebc3vckAN90poPYjw2FSZ1NeG1WOJp9sjt2lTbAF2tYLcf206YosCmZNOTDTYkebG s+V8bJmug71aDHJcFX0vW69OdEWcHuKJkxBWc9jTYF9J5ce8oxxpj86sNNhfsZ26Xc xVdiWf2yEU5gKq4iR8onxQ2Vz+NTfcyvRkodWAdQ= Received: from wslaptop.lan (unknown [IPv6:2001:818:dcb5:dc00:7a88:7f12:8ed8:518d]) (Authenticated sender: ist187313) by mail1.tecnico.ulisboa.pt (Postfix) with ESMTPSA id 81AD7360086; Thu, 29 Sep 2022 18:04:56 +0100 (WEST) From: Diogo Ivo To: Subject: [PATCH 1/4] dt-bindings: display: Add bindings for JDI LPM102A188A Date: Thu, 29 Sep 2022 18:04:59 +0100 Message-Id: <20220929170502.1034040-2-diogo.ivo@tecnico.ulisboa.pt> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220929170502.1034040-1-diogo.ivo@tecnico.ulisboa.pt> References: <20220929170502.1034040-1-diogo.ivo@tecnico.ulisboa.pt> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 29 Sep 2022 17:52:24 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, arnd@arndb.de, airlied@linux.ie, dri-devel@lists.freedesktop.org, jonathanh@nvidia.com, Diogo Ivo , robh+dt@kernel.org, thierry.reding@gmail.com, linux-tegra@vger.kernel.org, sam@ravnborg.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The LPM102A188A is a 10.2" 2560x1800 IPS panel found in the Google Pixel C. Signed-off-by: Diogo Ivo --- .../display/panel/jdi,lpm102a188a.yaml | 100 ++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/jdi,lpm102a188a.yaml diff --git a/Documentation/devicetree/bindings/display/panel/jdi,lpm102a188a.yaml b/Documentation/devicetree/bindings/display/panel/jdi,lpm102a188a.yaml new file mode 100644 index 000000000000..97f9db7152da --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/jdi,lpm102a188a.yaml @@ -0,0 +1,100 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/jdi,lpm102a188a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: JDI LPM102A188A 2560x1800 10.2" DSI Panel + +maintainers: + - Diogo Ivo + +description: | + This panel requires a dual-channel DSI host to operate. It supports two modes: + - left-right: each channel drives the left or right half of the screen + - even-odd: each channel drives the even or odd lines of the screen + + Each of the DSI channels controls a separate DSI peripheral. The peripheral + driven by the first link (DSI-LINK1) is considered the primary peripheral + and controls the device. The 'link2' property contains a phandle to the + peripheral driven by the second link (DSI-LINK2). + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: jdi,lpm102a188a + + reg: true + enable-gpios: true + reset-gpios: true + power-supply: true + backlight: true + + ts-reset-gpios: + maxItems: 1 + description: | + Specifier for a GPIO connected to the touchscreen reset control signal. + The reset signal is active low. + + ddi-supply: + description: The regulator that provides IOVCC (1.8V). + + link2: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + phandle to the DSI peripheral on the secondary link. Note that the + presence of this property marks the containing node as DSI-LINK1. + +required: + - compatible + - reg + +if: + required: + - link2 +then: + required: + - power-supply + - ddi-supply + - enable-gpios + - reset-gpios + +additionalProperties: false + +examples: + - | + #include + #include + + dsia: dsi@54300000 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x54300000 0x0 0x00040000>; + + link2: panel@0 { + compatible = "jdi,lpm102a188a"; + reg = <0>; + }; + }; + + dsib: dsi@54400000{ + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x54400000 0x0 0x00040000>; + nvidia,ganged-mode = <&dsia>; + + link1: panel@0 { + compatible = "jdi,lpm102a188a"; + reg = <0>; + power-supply = <&pplcd_vdd>; + ddi-supply = <&pp1800_lcdio>; + enable-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; + link2 = <&link2>; + backlight = <&backlight>; + }; + }; + +... From patchwork Thu Sep 29 17:05:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Diogo Ivo X-Patchwork-Id: 12994510 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C463CC433F5 for ; Thu, 29 Sep 2022 17:52:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B55A10EBA8; Thu, 29 Sep 2022 17:52:26 +0000 (UTC) Received: from smtp1.tecnico.ulisboa.pt (smtp1.tecnico.ulisboa.pt [193.136.128.21]) by gabe.freedesktop.org (Postfix) with ESMTPS id DD8C210EB52 for ; Thu, 29 Sep 2022 17:11:49 +0000 (UTC) Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp1.tecnico.ulisboa.pt (Postfix) with ESMTP id 0668C6008836; Thu, 29 Sep 2022 18:05:00 +0100 (WEST) X-Virus-Scanned: by amavisd-new-2.11.0 (20160426) (Debian) at tecnico.ulisboa.pt Received: from smtp1.tecnico.ulisboa.pt ([127.0.0.1]) by localhost (smtp1.tecnico.ulisboa.pt [127.0.0.1]) (amavisd-new, port 10025) with LMTP id jEmwgPGU0KD3; Thu, 29 Sep 2022 18:04:57 +0100 (WEST) Received: from mail1.tecnico.ulisboa.pt (mail1.ist.utl.pt [193.136.128.10]) by smtp1.tecnico.ulisboa.pt (Postfix) with ESMTPS id 8038C6008772; Thu, 29 Sep 2022 18:04:57 +0100 (WEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=tecnico.ulisboa.pt; s=mail; t=1664471097; bh=YRT6lSNe5QX6TyDghu968Ip0/fGWKOZs9tdGpmcfqV4=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ZS3BklhKjXtjIJK7mDbsEsH9X8s5Wk7Swz/R95oEMNm6bLhhj37piX3KPIpN3m1PX hoQtD/ISmrWrkyVpJuHkG3cm9mIyoZpjETAex0M248THnyN+g3jSn76M3sWNYhSTVg M+tgSTHeH31s6VHQMV6DW5sVBFZsrsorV1I6XZdc= Received: from wslaptop.lan (unknown [IPv6:2001:818:dcb5:dc00:7a88:7f12:8ed8:518d]) (Authenticated sender: ist187313) by mail1.tecnico.ulisboa.pt (Postfix) with ESMTPSA id 58C73360086; Thu, 29 Sep 2022 18:04:57 +0100 (WEST) From: Diogo Ivo To: Subject: [PATCH 2/4] drm/tegra: dsi: Clear enable register if powered by bootloader Date: Thu, 29 Sep 2022 18:05:00 +0100 Message-Id: <20220929170502.1034040-3-diogo.ivo@tecnico.ulisboa.pt> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220929170502.1034040-1-diogo.ivo@tecnico.ulisboa.pt> References: <20220929170502.1034040-1-diogo.ivo@tecnico.ulisboa.pt> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 29 Sep 2022 17:52:24 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, arnd@arndb.de, airlied@linux.ie, dri-devel@lists.freedesktop.org, jonathanh@nvidia.com, Diogo Ivo , robh+dt@kernel.org, thierry.reding@gmail.com, linux-tegra@vger.kernel.org, sam@ravnborg.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" In cases where the DSI module is left on by the bootloader some panels may fail to initialize if the enable register is not cleared before the panel's initialization sequence. Clear it and add an optional device tree property to inform the driver if this is the case. Signed-off-by: Diogo Ivo --- drivers/gpu/drm/tegra/dsi.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c index de1333dc0d86..f66514379913 100644 --- a/drivers/gpu/drm/tegra/dsi.c +++ b/drivers/gpu/drm/tegra/dsi.c @@ -78,6 +78,8 @@ struct tegra_dsi { unsigned int video_fifo_depth; unsigned int host_fifo_depth; + bool enabled; + /* for ganged-mode support */ struct tegra_dsi *master; struct tegra_dsi *slave; @@ -460,6 +462,8 @@ static void tegra_dsi_enable(struct tegra_dsi *dsi) value |= DSI_POWER_CONTROL_ENABLE; tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); + dsi->enabled = true; + if (dsi->slave) tegra_dsi_enable(dsi->slave); } @@ -737,6 +741,8 @@ static void tegra_dsi_disable(struct tegra_dsi *dsi) value &= ~DSI_POWER_CONTROL_ENABLE; tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); + dsi->enabled = false; + if (dsi->slave) tegra_dsi_disable(dsi->slave); @@ -912,6 +918,27 @@ static void tegra_dsi_encoder_enable(struct drm_encoder *encoder) u32 value; int err; + /* If the bootloader enabled DSI it needs to be disabled + * in order for the panel initialization commands to be + * properly sent. + */ + if (dsi->enabled) { + if (dc) { + value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); + value &= ~DSI_ENABLE; + tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS); + + tegra_dc_commit(dc); + } + + err = tegra_dsi_wait_idle(dsi, 100); + if (err < 0) + dev_dbg(dsi->dev, "failed to idle DSI: %d\n", err); + + /* disable DSI controller */ + tegra_dsi_disable(dsi); + } + err = tegra_dsi_prepare(dsi); if (err < 0) { dev_err(dsi->dev, "failed to prepare: %d\n", err); @@ -1573,6 +1600,8 @@ static int tegra_dsi_probe(struct platform_device *pdev) dsi->output.connector.polled = DRM_CONNECTOR_POLL_HPD; + /* Check if the DSI module was left on by bootloader. */ + dsi->enabled = of_property_read_bool(pdev->dev.of_node, "nvidia,boot-on"); /* * Assume these values by default. When a DSI peripheral driver * attaches to the DSI host, the parameters will be taken from From patchwork Thu Sep 29 17:05:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Diogo Ivo X-Patchwork-Id: 12994514 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 716C3C4332F for ; Thu, 29 Sep 2022 17:53:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D950810EBAB; Thu, 29 Sep 2022 17:53:17 +0000 (UTC) Received: from smtp1.tecnico.ulisboa.pt (smtp1.tecnico.ulisboa.pt [IPv6:2001:690:2100:1::15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 62D8010E031 for ; Thu, 29 Sep 2022 17:11:49 +0000 (UTC) Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp1.tecnico.ulisboa.pt (Postfix) with ESMTP id 9B0AD6005C2F; Thu, 29 Sep 2022 18:05:01 +0100 (WEST) X-Virus-Scanned: by amavisd-new-2.11.0 (20160426) (Debian) at tecnico.ulisboa.pt Received: from smtp1.tecnico.ulisboa.pt ([127.0.0.1]) by localhost (smtp1.tecnico.ulisboa.pt [127.0.0.1]) (amavisd-new, port 10025) with LMTP id PycRUWYfMupE; Thu, 29 Sep 2022 18:04:58 +0100 (WEST) Received: from mail1.tecnico.ulisboa.pt (mail1.ist.utl.pt [193.136.128.10]) by smtp1.tecnico.ulisboa.pt (Postfix) with ESMTPS id 497276008794; Thu, 29 Sep 2022 18:04:58 +0100 (WEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=tecnico.ulisboa.pt; s=mail; t=1664471098; bh=7pS8IPOqmCVMvVUxfzNgkzmbFe8xypfIBmEIf/APCik=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=uwpBmAxiVRxabj1EsN8xzB1+zgW2Au+67/bvVfCMNjI0/AMNnuLumBWHchg9RAgVx P7sdU2ld9uibMxzIGReoJmS1ZQrQAmGDF7yuD0dQiJmKLHDGzp3ZiVmVdVo73+6HXb NMPkz2pUTJC6tGtG1EPoMf+g8D3xfCPB5FE4k+Mo= Received: from wslaptop.lan (unknown [IPv6:2001:818:dcb5:dc00:7a88:7f12:8ed8:518d]) (Authenticated sender: ist187313) by mail1.tecnico.ulisboa.pt (Postfix) with ESMTPSA id 1844B360086; Thu, 29 Sep 2022 18:04:58 +0100 (WEST) From: Diogo Ivo To: Subject: [PATCH 3/4] drm/panel: Add driver for JDI LPM102A188A Date: Thu, 29 Sep 2022 18:05:01 +0100 Message-Id: <20220929170502.1034040-4-diogo.ivo@tecnico.ulisboa.pt> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220929170502.1034040-1-diogo.ivo@tecnico.ulisboa.pt> References: <20220929170502.1034040-1-diogo.ivo@tecnico.ulisboa.pt> MIME-Version: 1.0 X-Mailman-Approved-At: Thu, 29 Sep 2022 17:52:24 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, arnd@arndb.de, airlied@linux.ie, dri-devel@lists.freedesktop.org, jonathanh@nvidia.com, Diogo Ivo , robh+dt@kernel.org, thierry.reding@gmail.com, linux-tegra@vger.kernel.org, sam@ravnborg.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The JDI LPM102A188A is a 2560x1800 IPS panel found in the Google Pixel C. This driver is based on the downstream GPLv2 driver released by Google written by Sean Paul [1], which was then adapted to the newer kernel APIs. [1]: https://android.googlesource.com/kernel/tegra/+/refs/heads/android-tegra-dragon-3.18-oreo/drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c Signed-off-by: Diogo Ivo --- drivers/gpu/drm/panel/Kconfig | 11 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c | 513 ++++++++++++++++++ 3 files changed, 525 insertions(+) create mode 100644 drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 38799effd00a..532a15a38b60 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -203,6 +203,17 @@ config DRM_PANEL_JDI_LT070ME05000 The panel has a 1200(RGB)×1920 (WUXGA) resolution and uses 24 bit per pixel. +config DRM_PANEL_JDI_LPM102A188A + tristate "JDI LPM102A188A DSI panel" + depends on OF && GPIOLIB + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for JDI LPM102A188A DSI + control mode panel as found in Google Pixel C devices. + The panel has a 2560×1800 resolution. It provides a MIPI DSI interface + to the host. + config DRM_PANEL_JDI_R63452 tristate "JDI R63452 Full HD DSI panel" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 42a7ab54234b..774a5ce0ebb8 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) += panel-innolux-ej030na.o obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o +obj-$(CONFIG_DRM_PANEL_JDI_LPM102A188A) += panel-jdi-lpm102a188a.o obj-$(CONFIG_DRM_PANEL_JDI_R63452) += panel-jdi-fhd-r63452.o obj-$(CONFIG_DRM_PANEL_KHADAS_TS050) += panel-khadas-ts050.o obj-$(CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04) += panel-kingdisplay-kd097d04.o diff --git a/drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c b/drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c new file mode 100644 index 000000000000..c7f13719d4ff --- /dev/null +++ b/drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c @@ -0,0 +1,513 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2014 Google, Inc. + * + * Copyright (C) 2022 Diogo Ivo + * + * Adapted from the downstream Pixel C driver written by Sean Paul + */ + +#include +#include +#include +#include +#include +#include + +#include