From patchwork Sat Oct 1 18:53:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Botka X-Patchwork-Id: 12996648 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48B6CC433FE for ; Sat, 1 Oct 2022 18:53:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229461AbiJASxc (ORCPT ); Sat, 1 Oct 2022 14:53:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229436AbiJASxb (ORCPT ); Sat, 1 Oct 2022 14:53:31 -0400 Received: from relay06.th.seeweb.it (relay06.th.seeweb.it [IPv6:2001:4b7a:2000:18::167]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0B8ACE23 for ; Sat, 1 Oct 2022 11:53:30 -0700 (PDT) Received: from TimeMachine.lan (adsl-dyn13.78-99-1.t-com.sk [78.99.1.13]) by m-r2.th.seeweb.it (Postfix) with ESMTPA id B3C4E3F326; Sat, 1 Oct 2022 20:53:26 +0200 (CEST) From: Martin Botka To: martin.botka1@gmail.com Cc: ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , AngeloGioacchino Del Regno , Marijn Suijten , Jami Kettunen , Paul Bouchara , Martin Botka , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/1] arm64: dts: qcom: sm6125: Add dispcc node Date: Sat, 1 Oct 2022 20:53:21 +0200 Message-Id: <20221001185321.492532-1-martin.botka@somainline.org> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the dispcc node for the newly added DISPCC driver for Qualcomm Technology Inc's SM6125 SoC. Signed-off-by: Martin Botka --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index 62f216bfca4f..ffbcee009279 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -3,6 +3,7 @@ * Copyright (c) 2021, Martin Botka */ +#include #include #include #include @@ -367,6 +368,17 @@ soc { ranges = <0x00 0x00 0x00 0xffffffff>; compatible = "simple-bus"; + dispcc: clock-controller@5f00000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "qcom,dispcc-sm6125"; + reg = <0x5f00000 0x20000>; + clocks = <&gcc GCC_DISP_AHB_CLK>; + clock-names = "cfg_ahb_clk"; + #clock-cells = <1>; + #power-domain-cells = <1>; + }; + tcsr_mutex: hwlock@340000 { compatible = "qcom,tcsr-mutex"; reg = <0x00340000 0x20000>;