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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2022 18:18:47.2365 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9f80a3fe-7389-45c7-b950-08daad475f03 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000C408.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB5662 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The endpoint function driver should undo the things done in core_init() and stop hardware access before deinitializing the controller. Add core_deinit() callback support for function driver to do this cleanup. This core_deinit() callback should be invoked by the controller driver before deinitializing the controller. Signed-off-by: Vidya Sagar --- V2: * Reworded the commit message drivers/pci/endpoint/pci-epc-core.c | 26 ++++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 5dac1496cf16..689450f01f75 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -732,6 +732,32 @@ void pci_epc_init_notify(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_init_notify); +/** + * pci_epc_deinit_notify() - Notify the EPF device that EPC device's core + * deinitialization is scheduled. + * @epc: the EPC device whose core deinitialization is scheduled + * + * Invoke to Notify the EPF device that the EPC device's deinitialization + * is scheduled. + */ +void pci_epc_deinit_notify(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (!epc || IS_ERR(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops->core_deinit) + epf->event_ops->core_deinit(epf); + mutex_unlock(&epf->lock); + } + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_deinit_notify); + /** * pci_epc_destroy() - destroy the EPC device * @epc: the EPC device that has to be destroyed diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 301bb0e53707..b95dc4b3e302 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -204,6 +204,7 @@ int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); void pci_epc_linkup(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); +void pci_epc_deinit_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); int pci_epc_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no, diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index a215dc8ce693..fa51579951db 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -70,10 +70,12 @@ struct pci_epf_ops { /** * struct pci_epf_event_ops - Callbacks for capturing the EPC events * @core_init: Callback for the EPC initialization complete event + * @core_deinit: Callback for the EPC deinitialization schedule event * @link_up: Callback for the EPC link up event */ struct pci_epc_event_ops { int (*core_init)(struct pci_epf *epf); + int (*core_deinit)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); }; From patchwork Thu Oct 13 18:18:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vidya Sagar X-Patchwork-Id: 13006283 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C2D3C4332F for ; Thu, 13 Oct 2022 18:30:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232006AbiJMSaa (ORCPT ); Thu, 13 Oct 2022 14:30:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231390AbiJMS3z (ORCPT ); Thu, 13 Oct 2022 14:29:55 -0400 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on20600.outbound.protection.outlook.com [IPv6:2a01:111:f400:7eae::600]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 052875F7D; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2022 18:18:51.2715 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9f97d747-93e6-4f22-6b45-08daad47616b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000C402.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5832 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add a wrapper for the pci_epc_deinit_notify() at the DWC layer for all the DesignWare based platform controller drivers to invoke during their respective endpoint controllers deinitialization. Signed-off-by: Vidya Sagar --- V2: * Reworded the commit message drivers/pci/controller/dwc/pcie-designware-ep.c | 8 ++++++++ drivers/pci/controller/dwc/pcie-designware.h | 5 +++++ 2 files changed, 13 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index f300ea2f7bf7..fd11c2e68fef 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -737,6 +737,14 @@ int dw_pcie_ep_init_notify(struct dw_pcie_ep *ep) } EXPORT_SYMBOL_GPL(dw_pcie_ep_init_notify); +void dw_pcie_ep_deinit_notify(struct dw_pcie_ep *ep) +{ + struct pci_epc *epc = ep->epc; + + pci_epc_deinit_notify(epc); +} +EXPORT_SYMBOL_GPL(dw_pcie_ep_deinit_notify); + int dw_pcie_ep_init(struct dw_pcie_ep *ep) { int ret; diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 7252513956b7..0f3ab39c5281 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -469,6 +469,7 @@ static inline void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, void dw_pcie_ep_linkup(struct dw_pcie_ep *ep); int dw_pcie_ep_init(struct dw_pcie_ep *ep); int dw_pcie_ep_init_notify(struct dw_pcie_ep *ep); +void dw_pcie_ep_deinit_notify(struct dw_pcie_ep *ep); void dw_pcie_ep_exit(struct dw_pcie_ep *ep); int dw_pcie_ep_raise_legacy_irq(struct dw_pcie_ep *ep, u8 func_no); int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, @@ -495,6 +496,10 @@ static inline int dw_pcie_ep_init_notify(struct dw_pcie_ep *ep) return 0; } +static inline void dw_pcie_ep_deinit_notify(struct dw_pcie_ep *ep) +{ +} + static inline void dw_pcie_ep_exit(struct dw_pcie_ep *ep) { } From patchwork Thu Oct 13 18:18:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vidya Sagar X-Patchwork-Id: 13006280 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E90DDC4332F for ; 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Thu, 13 Oct 2022 11:18:34 -0700 From: Vidya Sagar To: , , , , , , , CC: , , , , , , , Subject: [PATCH V2 3/4] PCI: endpoint: Delete list entry before freeing Date: Thu, 13 Oct 2022 23:48:14 +0530 Message-ID: <20221013181815.2133-4-vidyas@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221013181815.2133-1-vidyas@nvidia.com> References: <20221013181815.2133-1-vidyas@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT075:EE_|PH8PR12MB6770:EE_ X-MS-Office365-Filtering-Correlation-Id: 2eade0b4-9761-4f96-eda1-08daad476351 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: jB9YtQLgNpirn3xF45mL/axsRelsk+NXgCORsLowHaGGnDngLl791WQkFhh1lA3zBKAx7SBH7TmHG1/8yBkYR8349pvwaqoCbyeeGRt3awGPDZxIrEu1DKkOxFLEFCPEdOJ/Mu3SxAJLRbzRnyqN8HvTYqSukRUflueQsdIeO5MEy/ChhAktivAJUPzDZPhPawB/zSMCUKCIrS5dsosm9bNlNfglv4b7JsfpjdIL8KZpKtFJNJr3T0DHOOu6lfmYkrLR5Gso7rLL5FLgled9pA6fhNVULbXxmLWh8pCUa7v+D/Wo+7R1Xt3WCx2eNCJ8ckmqM6+T8CPDszaG2sMWJf/wearBnqC4/pLCXrGoilQ+FTFMUE1GjFS6GP7Gon5Bxs7ZgIJS9efiYJcEwoRJ2yG+r701gk+En0wlsej6ldk0tJazlLwlr9O2pjOfUEGYpn7uiXBcKZvfcFJrCz+TigrcZlMT+sw9htcZVyCM5nQ/ENh3S5deWNgI/77d8Ham8Mz4Tlpi3CCIpAhKqM3A2hTPvNLidbjxZq7u26uYHXzKIz5sfAlMhWjmdYxzaTK2sFWCsh+8s6jv2K0JqTsw0rCBNVOymeL9rGLPAcSN9qaBjVfSjSJd9dR2VkC6rd3y6ivLa8zyY1SebCOUTQ9EuDEfksNp1TjTyEcEl56mAewxUDnWdfcnHhoLB/JyUJ1JuZOKqqiDh36ATfxyOjUN3Vg3tILr1TS8xhI69riisy2Uwr6xfLg66LSPtBCAr789ILdMqlC3Xt00fru9fAiAug== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230022)(4636009)(346002)(39860400002)(136003)(396003)(376002)(451199015)(46966006)(36840700001)(40470700004)(36756003)(36860700001)(356005)(82740400003)(5660300002)(2906002)(7416002)(336012)(186003)(1076003)(2616005)(83380400001)(86362001)(7636003)(47076005)(426003)(7696005)(41300700001)(8676002)(110136005)(316002)(6666004)(54906003)(70206006)(70586007)(4326008)(478600001)(40480700001)(82310400005)(26005)(8936002)(40460700003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2022 18:18:54.5068 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2eade0b4-9761-4f96-eda1-08daad476351 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT075.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6770 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently, epf_group list is traversed, and each group entry is freed and epf_group list head is deleted in the end. Deleting the list head is corrupting the data in the group entries that are already freed, leading to random crashes. To fix this issue, delete each group entry and then free it, and don't delete epf_group list head. Signed-off-by: Vidya Sagar Reviewed-by: Manivannan Sadhasivam --- V2: * Reworded the commit message drivers/pci/endpoint/pci-epf-core.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci-epf-core.c index 9ed556936f48..a7f4ae33905d 100644 --- a/drivers/pci/endpoint/pci-epf-core.c +++ b/drivers/pci/endpoint/pci-epf-core.c @@ -340,9 +340,10 @@ static void pci_epf_remove_cfs(struct pci_epf_driver *driver) return; mutex_lock(&pci_epf_mutex); - list_for_each_entry_safe(group, tmp, &driver->epf_group, group_entry) + list_for_each_entry_safe(group, tmp, &driver->epf_group, group_entry) { + list_del(&group->group_entry); pci_ep_cfs_remove_epf_group(group); - list_del(&driver->epf_group); + } mutex_unlock(&pci_epf_mutex); } From patchwork Thu Oct 13 18:18:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vidya Sagar X-Patchwork-Id: 13006279 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A081C433FE for ; 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Thu, 13 Oct 2022 11:18:40 -0700 From: Vidya Sagar To: , , , , , , , CC: , , , , , , , Subject: [PATCH V2 4/4] PCI: endpoint: Add deinit in epf test driver Date: Thu, 13 Oct 2022 23:48:15 +0530 Message-ID: <20221013181815.2133-5-vidyas@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221013181815.2133-1-vidyas@nvidia.com> References: <20221013181815.2133-1-vidyas@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT067:EE_|DS7PR12MB6094:EE_ X-MS-Office365-Filtering-Correlation-Id: aff33bd5-fcb5-40ee-e84a-08daad476488 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: dY+keJHieQEgB7A31rw5JS2Fq8JeL7GxvhEh4pciiAPMLfa44qbMUDP7JcCo1jy0UKVHwHewwY8ib8aDdvPtCpAR5+yrrlEiIV7SpB1xkpyNEZ4K6jwl82AJxhJBrf1jpT8ldjPxeT2WmmUFko1DD5AJNP8gu23lueMJ4OClPr/d35DdSSfNc1tVZqGDGjiees6oy9TiThwC3Pzr1JLP7o+F0sLB5VYv0zZgRQOjbTLeADpUqWiqp9B3Pmm5KQsUtLjLjEX7X5wOb5H0A2IMYwj/R66Ub38k6gVQr7oE4AFjoLm5baDmVFOEdy5QtOSgcepj11vfOpQ19uH0ba5dGJYEsJVRWI6PLl3v+LFKeLPBbY8qeIRTgxzrPywwFzHsXMq8V9mOBFzuJ9r/CYRN9w9iaqxWwQHbcGErqlQ9DV7Ovctxnoj6B5JNQOZOoWWrvE9fzb07uVcfGraLw66s98AKXf0fUyElk02cQP7BckiGnSDafo4+20uyqAXztXCJayfm7o2gWnvOTTE2wcvB03Q905Hn/GjbAtSGW4L3BbPP5Ogw+xuXHJ+KslZpFFvxlYV6W6YPtYAGbtlotikbiVDMduV+7MxLbo3dlYEZP99qIsbEKJhWaFJ1wPspVNxb2UBhi8Wo164w7cWZtwPD5miDUuF70EslR3s3TR3HnAuN2b67LG7976YqoULU7eRPvML0qpKr/GgnmYtUkVBS6BM6i1mDIxaZXrIk9CkGMPdPiU1pDTqrhpyHV8lCAq5XGy0xWVCHkR+5dNCCrg5d8g== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230022)(4636009)(376002)(396003)(346002)(136003)(39860400002)(451199015)(36840700001)(40470700004)(46966006)(478600001)(86362001)(36860700001)(54906003)(8936002)(47076005)(40480700001)(110136005)(316002)(426003)(82740400003)(70586007)(70206006)(82310400005)(40460700003)(41300700001)(356005)(36756003)(336012)(7696005)(186003)(7636003)(7416002)(1076003)(26005)(2906002)(2616005)(6666004)(8676002)(4326008)(5660300002);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2022 18:18:56.5136 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: aff33bd5-fcb5-40ee-e84a-08daad476488 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT067.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6094 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add support for clearing the BAR info during the deinitialization phase of the epf test driver. Signed-off-by: Vidya Sagar --- V2: * This is a new patch in this series drivers/pci/endpoint/functions/pci-epf-test.c | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 136470019a24..25ac3d161fac 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -826,6 +826,35 @@ static int pci_epf_test_core_init(struct pci_epf *epf) return 0; } +static int pci_epf_test_clear_bar(struct pci_epf *epf) +{ + int bar, add; + struct pci_epf_bar *epf_bar; + struct pci_epc *epc = epf->epc; + struct pci_epf_test *epf_test = epf_get_drvdata(epf); + const struct pci_epc_features *epc_features; + + epc_features = epf_test->epc_features; + + for (bar = 0; bar < PCI_STD_NUM_BARS; bar += add) { + epf_bar = &epf->bar[bar]; + add = (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 2 : 1; + + if (!!(epc_features->reserved_bar & (1 << bar))) + continue; + + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); + } + + return 0; +} + +static int pci_epf_test_core_deinit(struct pci_epf *epf) +{ + pci_epf_test_clear_bar(epf); + return 0; +} + int pci_epf_test_link_up(struct pci_epf *epf) { struct pci_epf_test *epf_test = epf_get_drvdata(epf); @@ -839,6 +868,7 @@ int pci_epf_test_link_up(struct pci_epf *epf) static const struct pci_epc_event_ops pci_epf_test_event_ops = { .core_init = pci_epf_test_core_init, .link_up = pci_epf_test_link_up, + .core_deinit = pci_epf_test_core_deinit, }; static int pci_epf_test_alloc_space(struct pci_epf *epf)