From patchwork Fri Jan 18 16:14:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770839 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ED3806C2 for ; Fri, 18 Jan 2019 16:15:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DA9102F5C6 for ; Fri, 18 Jan 2019 16:15:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CEAC72F645; Fri, 18 Jan 2019 16:15:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 854942F5C6 for ; Fri, 18 Jan 2019 16:15:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=rY/Vd7CXqFrk/d8zIQqvuGrSUCCvgH2SO69mKYVVwZ8=; b=WsUzgnMqxB6spK6/3f8SAzgXQM oFQnFPouVYIb8M6Q8vqyRCdbe56/OySb3S6FLIY2iAM11nA8WJovN0DtSfEbmPm/AqJFVPvkEhMiy Zy2VOHjSTtmPR0N72q6ey/ReMPKwiRdFnnTg+vEp5hIzCH2/C/DljKi6+mLu+fq+CLoglLXSlg5mz q5a7oAevUAxn8mBNElmpFSFsz5TeS/7qyqbSYC2Jw4mrbPLc2mSV8T9mAcuNEe2nD/742DIUxTpX3 G/wn4XeMHK4cUGYUW42ooKG13H/nP8P+463B7K8jL4HdHo1TuMchL5BAc7/5mwipRQS9iT44FcI8H z+tr6ISQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWng-0005Gk-GG; Fri, 18 Jan 2019 16:15:20 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWnd-0005Fn-5k for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:15:18 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 64FD3EBD; Fri, 18 Jan 2019 08:15:16 -0800 (PST) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 481703F557; Fri, 18 Jan 2019 08:15:14 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 01/12] guest: Add generated file guest/guest_init.c to .gitignore Date: Fri, 18 Jan 2019 16:14:10 +0000 Message-Id: <1547828061-20462-2-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081517_253919_2BD2083C X-CRM114-Status: GOOD ( 11.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP guest/guest_init.c is a generated file, but git doesn't currently ignore it. This can be annoying when running git status etc. This patch adds a suitable .gitignore entry for this file. Signed-off-by: Dave Martin --- guest/.gitignore | 1 + 1 file changed, 1 insertion(+) create mode 100644 guest/.gitignore diff --git a/guest/.gitignore b/guest/.gitignore new file mode 100644 index 0000000..8e2da94 --- /dev/null +++ b/guest/.gitignore @@ -0,0 +1 @@ +guest_init.c From patchwork Fri Jan 18 16:14:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770841 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2D1B113B4 for ; Fri, 18 Jan 2019 16:15:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 16C2B2F571 for ; Fri, 18 Jan 2019 16:15:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0A3F62F642; Fri, 18 Jan 2019 16:15:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.4 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,FUZZY_XPILL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 87CD82F571 for ; Fri, 18 Jan 2019 16:15:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=kYa+NCAcXX5m/QRom/jYBIE/pwDzhnhjtY914+Bqzv0=; b=VPQXAF4feR15K3TFZZefAMKTNH b65Hjtlkaoz40or9mSQQ9AFrw0AMWjOUHqr6z9CqAb0W93+AJPxUiN9JiSXCA7ClndYhb8B4BY2Lk eo5KfxG0orNwSW/Yv5L6WqNKQL6GcxGbiiz0XzF4kYiIkP9W1QuMVxPLfQ/+nB8FzEQablyfqbmem ctdqibRJwsegpsF3DyUYWz7xcIS5MGO7XxLXa6hRXrCkJTPiypRljMf4vYdtqGj2RWQM4aOGhXK0s pL6t8Je41K1U5HGvgGxOt87Wp1P/dAzddg5PtwX4gc994uRH2TLUJpDZ6ILCtLW4A5m59rCZ639lq ExdD0THw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWnt-0005SE-Rc; Fri, 18 Jan 2019 16:15:34 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWne-0005GC-T5 for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:15:21 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B97C1EBD; Fri, 18 Jan 2019 08:15:18 -0800 (PST) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A53573F557; Fri, 18 Jan 2019 08:15:16 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 02/12] update_headers: Sync kvm UAPI headers with linux v5.0-rc2 Date: Fri, 18 Jan 2019 16:14:11 +0000 Message-Id: <1547828061-20462-3-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081518_955739_C1BD84BA X-CRM114-Status: GOOD ( 16.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The local copies of the kvm user API headers are getting stale. In preparation for some arch-specific updated, this patch reflects a re-run of util/update_headers.sh to pull in upstream updates from linux v5.0-rc2. Signed-off-by: Dave Martin --- arm/aarch32/include/asm/kvm.h | 55 +++++++++- arm/aarch64/include/asm/kvm.h | 41 ++++++- include/linux/kvm.h | 248 +++++++++++++++++++++++++++++++++++++++++- mips/include/asm/kvm.h | 23 +++- powerpc/include/asm/kvm.h | 39 +++++++ x86/include/asm/kvm.h | 69 +++++++++++- 6 files changed, 461 insertions(+), 14 deletions(-) diff --git a/arm/aarch32/include/asm/kvm.h b/arm/aarch32/include/asm/kvm.h index 6ebd3e6..4602464 100644 --- a/arm/aarch32/include/asm/kvm.h +++ b/arm/aarch32/include/asm/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2012 - Virtual Open Systems and Columbia University * Author: Christoffer Dall @@ -26,6 +27,9 @@ #define __KVM_HAVE_GUEST_DEBUG #define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_READONLY_MEM +#define __KVM_HAVE_VCPU_EVENTS + +#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 #define KVM_REG_SIZE(id) \ (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) @@ -88,6 +92,7 @@ struct kvm_regs { #define KVM_VGIC_V3_ADDR_TYPE_DIST 2 #define KVM_VGIC_V3_ADDR_TYPE_REDIST 3 #define KVM_VGIC_ITS_ADDR_TYPE 4 +#define KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION 5 #define KVM_VGIC_V3_DIST_SIZE SZ_64K #define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K) @@ -114,11 +119,25 @@ struct kvm_debug_exit_arch { }; struct kvm_sync_regs { + /* Used with KVM_CAP_ARM_USER_IRQ */ + __u64 device_irq_level; }; struct kvm_arch_memory_slot { }; +/* for KVM_GET/SET_VCPU_EVENTS */ +struct kvm_vcpu_events { + struct { + __u8 serror_pending; + __u8 serror_has_esr; + /* Align it to 8 bytes */ + __u8 pad[6]; + __u64 serror_esr; + } exception; + __u32 reserved[12]; +}; + /* If you need to interpret the index values, here is the key: */ #define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 #define KVM_REG_ARM_COPROC_SHIFT 16 @@ -130,6 +149,15 @@ struct kvm_arch_memory_slot { #define KVM_REG_ARM_CRM_SHIFT 7 #define KVM_REG_ARM_32_CRN_MASK 0x0000000000007800 #define KVM_REG_ARM_32_CRN_SHIFT 11 +/* + * For KVM currently all guest registers are nonsecure, but we reserve a bit + * in the encoding to distinguish secure from nonsecure for AArch32 system + * registers that are banked by security. This is 1 for the secure banked + * register, and 0 for the nonsecure banked register or if the register is + * not banked by security. + */ +#define KVM_REG_ARM_SECURE_MASK 0x0000000010000000 +#define KVM_REG_ARM_SECURE_SHIFT 28 #define ARM_CP15_REG_SHIFT_MASK(x,n) \ (((x) << KVM_REG_ARM_ ## n ## _SHIFT) & KVM_REG_ARM_ ## n ## _MASK) @@ -147,6 +175,12 @@ struct kvm_arch_memory_slot { (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64) #define ARM_CP15_REG64(...) __ARM_CP15_REG64(__VA_ARGS__) +/* PL1 Physical Timer Registers */ +#define KVM_REG_ARM_PTIMER_CTL ARM_CP15_REG32(0, 14, 2, 1) +#define KVM_REG_ARM_PTIMER_CNT ARM_CP15_REG64(0, 14) +#define KVM_REG_ARM_PTIMER_CVAL ARM_CP15_REG64(2, 14) + +/* Virtual Timer Registers */ #define KVM_REG_ARM_TIMER_CTL ARM_CP15_REG32(0, 14, 3, 1) #define KVM_REG_ARM_TIMER_CNT ARM_CP15_REG64(1, 14) #define KVM_REG_ARM_TIMER_CVAL ARM_CP15_REG64(3, 14) @@ -175,6 +209,12 @@ struct kvm_arch_memory_slot { #define KVM_REG_ARM_VFP_FPINST 0x1009 #define KVM_REG_ARM_VFP_FPINST2 0x100A +/* KVM-as-firmware specific pseudo-registers */ +#define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT) +#define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM | KVM_REG_SIZE_U64 | \ + KVM_REG_ARM_FW | ((r) & 0xffff)) +#define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0) + /* Device Control API: ARM VGIC */ #define KVM_DEV_ARM_VGIC_GRP_ADDR 0 #define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1 @@ -192,13 +232,26 @@ struct kvm_arch_memory_slot { #define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5 #define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6 #define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7 +#define KVM_DEV_ARM_VGIC_GRP_ITS_REGS 8 #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10 #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \ (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff #define VGIC_LEVEL_INFO_LINE_LEVEL 0 -#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 +/* Device Control API on vcpu fd */ +#define KVM_ARM_VCPU_PMU_V3_CTRL 0 +#define KVM_ARM_VCPU_PMU_V3_IRQ 0 +#define KVM_ARM_VCPU_PMU_V3_INIT 1 +#define KVM_ARM_VCPU_TIMER_CTRL 1 +#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0 +#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1 + +#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 +#define KVM_DEV_ARM_ITS_SAVE_TABLES 1 +#define KVM_DEV_ARM_ITS_RESTORE_TABLES 2 +#define KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES 3 +#define KVM_DEV_ARM_ITS_CTRL_RESET 4 /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_TYPE_SHIFT 24 diff --git a/arm/aarch64/include/asm/kvm.h b/arm/aarch64/include/asm/kvm.h index c286035..97c3478 100644 --- a/arm/aarch64/include/asm/kvm.h +++ b/arm/aarch64/include/asm/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2012,2013 - ARM Ltd * Author: Marc Zyngier @@ -38,6 +39,9 @@ #define __KVM_HAVE_GUEST_DEBUG #define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_READONLY_MEM +#define __KVM_HAVE_VCPU_EVENTS + +#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 #define KVM_REG_SIZE(id) \ (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) @@ -88,6 +92,7 @@ struct kvm_regs { #define KVM_VGIC_V3_ADDR_TYPE_DIST 2 #define KVM_VGIC_V3_ADDR_TYPE_REDIST 3 #define KVM_VGIC_ITS_ADDR_TYPE 4 +#define KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION 5 #define KVM_VGIC_V3_DIST_SIZE SZ_64K #define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K) @@ -143,11 +148,25 @@ struct kvm_debug_exit_arch { #define KVM_GUESTDBG_USE_HW (1 << 17) struct kvm_sync_regs { + /* Used with KVM_CAP_ARM_USER_IRQ */ + __u64 device_irq_level; }; struct kvm_arch_memory_slot { }; +/* for KVM_GET/SET_VCPU_EVENTS */ +struct kvm_vcpu_events { + struct { + __u8 serror_pending; + __u8 serror_has_esr; + /* Align it to 8 bytes */ + __u8 pad[6]; + __u64 serror_esr; + } exception; + __u32 reserved[12]; +}; + /* If you need to interpret the index values, here is the key: */ #define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 #define KVM_REG_ARM_COPROC_SHIFT 16 @@ -191,10 +210,22 @@ struct kvm_arch_memory_slot { #define ARM64_SYS_REG(...) (__ARM64_SYS_REG(__VA_ARGS__) | KVM_REG_SIZE_U64) +/* Physical Timer EL0 Registers */ +#define KVM_REG_ARM_PTIMER_CTL ARM64_SYS_REG(3, 3, 14, 2, 1) +#define KVM_REG_ARM_PTIMER_CVAL ARM64_SYS_REG(3, 3, 14, 2, 2) +#define KVM_REG_ARM_PTIMER_CNT ARM64_SYS_REG(3, 3, 14, 0, 1) + +/* EL0 Virtual Timer Registers */ #define KVM_REG_ARM_TIMER_CTL ARM64_SYS_REG(3, 3, 14, 3, 1) #define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2) #define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2) +/* KVM-as-firmware specific pseudo-registers */ +#define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT) +#define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ + KVM_REG_ARM_FW | ((r) & 0xffff)) +#define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0) + /* Device Control API: ARM VGIC */ #define KVM_DEV_ARM_VGIC_GRP_ADDR 0 #define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1 @@ -212,18 +243,26 @@ struct kvm_arch_memory_slot { #define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5 #define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6 #define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7 +#define KVM_DEV_ARM_VGIC_GRP_ITS_REGS 8 #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10 #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \ (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) #define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff #define VGIC_LEVEL_INFO_LINE_LEVEL 0 -#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 +#define KVM_DEV_ARM_VGIC_CTRL_INIT 0 +#define KVM_DEV_ARM_ITS_SAVE_TABLES 1 +#define KVM_DEV_ARM_ITS_RESTORE_TABLES 2 +#define KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES 3 +#define KVM_DEV_ARM_ITS_CTRL_RESET 4 /* Device Control API on vcpu fd */ #define KVM_ARM_VCPU_PMU_V3_CTRL 0 #define KVM_ARM_VCPU_PMU_V3_IRQ 0 #define KVM_ARM_VCPU_PMU_V3_INIT 1 +#define KVM_ARM_VCPU_TIMER_CTRL 1 +#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0 +#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1 /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_TYPE_SHIFT 24 diff --git a/include/linux/kvm.h b/include/linux/kvm.h index f51d508..6d4ea4b 100644 --- a/include/linux/kvm.h +++ b/include/linux/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef __LINUX_KVM_H #define __LINUX_KVM_H @@ -155,6 +156,35 @@ struct kvm_s390_skeys { __u32 reserved[9]; }; +#define KVM_S390_CMMA_PEEK (1 << 0) + +/** + * kvm_s390_cmma_log - Used for CMMA migration. + * + * Used both for input and output. + * + * @start_gfn: Guest page number to start from. + * @count: Size of the result buffer. + * @flags: Control operation mode via KVM_S390_CMMA_* flags + * @remaining: Used with KVM_S390_GET_CMMA_BITS. Indicates how many dirty + * pages are still remaining. + * @mask: Used with KVM_S390_SET_CMMA_BITS. Bitmap of bits to actually set + * in the PGSTE. + * @values: Pointer to the values buffer. + * + * Used in KVM_S390_{G,S}ET_CMMA_BITS ioctls. + */ +struct kvm_s390_cmma_log { + __u64 start_gfn; + __u32 count; + __u32 flags; + union { + __u64 remaining; + __u64 mask; + }; + __u64 values; +}; + struct kvm_hyperv_exit { #define KVM_EXIT_HYPERV_SYNIC 1 #define KVM_EXIT_HYPERV_HCALL 2 @@ -366,6 +396,10 @@ struct kvm_run { char padding[256]; }; + /* 2048 is the size of the char array used to bound/pad the size + * of the union that holds sync regs. + */ + #define SYNC_REGS_SIZE_BYTES 2048 /* * shared registers between kvm and userspace. * kvm_valid_regs specifies the register classes set by the host @@ -377,7 +411,7 @@ struct kvm_run { __u64 kvm_dirty_regs; union { struct kvm_sync_regs regs; - char padding[2048]; + char padding[SYNC_REGS_SIZE_BYTES]; } s; }; @@ -386,13 +420,19 @@ struct kvm_run { struct kvm_coalesced_mmio_zone { __u64 addr; __u32 size; - __u32 pad; + union { + __u32 pad; + __u32 pio; + }; }; struct kvm_coalesced_mmio { __u64 phys_addr; __u32 len; - __u32 pad; + union { + __u32 pad; + __u32 pio; + }; __u8 data[8]; }; @@ -452,6 +492,17 @@ struct kvm_dirty_log { }; }; +/* for KVM_CLEAR_DIRTY_LOG */ +struct kvm_clear_dirty_log { + __u32 slot; + __u32 num_pages; + __u64 first_page; + union { + void __user *dirty_bitmap; /* one bit per page */ + __u64 padding2; + }; +}; + /* for KVM_SET_SIGNAL_MASK */ struct kvm_signal_mask { __u32 len; @@ -600,9 +651,9 @@ struct kvm_s390_irq { struct kvm_s390_irq_state { __u64 buf; - __u32 flags; + __u32 flags; /* will stay unused for compatibility reasons */ __u32 len; - __u32 reserved[4]; + __u32 reserved[4]; /* will stay unused for compatibility reasons */ }; /* for KVM_SET_GUEST_DEBUG */ @@ -642,6 +693,13 @@ struct kvm_ioeventfd { __u8 pad[36]; }; +#define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0) +#define KVM_X86_DISABLE_EXITS_HLT (1 << 1) +#define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2) +#define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \ + KVM_X86_DISABLE_EXITS_HLT | \ + KVM_X86_DISABLE_EXITS_PAUSE) + /* for KVM_ENABLE_CAP */ struct kvm_enable_cap { /* in */ @@ -678,11 +736,13 @@ struct kvm_ppc_one_seg_page_size { #define KVM_PPC_PAGE_SIZES_REAL 0x00000001 #define KVM_PPC_1T_SEGMENTS 0x00000002 +#define KVM_PPC_NO_HASH 0x00000004 struct kvm_ppc_smmu_info { __u64 flags; __u32 slb_size; - __u32 pad; + __u16 data_keys; /* # storage keys supported for data */ + __u16 instr_keys; /* # storage keys supported for instructions */ struct kvm_ppc_one_seg_page_size sps[KVM_PPC_PAGE_SIZES_MAX_SZ]; }; @@ -702,9 +762,22 @@ struct kvm_ppc_resize_hpt { #define KVM_VM_PPC_HV 1 #define KVM_VM_PPC_PR 2 +/* on MIPS, 0 forces trap & emulate, 1 forces VZ ASE */ +#define KVM_VM_MIPS_TE 0 +#define KVM_VM_MIPS_VZ 1 + #define KVM_S390_SIE_PAGE_OFFSET 1 /* + * On arm64, machine type can be used to request the physical + * address size for the VM. Bits[7-0] are reserved for the guest + * PA size shift (i.e, log2(PA_Size)). For backward compatibility, + * value 0 implies the default IPA size, 40bits. + */ +#define KVM_VM_TYPE_ARM_IPA_SIZE_MASK 0xffULL +#define KVM_VM_TYPE_ARM_IPA_SIZE(x) \ + ((x) & KVM_VM_TYPE_ARM_IPA_SIZE_MASK) +/* * ioctls for /dev/kvm fds: */ #define KVM_GET_API_VERSION _IO(KVMIO, 0x00) @@ -726,6 +799,7 @@ struct kvm_ppc_resize_hpt { #define KVM_TRACE_PAUSE __KVM_DEPRECATED_MAIN_0x07 #define KVM_TRACE_DISABLE __KVM_DEPRECATED_MAIN_0x08 #define KVM_GET_EMULATED_CPUID _IOWR(KVMIO, 0x09, struct kvm_cpuid2) +#define KVM_GET_MSR_FEATURE_INDEX_LIST _IOWR(KVMIO, 0x0a, struct kvm_msr_list) /* * Extension capability list. @@ -883,6 +957,37 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_PPC_MMU_RADIX 134 #define KVM_CAP_PPC_MMU_HASH_V3 135 #define KVM_CAP_IMMEDIATE_EXIT 136 +#define KVM_CAP_MIPS_VZ 137 +#define KVM_CAP_MIPS_TE 138 +#define KVM_CAP_MIPS_64BIT 139 +#define KVM_CAP_S390_GS 140 +#define KVM_CAP_S390_AIS 141 +#define KVM_CAP_SPAPR_TCE_VFIO 142 +#define KVM_CAP_X86_DISABLE_EXITS 143 +#define KVM_CAP_ARM_USER_IRQ 144 +#define KVM_CAP_S390_CMMA_MIGRATION 145 +#define KVM_CAP_PPC_FWNMI 146 +#define KVM_CAP_PPC_SMT_POSSIBLE 147 +#define KVM_CAP_HYPERV_SYNIC2 148 +#define KVM_CAP_HYPERV_VP_INDEX 149 +#define KVM_CAP_S390_AIS_MIGRATION 150 +#define KVM_CAP_PPC_GET_CPU_CHAR 151 +#define KVM_CAP_S390_BPB 152 +#define KVM_CAP_GET_MSR_FEATURES 153 +#define KVM_CAP_HYPERV_EVENTFD 154 +#define KVM_CAP_HYPERV_TLBFLUSH 155 +#define KVM_CAP_S390_HPAGE_1M 156 +#define KVM_CAP_NESTED_STATE 157 +#define KVM_CAP_ARM_INJECT_SERROR_ESR 158 +#define KVM_CAP_MSR_PLATFORM_INFO 159 +#define KVM_CAP_PPC_NESTED_HV 160 +#define KVM_CAP_HYPERV_SEND_IPI 161 +#define KVM_CAP_COALESCED_PIO 162 +#define KVM_CAP_HYPERV_ENLIGHTENED_VMCS 163 +#define KVM_CAP_EXCEPTION_PAYLOAD 164 +#define KVM_CAP_ARM_VM_IPA_SIZE 165 +#define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT 166 +#define KVM_CAP_HYPERV_CPUID 167 #ifdef KVM_CAP_IRQ_ROUTING @@ -1087,6 +1192,7 @@ struct kvm_device_attr { #define KVM_DEV_VFIO_GROUP 1 #define KVM_DEV_VFIO_GROUP_ADD 1 #define KVM_DEV_VFIO_GROUP_DEL 2 +#define KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE 3 enum kvm_device_type { KVM_DEV_TYPE_FSL_MPIC_20 = 1, @@ -1108,6 +1214,11 @@ enum kvm_device_type { KVM_DEV_TYPE_MAX, }; +struct kvm_vfio_spapr_tce { + __s32 groupfd; + __s32 tablefd; +}; + /* * ioctls for VM fds */ @@ -1206,6 +1317,8 @@ struct kvm_s390_ucas_mapping { #define KVM_PPC_CONFIGURE_V3_MMU _IOW(KVMIO, 0xaf, struct kvm_ppc_mmuv3_cfg) /* Available with KVM_CAP_PPC_RADIX_MMU */ #define KVM_PPC_GET_RMMU_INFO _IOW(KVMIO, 0xb0, struct kvm_ppc_rmmu_info) +/* Available with KVM_CAP_PPC_GET_CPU_CHAR */ +#define KVM_PPC_GET_CPU_CHAR _IOR(KVMIO, 0xb1, struct kvm_ppc_cpu_char) /* ioctl for vm fd */ #define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device) @@ -1300,6 +1413,112 @@ struct kvm_s390_ucas_mapping { #define KVM_S390_GET_IRQ_STATE _IOW(KVMIO, 0xb6, struct kvm_s390_irq_state) /* Available with KVM_CAP_X86_SMM */ #define KVM_SMI _IO(KVMIO, 0xb7) +/* Available with KVM_CAP_S390_CMMA_MIGRATION */ +#define KVM_S390_GET_CMMA_BITS _IOWR(KVMIO, 0xb8, struct kvm_s390_cmma_log) +#define KVM_S390_SET_CMMA_BITS _IOW(KVMIO, 0xb9, struct kvm_s390_cmma_log) +/* Memory Encryption Commands */ +#define KVM_MEMORY_ENCRYPT_OP _IOWR(KVMIO, 0xba, unsigned long) + +struct kvm_enc_region { + __u64 addr; + __u64 size; +}; + +#define KVM_MEMORY_ENCRYPT_REG_REGION _IOR(KVMIO, 0xbb, struct kvm_enc_region) +#define KVM_MEMORY_ENCRYPT_UNREG_REGION _IOR(KVMIO, 0xbc, struct kvm_enc_region) + +/* Available with KVM_CAP_HYPERV_EVENTFD */ +#define KVM_HYPERV_EVENTFD _IOW(KVMIO, 0xbd, struct kvm_hyperv_eventfd) + +/* Available with KVM_CAP_NESTED_STATE */ +#define KVM_GET_NESTED_STATE _IOWR(KVMIO, 0xbe, struct kvm_nested_state) +#define KVM_SET_NESTED_STATE _IOW(KVMIO, 0xbf, struct kvm_nested_state) + +/* Available with KVM_CAP_MANUAL_DIRTY_LOG_PROTECT */ +#define KVM_CLEAR_DIRTY_LOG _IOWR(KVMIO, 0xc0, struct kvm_clear_dirty_log) + +/* Available with KVM_CAP_HYPERV_CPUID */ +#define KVM_GET_SUPPORTED_HV_CPUID _IOWR(KVMIO, 0xc1, struct kvm_cpuid2) + +/* Secure Encrypted Virtualization command */ +enum sev_cmd_id { + /* Guest initialization commands */ + KVM_SEV_INIT = 0, + KVM_SEV_ES_INIT, + /* Guest launch commands */ + KVM_SEV_LAUNCH_START, + KVM_SEV_LAUNCH_UPDATE_DATA, + KVM_SEV_LAUNCH_UPDATE_VMSA, + KVM_SEV_LAUNCH_SECRET, + KVM_SEV_LAUNCH_MEASURE, + KVM_SEV_LAUNCH_FINISH, + /* Guest migration commands (outgoing) */ + KVM_SEV_SEND_START, + KVM_SEV_SEND_UPDATE_DATA, + KVM_SEV_SEND_UPDATE_VMSA, + KVM_SEV_SEND_FINISH, + /* Guest migration commands (incoming) */ + KVM_SEV_RECEIVE_START, + KVM_SEV_RECEIVE_UPDATE_DATA, + KVM_SEV_RECEIVE_UPDATE_VMSA, + KVM_SEV_RECEIVE_FINISH, + /* Guest status and debug commands */ + KVM_SEV_GUEST_STATUS, + KVM_SEV_DBG_DECRYPT, + KVM_SEV_DBG_ENCRYPT, + /* Guest certificates commands */ + KVM_SEV_CERT_EXPORT, + + KVM_SEV_NR_MAX, +}; + +struct kvm_sev_cmd { + __u32 id; + __u64 data; + __u32 error; + __u32 sev_fd; +}; + +struct kvm_sev_launch_start { + __u32 handle; + __u32 policy; + __u64 dh_uaddr; + __u32 dh_len; + __u64 session_uaddr; + __u32 session_len; +}; + +struct kvm_sev_launch_update_data { + __u64 uaddr; + __u32 len; +}; + + +struct kvm_sev_launch_secret { + __u64 hdr_uaddr; + __u32 hdr_len; + __u64 guest_uaddr; + __u32 guest_len; + __u64 trans_uaddr; + __u32 trans_len; +}; + +struct kvm_sev_launch_measure { + __u64 uaddr; + __u32 len; +}; + +struct kvm_sev_guest_status { + __u32 handle; + __u32 policy; + __u32 state; +}; + +struct kvm_sev_dbg { + __u64 src_uaddr; + __u64 dst_uaddr; + __u32 len; +}; #define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) #define KVM_DEV_ASSIGN_PCI_2_3 (1 << 1) @@ -1354,4 +1573,21 @@ struct kvm_assigned_msix_entry { #define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0) #define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1) +/* Available with KVM_CAP_ARM_USER_IRQ */ + +/* Bits for run->s.regs.device_irq_level */ +#define KVM_ARM_DEV_EL1_VTIMER (1 << 0) +#define KVM_ARM_DEV_EL1_PTIMER (1 << 1) +#define KVM_ARM_DEV_PMU (1 << 2) + +struct kvm_hyperv_eventfd { + __u32 conn_id; + __s32 fd; + __u32 flags; + __u32 padding[3]; +}; + +#define KVM_HYPERV_CONN_ID_MASK 0x00ffffff +#define KVM_HYPERV_EVENTFD_DEASSIGN (1 << 0) + #endif /* __LINUX_KVM_H */ diff --git a/mips/include/asm/kvm.h b/mips/include/asm/kvm.h index a8a0199..edcf717 100644 --- a/mips/include/asm/kvm.h +++ b/mips/include/asm/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -21,6 +22,8 @@ #define __KVM_HAVE_READONLY_MEM +#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 + /* * for KVM_GET_REGS and KVM_SET_REGS * @@ -54,9 +57,14 @@ struct kvm_fpu { * Register set = 0: GP registers from kvm_regs (see definitions below). * * Register set = 1: CP0 registers. - * bits[15..8] - Must be zero. - * bits[7..3] - Register 'rd' index. - * bits[2..0] - Register 'sel' index. + * bits[15..8] - COP0 register set. + * + * COP0 register set = 0: Main CP0 registers. + * bits[7..3] - Register 'rd' index. + * bits[2..0] - Register 'sel' index. + * + * COP0 register set = 1: MAARs. + * bits[7..0] - MAAR index. * * Register set = 2: KVM specific registers (see definitions below). * @@ -115,6 +123,15 @@ struct kvm_fpu { /* + * KVM_REG_MIPS_CP0 - Coprocessor 0 registers. + */ + +#define KVM_REG_MIPS_MAAR (KVM_REG_MIPS_CP0 | (1 << 8)) +#define KVM_REG_MIPS_CP0_MAAR(n) (KVM_REG_MIPS_MAAR | \ + KVM_REG_SIZE_U64 | (n)) + + +/* * KVM_REG_MIPS_KVM - KVM specific control registers. */ diff --git a/powerpc/include/asm/kvm.h b/powerpc/include/asm/kvm.h index 4edbe4b..8c876c1 100644 --- a/powerpc/include/asm/kvm.h +++ b/powerpc/include/asm/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as @@ -29,6 +30,9 @@ #define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_GUEST_DEBUG +/* Not always available, but if it is, this is the correct offset. */ +#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 + struct kvm_regs { __u64 pc; __u64 cr; @@ -57,6 +61,12 @@ struct kvm_regs { #define KVM_SREGS_E_FSL_PIDn (1 << 0) /* PID1/PID2 */ +/* flags for kvm_run.flags */ +#define KVM_RUN_PPC_NMI_DISP_MASK (3 << 0) +#define KVM_RUN_PPC_NMI_DISP_FULLY_RECOV (1 << 0) +#define KVM_RUN_PPC_NMI_DISP_LIMITED_RECOV (2 << 0) +#define KVM_RUN_PPC_NMI_DISP_NOT_RECOV (3 << 0) + /* * Feature bits indicate which sections of the sregs struct are valid, * both in KVM_GET_SREGS and KVM_SET_SREGS. On KVM_SET_SREGS, registers @@ -433,6 +443,31 @@ struct kvm_ppc_rmmu_info { __u32 ap_encodings[8]; }; +/* For KVM_PPC_GET_CPU_CHAR */ +struct kvm_ppc_cpu_char { + __u64 character; /* characteristics of the CPU */ + __u64 behaviour; /* recommended software behaviour */ + __u64 character_mask; /* valid bits in character */ + __u64 behaviour_mask; /* valid bits in behaviour */ +}; + +/* + * Values for character and character_mask. + * These are identical to the values used by H_GET_CPU_CHARACTERISTICS. + */ +#define KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 (1ULL << 63) +#define KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED (1ULL << 62) +#define KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 (1ULL << 61) +#define KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2 (1ULL << 60) +#define KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV (1ULL << 59) +#define KVM_PPC_CPU_CHAR_BR_HINT_HONOURED (1ULL << 58) +#define KVM_PPC_CPU_CHAR_MTTRIG_THR_RECONF (1ULL << 57) +#define KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS (1ULL << 56) + +#define KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY (1ULL << 63) +#define KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR (1ULL << 62) +#define KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR (1ULL << 61) + /* Per-vcpu XICS interrupt controller state */ #define KVM_REG_PPC_ICP_STATE (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x8c) @@ -597,6 +632,10 @@ struct kvm_ppc_rmmu_info { #define KVM_REG_PPC_TIDR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xbc) #define KVM_REG_PPC_PSSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xbd) +#define KVM_REG_PPC_DEC_EXPIRY (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xbe) +#define KVM_REG_PPC_ONLINE (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbf) +#define KVM_REG_PPC_PTCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc0) + /* Transactional Memory checkpointed state: * This is all GPRs, all VSX regs and a subset of SPRs */ diff --git a/x86/include/asm/kvm.h b/x86/include/asm/kvm.h index 739c0c5..dabfcf7 100644 --- a/x86/include/asm/kvm.h +++ b/x86/include/asm/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef _ASM_X86_KVM_H #define _ASM_X86_KVM_H @@ -9,6 +10,9 @@ #include #include +#define KVM_PIO_PAGE_OFFSET 1 +#define KVM_COALESCED_MMIO_PAGE_OFFSET 2 + #define DE_VECTOR 0 #define DB_VECTOR 1 #define BP_VECTOR 3 @@ -284,6 +288,7 @@ struct kvm_reinject_control { #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002 #define KVM_VCPUEVENT_VALID_SHADOW 0x00000004 #define KVM_VCPUEVENT_VALID_SMM 0x00000008 +#define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010 /* Interrupt shadow states */ #define KVM_X86_SHADOW_INT_MOV_SS 0x01 @@ -295,7 +300,7 @@ struct kvm_vcpu_events { __u8 injected; __u8 nr; __u8 has_error_code; - __u8 pad; + __u8 pending; __u32 error_code; } exception; struct { @@ -318,7 +323,9 @@ struct kvm_vcpu_events { __u8 smm_inside_nmi; __u8 latched_init; } smi; - __u32 reserved[9]; + __u8 reserved[27]; + __u8 exception_has_payload; + __u64 exception_payload; }; /* for KVM_GET/SET_DEBUGREGS */ @@ -350,11 +357,67 @@ struct kvm_xcrs { __u64 padding[16]; }; -/* definition of registers in kvm_run */ +#define KVM_SYNC_X86_REGS (1UL << 0) +#define KVM_SYNC_X86_SREGS (1UL << 1) +#define KVM_SYNC_X86_EVENTS (1UL << 2) + +#define KVM_SYNC_X86_VALID_FIELDS \ + (KVM_SYNC_X86_REGS| \ + KVM_SYNC_X86_SREGS| \ + KVM_SYNC_X86_EVENTS) + +/* kvm_sync_regs struct included by kvm_run struct */ struct kvm_sync_regs { + /* Members of this structure are potentially malicious. + * Care must be taken by code reading, esp. interpreting, + * data fields from them inside KVM to prevent TOCTOU and + * double-fetch types of vulnerabilities. + */ + struct kvm_regs regs; + struct kvm_sregs sregs; + struct kvm_vcpu_events events; }; #define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0) #define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1) +#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2) + +#define KVM_STATE_NESTED_GUEST_MODE 0x00000001 +#define KVM_STATE_NESTED_RUN_PENDING 0x00000002 +#define KVM_STATE_NESTED_EVMCS 0x00000004 + +#define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001 +#define KVM_STATE_NESTED_SMM_VMXON 0x00000002 + +struct kvm_vmx_nested_state { + __u64 vmxon_pa; + __u64 vmcs_pa; + + struct { + __u16 flags; + } smm; +}; + +/* for KVM_CAP_NESTED_STATE */ +struct kvm_nested_state { + /* KVM_STATE_* flags */ + __u16 flags; + + /* 0 for VMX, 1 for SVM. */ + __u16 format; + + /* 128 for SVM, 128 + VMCS size for VMX. */ + __u32 size; + + union { + /* VMXON, VMCS */ + struct kvm_vmx_nested_state vmx; + + /* Pad the header to 128 bytes. */ + __u8 pad[120]; + }; + + __u8 data[0]; +}; #endif /* _ASM_X86_KVM_H */ From patchwork Fri Jan 18 16:14:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770843 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C76206C2 for ; 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Fri, 18 Jan 2019 08:15:18 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 03/12] Makefile: [HACK] Work around GCC 8 warnings :( Date: Fri, 18 Jan 2019 16:14:12 +0000 Message-Id: <1547828061-20462-4-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081521_614046_9B7E9574 X-CRM114-Status: UNSURE ( 9.29 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Some of these are relatively harmless lazy coding issues; others are overzealousness on the part of the compiler (in some cases, the code is provably safe, yet GCC warns anyway). Turning the warnings off locally is not nice, but better than turning them off globally. Signed-off-by: Dave Martin --- Makefile | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index c4faff6..e8e9376 100644 --- a/Makefile +++ b/Makefile @@ -42,6 +42,7 @@ OBJS += builtin-stat.o OBJS += builtin-pause.o OBJS += builtin-resume.o OBJS += builtin-run.o +CFLAGS-builtin-run.o = -Wno-format-truncation -Wno-stringop-truncation OBJS += builtin-setup.o OBJS += builtin-stop.o OBJS += builtin-version.o @@ -63,9 +64,11 @@ OBJS += vfio/core.o OBJS += vfio/pci.o OBJS += virtio/blk.o OBJS += virtio/scsi.o +CFLAGS-virtio/scsi.o = -Wno-stringop-truncation OBJS += virtio/console.o OBJS += virtio/core.o OBJS += virtio/net.o +CFLAGS-virtio/net.o = -Wno-sizeof-pointer-memaccess -Wno-stringop-truncation OBJS += virtio/rng.o OBJS += virtio/balloon.o OBJS += virtio/pci.o @@ -82,6 +85,7 @@ OBJS += net/uip/udp.o OBJS += net/uip/buf.o OBJS += net/uip/csum.o OBJS += net/uip/dhcp.o +CFLAGS-net/uip/dhcp.o = -Wno-stringop-truncation OBJS += kvm-cmd.o OBJS += util/init.o OBJS += util/iovec.o @@ -93,6 +97,7 @@ OBJS += util/strbuf.o OBJS += util/read-write.o OBJS += util/util.o OBJS += virtio/9p.o +CFLAGS-virtio/9p.o = -Wno-restrict OBJS += virtio/9p-pdu.o OBJS += hw/vesa.o OBJS += hw/pci-shmem.o @@ -439,10 +444,10 @@ endif %.o: %.c ifeq ($(C),1) $(E) " CHECK " $@ - $(Q) $(CHECK) -c $(CFLAGS) $(CFLAGS_DYNOPT) $< -o $@ + $(Q) $(CHECK) -c $(CFLAGS-$@) $(CFLAGS) $(CFLAGS_DYNOPT) $< -o $@ endif $(E) " CC " $@ - $(Q) $(CC) -c $(c_flags) $(CFLAGS_DYNOPT) $< -o $@ + $(Q) $(CC) -c $(CFLAGS-$@) $(c_flags) $(CFLAGS_DYNOPT) $< -o $@ # From patchwork Fri Jan 18 16:14:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770847 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C9E8213B4 for ; Fri, 18 Jan 2019 16:16:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B6D8B2F571 for ; Fri, 18 Jan 2019 16:16:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A777A2F64C; Fri, 18 Jan 2019 16:16:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5C6832F571 for ; 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Fri, 18 Jan 2019 16:16:43 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWnk-0005KI-3R for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:15:31 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 52231EBD; Fri, 18 Jan 2019 08:15:23 -0800 (PST) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 35A543F557; Fri, 18 Jan 2019 08:15:21 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 04/12] Makefile: [HACK] Pass relevant flags when checking for libfdt Date: Fri, 18 Jan 2019 16:14:13 +0000 Message-Id: <1547828061-20462-5-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081524_782225_4664265F X-CRM114-Status: GOOD ( 11.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP CPPFLAGS and LDFLAGS may be telling us where libdft.h and -lfdt are to be found, so don't ignore them when looking for libfdt. Signed-off-by: Dave Martin --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index e8e9376..d6bcce7 100644 --- a/Makefile +++ b/Makefile @@ -310,7 +310,7 @@ $(warning No static libc found. Skipping guest init) endif ifeq (y,$(ARCH_WANT_LIBFDT)) - ifneq ($(call try-build,$(SOURCE_LIBFDT),$(CFLAGS),-lfdt),y) + ifneq ($(call try-build,$(SOURCE_LIBFDT),$(CPPFLAGS) $(CFLAGS) $(LDFLAGS),-lfdt),y) $(error No libfdt found. Please install libfdt-dev package) else CFLAGS_DYNOPT += -DCONFIG_HAS_LIBFDT From patchwork Fri Jan 18 16:14:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770861 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 435836C2 for ; Fri, 18 Jan 2019 16:18:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3153C2F64C for ; Fri, 18 Jan 2019 16:18:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 25C192F658; Fri, 18 Jan 2019 16:18:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B905D2F64C for ; Fri, 18 Jan 2019 16:18:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=rl0SqbAFZ4kMNin4joPHLFnwsO+d16ZJi4YN6zrV3p0=; b=X5A8S+RF84ajicgGwQRS9Y35oU UG+mdZV40BokHywBYu7M3aftZ4QIJMpQLgebQVJpXyFlrA3C2syCidIoozFpjktO0XEirnIGqzIEG fw3jNyZhQjoZfvVAjjGB+W4KmoU4CeF/nA0EO4pKjDJrepXA0L/IFOzmxESFxVPPuoE03wysV+IfI F+4GjUTqADoFO+UJyKZlfd6D7TNu6/h0YR96BNYKNorRxwANLJcw3LNhlhPtycNd3qbQpqMzQIGGe zk7meKmrpoWxTAp25vRzB1B77uHvCOFMrIVvTQrUOBRxivAVsOxvPkM8++KSS0JvL7A5iuegZnWMY 8eqYhDmQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWqp-00087F-Od; Fri, 18 Jan 2019 16:18:35 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWnm-0005NA-U2 for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:15:32 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AF3291650; Fri, 18 Jan 2019 08:15:25 -0800 (PST) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 923183F557; Fri, 18 Jan 2019 08:15:23 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 05/12] arm64: Correct ARM64_CORE_REG() size encodings for all core registers Date: Fri, 18 Jan 2019 16:14:14 +0000 Message-Id: <1547828061-20462-6-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081527_664076_FE0C4B81 X-CRM114-Status: GOOD ( 12.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP ARM64_CORE_REG() is currently only used to generate the KVM register IDs for registers that happen to be 64 bits in size, so KVM_REG_SIZE_U64 is hard-coded in the definition. To enable this macro to generate correct encodings for the FPSIMD registers too (which are a mix of 128-bit and 32-bit registers), this patch extends the macro to encode the correct size for each class of register in KVM_REG_ARM_CORE. The approach is crude, but because the KVM_REG_ARM_CORE ID arrangement is ABI, it's not expected to evolve. Signed-off-by: Dave Martin --- arm/aarch64/kvm-cpu.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/arm/aarch64/kvm-cpu.c b/arm/aarch64/kvm-cpu.c index 1b29374..0aaefaf 100644 --- a/arm/aarch64/kvm-cpu.c +++ b/arm/aarch64/kvm-cpu.c @@ -12,8 +12,21 @@ #define SCTLR_EL1_E0E_MASK (1 << 24) #define SCTLR_EL1_EE_MASK (1 << 25) -#define ARM64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ - KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x)) +static __u64 __core_reg_id(__u64 offset) +{ + __u64 id = KVM_REG_ARM64 | KVM_REG_ARM_CORE | offset; + + if (offset < KVM_REG_ARM_CORE_REG(fp_regs)) + id |= KVM_REG_SIZE_U64; + else if (offset < KVM_REG_ARM_CORE_REG(fp_regs.fpsr)) + id |= KVM_REG_SIZE_U128; + else + id |= KVM_REG_SIZE_U32; + + return id; +} + +#define ARM64_CORE_REG(x) __core_reg_id(KVM_REG_ARM_CORE_REG(x)) unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu) { From patchwork Fri Jan 18 16:14:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770845 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 428AD13B4 for ; Fri, 18 Jan 2019 16:16:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2EA882F5C6 for ; Fri, 18 Jan 2019 16:16:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 22E442F645; Fri, 18 Jan 2019 16:16:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B8C1D2F5C6 for ; Fri, 18 Jan 2019 16:16:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=njCc6hMTq1UmhLl6xXUBVWLrtwUuYos8IT8cnUWPjzo=; b=kx5i0gqrJdwGZleNRVeLyAbjqn VjAmMIM7lJbz9cedxqzGBZKIGoWcK/rVHcfKaglxqtRikiS6Vr8TwdzwcHLaCChf7GUJtwMzotV/F 1SoGeWZ0hTEPyckPT0QWDRO6wXVjz2k3heSWWBc7A3wP2aGSWC0jOghtj7sebcs/L2FeJJ73+P5tN 3n+v3iGUNE1mjHXgSNexiKBEEkOKwp8LoJSk8jSVH+JJqto++jKEjXyA7tj+6EBEfgCB3Nj4CT1jc xg0trDs7wcAZ51c18bTplpgZQ6houqa/Rwl12vBA6R5vcLNFij3rsuIETcP8qGD7wEf9qlnUH0VyJ RJBAhv5w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWoa-00065W-Ka; Fri, 18 Jan 2019 16:16:16 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWno-0005P6-H2 for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:15:35 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DFA7E165C; Fri, 18 Jan 2019 08:15:27 -0800 (PST) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id EF7EB3F557; Fri, 18 Jan 2019 08:15:25 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 06/12] arm64: [HACK] Pull in kvm UAPI header updates from SVE development branch Date: Fri, 18 Jan 2019 16:14:15 +0000 Message-Id: <1547828061-20462-7-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081529_222980_443B0097 X-CRM114-Status: UNSURE ( 9.66 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch pulls in SVE-related declarations from my kernel SVE development branch, so that kvmtool can make use of them. Signed-off-by: Dave Martin --- arm/aarch64/include/asm/kvm.h | 13 +++++++++++++ include/linux/kvm.h | 2 ++ 2 files changed, 15 insertions(+) diff --git a/arm/aarch64/include/asm/kvm.h b/arm/aarch64/include/asm/kvm.h index 97c3478..fc613af 100644 --- a/arm/aarch64/include/asm/kvm.h +++ b/arm/aarch64/include/asm/kvm.h @@ -102,6 +102,7 @@ struct kvm_regs { #define KVM_ARM_VCPU_EL1_32BIT 1 /* CPU running a 32bit VM */ #define KVM_ARM_VCPU_PSCI_0_2 2 /* CPU uses PSCI v0.2 */ #define KVM_ARM_VCPU_PMU_V3 3 /* Support guest PMUv3 */ +#define KVM_ARM_VCPU_SVE 4 /* enable SVE for this CPU */ struct kvm_vcpu_init { __u32 target; @@ -226,6 +227,18 @@ struct kvm_vcpu_events { KVM_REG_ARM_FW | ((r) & 0xffff)) #define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0) +/* SVE registers */ +#define KVM_REG_ARM64_SVE (0x15 << KVM_REG_ARM_COPROC_SHIFT) +#define KVM_REG_ARM64_SVE_ZREG(n, i) (KVM_REG_ARM64 | KVM_REG_ARM64_SVE | \ + KVM_REG_SIZE_U2048 | \ + ((n) << 5) | (i)) +#define KVM_REG_ARM64_SVE_PREG(n, i) (KVM_REG_ARM64 | KVM_REG_ARM64_SVE | \ + KVM_REG_SIZE_U256 | \ + ((n) << 5) | (i) | 0x400) +#define KVM_REG_ARM64_SVE_FFR(i) KVM_REG_ARM64_SVE_PREG(16, i) +#define KVM_REG_ARM64_SVE_VLS (KVM_REG_ARM64 | KVM_REG_ARM64_SVE | \ + KVM_REG_SIZE_U512 | 0xffff) + /* Device Control API: ARM VGIC */ #define KVM_DEV_ARM_VGIC_GRP_ADDR 0 #define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1 diff --git a/include/linux/kvm.h b/include/linux/kvm.h index 6d4ea4b..4ea0d92 100644 --- a/include/linux/kvm.h +++ b/include/linux/kvm.h @@ -988,6 +988,7 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_ARM_VM_IPA_SIZE 165 #define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT 166 #define KVM_CAP_HYPERV_CPUID 167 +#define KVM_CAP_ARM_SVE 168 #ifdef KVM_CAP_IRQ_ROUTING @@ -1145,6 +1146,7 @@ struct kvm_dirty_tlb { #define KVM_REG_SIZE_U256 0x0050000000000000ULL #define KVM_REG_SIZE_U512 0x0060000000000000ULL #define KVM_REG_SIZE_U1024 0x0070000000000000ULL +#define KVM_REG_SIZE_U2048 0x0080000000000000ULL struct kvm_reg_list { __u64 n; /* number of regs */ From patchwork Fri Jan 18 16:14:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770849 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B9A4C13B4 for ; Fri, 18 Jan 2019 16:17:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A5D3B2F64C for ; Fri, 18 Jan 2019 16:17:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 997B92F658; Fri, 18 Jan 2019 16:17:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1DBC12F64C for ; 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Fri, 18 Jan 2019 16:16:59 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWnr-0005S4-1N for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:15:39 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1B9C41684; Fri, 18 Jan 2019 08:15:30 -0800 (PST) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2B9443F557; Fri, 18 Jan 2019 08:15:28 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 07/12] arm64: [HACK] Add option to show the kernel's KVM register ID list Date: Fri, 18 Jan 2019 16:14:16 +0000 Message-Id: <1547828061-20462-8-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081532_163985_D457CC44 X-CRM114-Status: GOOD ( 13.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP To assist with testing and debugging the behaviour of KVM_GET_REG_LIST, this patch adds a crude option --show-reg-list to print out the list of register IDs reported by the kernel on vcpu startup. This is a development hack only and not currently friendly (or useful) for users. Signed-off-by: Dave Martin --- arm/aarch64/include/kvm/kvm-config-arch.h | 2 ++ arm/include/arm-common/kvm-config-arch.h | 1 + arm/kvm-cpu.c | 50 +++++++++++++++++++++++++++++++ 3 files changed, 53 insertions(+) diff --git a/arm/aarch64/include/kvm/kvm-config-arch.h b/arm/aarch64/include/kvm/kvm-config-arch.h index 04be43d..cb3f8bc 100644 --- a/arm/aarch64/include/kvm/kvm-config-arch.h +++ b/arm/aarch64/include/kvm/kvm-config-arch.h @@ -6,6 +6,8 @@ "Run AArch32 guest"), \ OPT_BOOLEAN('\0', "pmu", &(cfg)->has_pmuv3, \ "Create PMUv3 device"), \ + OPT_BOOLEAN('\0', "show-reg-list", &(cfg)->show_reg_list, \ + "Show the list of KVM register IDs on startup"), \ OPT_U64('\0', "kaslr-seed", &(cfg)->kaslr_seed, \ "Specify random seed for Kernel Address Space " \ "Layout Randomization (KASLR)"), diff --git a/arm/include/arm-common/kvm-config-arch.h b/arm/include/arm-common/kvm-config-arch.h index 6a196f1..f18bfd4 100644 --- a/arm/include/arm-common/kvm-config-arch.h +++ b/arm/include/arm-common/kvm-config-arch.h @@ -9,6 +9,7 @@ struct kvm_config_arch { bool virtio_trans_pci; bool aarch32_guest; bool has_pmuv3; + bool show_reg_list; u64 kaslr_seed; enum irqchip_type irqchip; }; diff --git a/arm/kvm-cpu.c b/arm/kvm-cpu.c index 7780251..38a071b 100644 --- a/arm/kvm-cpu.c +++ b/arm/kvm-cpu.c @@ -1,6 +1,53 @@ +#include +#include +#include + #include "kvm/kvm.h" #include "kvm/kvm-cpu.h" +static int kvm_show_reg_list(struct kvm_cpu const *vcpu) +{ + int ret = -1; + struct kvm_reg_list regs, *pregs = NULL; + u64 i; + + regs.n = 0; + if (ioctl(vcpu->vcpu_fd, KVM_GET_REG_LIST, ®s) && errno != E2BIG) { + perror("KVM_GET_REG_LIST"); + goto error; + } + + pregs = malloc(((char *)&pregs->reg[0] - (char *)pregs) + + regs.n * sizeof(pregs->reg[0])); + if (!pregs) { + errno = ENOMEM; + perror(NULL); + goto error; + } + + pregs->n = regs.n; + if (ioctl(vcpu->vcpu_fd, KVM_GET_REG_LIST, pregs)) { + perror("KVM_GET_REG_LIST"); + goto error; + } + + fflush(stdout); + + printf("Register list for cpu 0x%lx:\n", vcpu->cpu_id); + + for (i = 0; i < pregs->n; ++i) + printf("\treg[%lu]:\t0x%.16lx\n", + (unsigned long)i, (unsigned long)pregs->reg[i]); + + putchar('\n'); + + fflush(stdout); + +error: + free(pregs); + return ret; +} + static int debug_fd; void kvm_cpu__set_debug_fd(int fd) @@ -109,6 +156,9 @@ struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, unsigned long cpu_id) if (err || target->init(vcpu)) die("Unable to initialise vcpu"); + if (kvm->cfg.arch.show_reg_list) + kvm_show_reg_list(vcpu); + coalesced_offset = ioctl(kvm->sys_fd, KVM_CHECK_EXTENSION, KVM_CAP_COALESCED_MMIO); if (coalesced_offset) From patchwork Fri Jan 18 16:14:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770851 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3D2A86C2 for ; Fri, 18 Jan 2019 16:17:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2981F2F64C for ; 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Fri, 18 Jan 2019 08:15:30 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 08/12] arm64: [HACK] Basic SVE support Date: Fri, 18 Jan 2019 16:14:17 +0000 Message-Id: <1547828061-20462-9-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081533_499784_741E7FEE X-CRM114-Status: GOOD ( 13.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP For compatibility reasons, new vcpus created by KVM always have SVE disabled by default. To enable SVE to be turned on, this patch adds an option --sve. Currently, no independent control is added per-vcpu. This means that it is not currently possible to create a VM containing a mix of SVE-enabled and non-SVE-enabled vcpus. This functionality could be added later if desired. Signed-off-by: Dave Martin --- arm/aarch64/include/kvm/kvm-config-arch.h | 2 ++ arm/aarch64/include/kvm/kvm-cpu-arch.h | 3 ++- arm/include/arm-common/kvm-config-arch.h | 1 + 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arm/aarch64/include/kvm/kvm-config-arch.h b/arm/aarch64/include/kvm/kvm-config-arch.h index cb3f8bc..7710f14 100644 --- a/arm/aarch64/include/kvm/kvm-config-arch.h +++ b/arm/aarch64/include/kvm/kvm-config-arch.h @@ -6,6 +6,8 @@ "Run AArch32 guest"), \ OPT_BOOLEAN('\0', "pmu", &(cfg)->has_pmuv3, \ "Create PMUv3 device"), \ + OPT_BOOLEAN('\0', "sve", &(cfg)->has_sve, \ + "Enable SVE for the guest"), \ OPT_BOOLEAN('\0', "show-reg-list", &(cfg)->show_reg_list, \ "Show the list of KVM register IDs on startup"), \ OPT_U64('\0', "kaslr-seed", &(cfg)->kaslr_seed, \ diff --git a/arm/aarch64/include/kvm/kvm-cpu-arch.h b/arm/aarch64/include/kvm/kvm-cpu-arch.h index a9d8563..6aeddde 100644 --- a/arm/aarch64/include/kvm/kvm-cpu-arch.h +++ b/arm/aarch64/include/kvm/kvm-cpu-arch.h @@ -8,7 +8,8 @@ #define ARM_VCPU_FEATURE_FLAGS(kvm, cpuid) { \ [0] = ((!!(cpuid) << KVM_ARM_VCPU_POWER_OFF) | \ (!!(kvm)->cfg.arch.aarch32_guest << KVM_ARM_VCPU_EL1_32BIT) | \ - (!!(kvm)->cfg.arch.has_pmuv3 << KVM_ARM_VCPU_PMU_V3)) \ + (!!(kvm)->cfg.arch.has_pmuv3 << KVM_ARM_VCPU_PMU_V3) | \ + (!!(kvm)->cfg.arch.has_sve << KVM_ARM_VCPU_SVE)) \ } #define ARM_MPIDR_HWID_BITMASK 0xFF00FFFFFFUL diff --git a/arm/include/arm-common/kvm-config-arch.h b/arm/include/arm-common/kvm-config-arch.h index f18bfd4..6abb170 100644 --- a/arm/include/arm-common/kvm-config-arch.h +++ b/arm/include/arm-common/kvm-config-arch.h @@ -9,6 +9,7 @@ struct kvm_config_arch { bool virtio_trans_pci; bool aarch32_guest; bool has_pmuv3; + bool has_sve; bool show_reg_list; u64 kaslr_seed; enum irqchip_type irqchip; From patchwork Fri Jan 18 16:14:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770853 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0FDBE6C2 for ; Fri, 18 Jan 2019 16:17:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F0BC42F652 for ; Fri, 18 Jan 2019 16:17:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E4D0D2F65B; Fri, 18 Jan 2019 16:17:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6D4DF2F652 for ; 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Fri, 18 Jan 2019 16:17:32 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWnu-0005X2-Rb for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:15:49 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7C1F21596; Fri, 18 Jan 2019 08:15:34 -0800 (PST) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8BD333F557; Fri, 18 Jan 2019 08:15:32 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 09/12] arm64: [HACK] Show extra info about SVE with --show-reg-list Date: Fri, 18 Jan 2019 16:14:18 +0000 Message-Id: <1547828061-20462-10-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081535_440216_BC89BABF X-CRM114-Status: GOOD ( 15.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch prints out some information about the SVE configuration when --show-reg=list is passed. This is development hack only (as well as being an abuse of the purpose of that option). Signed-off-by: Dave Martin --- arm/kvm-cpu.c | 111 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 110 insertions(+), 1 deletion(-) diff --git a/arm/kvm-cpu.c b/arm/kvm-cpu.c index 38a071b..80e7b79 100644 --- a/arm/kvm-cpu.c +++ b/arm/kvm-cpu.c @@ -1,3 +1,4 @@ +#include #include #include #include @@ -48,6 +49,112 @@ error: return ret; } +static int kvm_show_sve_info(struct kvm_cpu const *vcpu) +{ + int ret = 0; + u64 val; + struct kvm_one_reg r; + int have_sve; + u64 vls[9]; + unsigned int i; + + r.addr = (u64)&val; + + r.id = ARM64_SYS_REG(3, 0, 0, 4, 0); /* ID_AA64PFR0_EL1 */ + assert((r.id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &r)) { + perror("KVM_GET_ONE_REG(ID_AA64PFR0_EL1)"); + goto error; + } + + printf("ID_AA64PFR0_EL1:\t0x%lx\n", (unsigned long)val); + + have_sve = !!((val >> 32) & 0xf); + + r.id = ARM64_SYS_REG(3, 0, 0, 4, 4); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &r)) { + if (errno != ENOENT || have_sve) { + perror("KVM_GET_ONE_REG(ID_AA64ZFR0_EL1)"); + ret = -1; + } + } else { + if (!have_sve) { + puts("ID_AA64ZFR0_EL1 unexpectedly present"); + ret = -1; + } + + printf("ID_AA64ZFR0_EL1:\t0x%lx\n", (unsigned long)val); + } + + r.id = ARM64_SYS_REG(3, 0, 1, 2, 0); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &r)) { + if (errno != ENOENT || have_sve) { + perror("KVM_GET_ONE_REG(ZCR_EL1)"); + ret = -1; + } + } else { + if (!have_sve) { + puts("ZCR_EL1 unexpectedly present"); + ret = -1; + } + + printf("ZCR_EL1:\t0x%lx\n", (unsigned long)val); + } + + r.addr = (u64)&vls; + r.id = KVM_REG_ARM64_SVE_VLS; + assert(8 * (sizeof(vls) - sizeof(*vls)) == 512 && + (r.id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U512); + + /* + * Write some canary data so we can see that the kernel writes + * the expected amount: + */ + for (i = 0; i < sizeof(vls) / sizeof(*vls); ++i) + vls[i] = -7; + + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, &r)) { + if (errno != ENOENT || have_sve) { + perror("KVM_GET_ONE_REG(KVM_REG_ARM64_SVE_VLS)"); + ret = -1; + } + } else { + char const *prefix = ""; + + if (!have_sve) { + puts("KVM_REG_ARM64_SVE_VLS unexpectedly present"); + ret = -1; + } + + if (vls[7] == (u64)-7) { + puts("KVM_REG_ARM64_SVE_VLS short read?"); + ret = -1; + } + + if (vls[8] != (u64)-7) { + puts("KVM_REG_ARM64_SVE_VLS overrun?"); + ret = -1; + } + + fputs("SVE VQs: ", stdout); + + for (i = 0; i < 512; ++i) + if ((vls[i / 64] >> (i % 64)) & 1) { + printf("%s%lu", prefix, (unsigned long)i + 1); + prefix = ","; + } + + putchar('\n'); + } + + fflush(stdout); + + return ret; + +error: + return -1; +} + static int debug_fd; void kvm_cpu__set_debug_fd(int fd) @@ -156,8 +263,10 @@ struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, unsigned long cpu_id) if (err || target->init(vcpu)) die("Unable to initialise vcpu"); - if (kvm->cfg.arch.show_reg_list) + if (kvm->cfg.arch.show_reg_list) { + kvm_show_sve_info(vcpu); kvm_show_reg_list(vcpu); + } coalesced_offset = ioctl(kvm->sys_fd, KVM_CHECK_EXTENSION, KVM_CAP_COALESCED_MMIO); From patchwork Fri Jan 18 16:14:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770855 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BCE296C2 for ; Fri, 18 Jan 2019 16:17:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7C772F65B for ; Fri, 18 Jan 2019 16:17:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 99B902F683; Fri, 18 Jan 2019 16:17:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F08DA2F663 for ; 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Fri, 18 Jan 2019 16:17:48 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkWnx-0005ZN-8A for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:15:51 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AC62D1650; Fri, 18 Jan 2019 08:15:36 -0800 (PST) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id BC4CA3F557; Fri, 18 Jan 2019 08:15:34 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 10/12] arm64: [HACK] Allow configuration of the guest's set of SVE vector lengths Date: Fri, 18 Jan 2019 16:14:19 +0000 Message-Id: <1547828061-20462-11-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081537_554395_C53CB13E X-CRM114-Status: GOOD ( 15.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP By default, for each vcpu KVM enabled the same set of SVE vector as supported by the host. In order to allow a different set of vector lengths permitted (to the extent supported by the SVE architecture), an option --sve-vqs is added, which accepts a comma-separated list of vector lengths to enable. This options follows the "vq" convention, describing the vector length as a multiple of 128-bit quadwords. This is largely for developer convenience and may be confusing for users. Although KVM supports a different set of vector lengths to be enabled on each vcpu, this patch provides no means to request such a configuration for now. Support could be added later, if desired. Signed-off-by: Dave Martin --- arm/aarch64/include/kvm/kvm-config-arch.h | 5 ++ arm/kvm-cpu.c | 80 +++++++++++++++++++++++++++++++ 2 files changed, 85 insertions(+) diff --git a/arm/aarch64/include/kvm/kvm-config-arch.h b/arm/aarch64/include/kvm/kvm-config-arch.h index 7710f14..f0a7934 100644 --- a/arm/aarch64/include/kvm/kvm-config-arch.h +++ b/arm/aarch64/include/kvm/kvm-config-arch.h @@ -1,6 +1,8 @@ #ifndef KVM__KVM_CONFIG_ARCH_H #define KVM__KVM_CONFIG_ARCH_H +int sve_vls_parser(const struct option *opt, const char *arg, int unset); + #define ARM_OPT_ARCH_RUN(cfg) \ OPT_BOOLEAN('\0', "aarch32", &(cfg)->aarch32_guest, \ "Run AArch32 guest"), \ @@ -10,6 +12,9 @@ "Enable SVE for the guest"), \ OPT_BOOLEAN('\0', "show-reg-list", &(cfg)->show_reg_list, \ "Show the list of KVM register IDs on startup"), \ + OPT_CALLBACK('\0', "sve-vqs", NULL, "comma-separated list", \ + "Override the SVE vector lengths supported", \ + sve_vls_parser, NULL), \ OPT_U64('\0', "kaslr-seed", &(cfg)->kaslr_seed, \ "Specify random seed for Kernel Address Space " \ "Layout Randomization (KASLR)"), diff --git a/arm/kvm-cpu.c b/arm/kvm-cpu.c index 80e7b79..d3dfe2d 100644 --- a/arm/kvm-cpu.c +++ b/arm/kvm-cpu.c @@ -6,6 +6,72 @@ #include "kvm/kvm.h" #include "kvm/kvm-cpu.h" +static int vqs_set; +static u64 sve_vq_map[8]; + +static int add_vq(int vq) +{ + if (vq < 1 || vq > 512) { + fprintf(stderr, "%d: VQ out of range\n", vq); + return -1; + } + + --vq; + sve_vq_map[vq / 64] |= (u64)1 << vq; + return 0; +} + +int sve_vls_parser(const struct option *opt, const char *arg, int unset) +{ + int n = -1, val; + size_t offset = 0; + + if (sscanf(arg + offset, "%i%n", &val, &n) < 1 || n < 0) + goto mismatch; + + if (add_vq(val)) + return -1; + + offset += n; + while (1) { + n = -1; + if (sscanf(arg + offset, ",%i%n", &val, &n) < 1 && n < 0) + break; + + if (add_vq(val)) + return -1; + + offset += n; + } + +mismatch: + if (arg[offset]) { + fprintf(stderr, "Bad set of vector lengths: %s\n", arg); + return -1; + } + + vqs_set = -1; + + return 0; +} + +static int try_to_set_vqs(struct kvm_cpu const *vcpu) +{ + struct kvm_one_reg reg; + + if (!vqs_set) + return 0; /* nothing to do */ + + reg.addr = (u64)&sve_vq_map; + reg.id = KVM_REG_ARM64_SVE_VLS; + if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®)) { + perror("KVM_SET_ONE_REG(KVM_REG_ARM64_SVE_VLS)"); + return -1; + } + + return 0; +} + static int kvm_show_reg_list(struct kvm_cpu const *vcpu) { int ret = -1; @@ -263,9 +329,23 @@ struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, unsigned long cpu_id) if (err || target->init(vcpu)) die("Unable to initialise vcpu"); + if (kvm->cfg.arch.show_reg_list) + kvm_show_sve_info(vcpu); + + if (try_to_set_vqs(vcpu)) + die("SVE vector length configuration failed"); + if (kvm->cfg.arch.show_reg_list) { + puts("After setting SVE vector lengths:"); kvm_show_sve_info(vcpu); + kvm_show_reg_list(vcpu); + + if (!try_to_set_vqs(vcpu)) { + if (vqs_set) + die("SVE vector length configuration after KVM_GET_REG_LIST succeeded unexpectedly"); + } else + puts("(as expected)"); } coalesced_offset = ioctl(kvm->sys_fd, KVM_CHECK_EXTENSION, From patchwork Fri Jan 18 16:14:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770857 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 62CC013B4 for ; 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Fri, 18 Jan 2019 08:15:36 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 11/12] arm64: [HACK] FPSIMD/SVE register dumping for lkvm debug Date: Fri, 18 Jan 2019 16:14:20 +0000 Message-Id: <1547828061-20462-12-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081539_669186_5B4E71FE X-CRM114-Status: GOOD ( 14.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP To assist with debugging, and to exercise the KVM_{GET,SET}_ONE_REG interface extensions for SVE, this patch adds code to dump the full contents of the SVE and/or FPSIMD registers when triggered using lkvm debug -d. This is a giant ugly hack and also slow (even with hacks to reduce the number of dprintf() calls). Due to a lack of buffering on one or both ends of the guest socket connection, dumping the vcpu that's running on the same CPU as lkvm debug seems to cause a lot of context switch thrashing also, but no attempt has been made to address this here, since this patch is in any case rather abusing the guest socket. If we want to do something like this for real, some more careful thought about how to optimise the protocol is needed. Signed-off-by: Dave Martin --- arm/aarch64/kvm-cpu.c | 186 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 186 insertions(+) diff --git a/arm/aarch64/kvm-cpu.c b/arm/aarch64/kvm-cpu.c index 0aaefaf..28c5010 100644 --- a/arm/aarch64/kvm-cpu.c +++ b/arm/aarch64/kvm-cpu.c @@ -2,6 +2,10 @@ #include "kvm/kvm.h" #include "kvm/virtio.h" +#include +#include +#include +#include #include #define COMPAT_PSR_F_BIT 0x00000040 @@ -197,11 +201,128 @@ void kvm_cpu__show_code(struct kvm_cpu *vcpu) kvm__dump_mem(vcpu->kvm, data, 32, debug_fd); } +static void sappendf(char **p, size_t *size, char const *format, ...) +{ + va_list vl; + int n; + + va_start(vl, format); + n = vsnprintf(*p, *size, format, vl); + va_end(vl); + + if (n < 0 || (unsigned)n >= *size) + die("sappendf buffer too small"); + + *p += n; + *size -= n; +} + +static void sappend_bytes(char **p, size_t *size, + void const *bytes, size_t nbytes) +{ + unsigned char const *b = bytes; + + while (nbytes--) + sappendf(p, size, "%.2x", *b++); +} + +static void show_sve_zn_slice(int debug_fd, struct kvm_cpu const *vcpu, + unsigned int n, unsigned int i) +{ + struct kvm_one_reg reg; + char bytes[256]; + char str[2 * sizeof bytes + 9], *strp; + size_t strsz; + + reg.id = KVM_REG_ARM64_SVE_ZREG(n, i); + + assert((size_t)1 << ((reg.id & KVM_REG_SIZE_MASK) >> + KVM_REG_SIZE_SHIFT) == + sizeof bytes); + reg.addr = (__u64)bytes; + + strp = str; + strsz = sizeof str; + + sappendf(&strp, &strsz, " Z%.2u/%.2u:", n, i); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) { + dprintf(debug_fd, "%s(%s)\n", str, strerror(errno)); + if (vcpu->kvm->cfg.arch.has_sve) + die("Z-reg unexpectedly absent on SVE vcpu"); + + return; + } + + if (!vcpu->kvm->cfg.arch.has_sve) + die("Z-reg unexpectedly present on non-SVE vcpu"); + + sappend_bytes(&strp, &strsz, bytes, sizeof bytes); + dprintf(debug_fd, "%s\n", str); +} + +static void show_sve_zn(int debug_fd, struct kvm_cpu const *vcpu, + unsigned int n) +{ + show_sve_zn_slice(debug_fd, vcpu, n, 0); + show_sve_zn_slice(debug_fd, vcpu, n, 1); +} + +static void show_sve_pn_slice(int debug_fd, struct kvm_cpu const *vcpu, + unsigned int n, unsigned int i) +{ + struct kvm_one_reg reg; + char bytes[32]; + char str[2 * sizeof bytes + 9], *strp; + size_t strsz; + + reg.id = KVM_REG_ARM64_SVE_PREG(n, i); + + assert((size_t)1 << ((reg.id & KVM_REG_SIZE_MASK) >> + KVM_REG_SIZE_SHIFT) == + sizeof bytes); + reg.addr = (__u64)bytes; + + strp = str; + strsz = sizeof str; + + if (reg.id == KVM_REG_ARM64_SVE_FFR(i)) + sappendf(&strp, &strsz, " FFR/%.2u:", i); + else + sappendf(&strp, &strsz, " P%.2u/%.2u:", n, i); + + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) { + dprintf(debug_fd, "%s(%s)\n", str, strerror(errno)); + if (vcpu->kvm->cfg.arch.has_sve) + die("P-reg unexpectedly absent on SVE vcpu"); + + return; + } + + if (!vcpu->kvm->cfg.arch.has_sve) + die("P-reg unexpectedly present on non-SVE vcpu"); + + sappend_bytes(&strp, &strsz, bytes, sizeof bytes); + dprintf(debug_fd, "%s\n", str); +} + +static void show_sve_pn(int debug_fd, struct kvm_cpu const *vcpu, + unsigned int n) +{ + show_sve_pn_slice(debug_fd, vcpu, n, 0); + show_sve_pn_slice(debug_fd, vcpu, n, 1); +} + void kvm_cpu__show_registers(struct kvm_cpu *vcpu) { struct kvm_one_reg reg; unsigned long data; + unsigned int data32; int debug_fd = kvm_cpu__get_debug_fd(); + unsigned int i; + char bytes[16]; + unsigned long vqs[8]; + char str[2 * sizeof vqs + 1], *strp; + size_t strsz; reg.addr = (u64)&data; dprintf(debug_fd, "\n Registers:\n"); @@ -225,4 +346,69 @@ void kvm_cpu__show_registers(struct kvm_cpu *vcpu) if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) die("KVM_GET_ONE_REG failed (lr)"); dprintf(debug_fd, " LR: 0x%lx\n", data); + + reg.addr = (__u64)bytes; + for (i = 0; i < 32; ++i) { + reg.id = ARM64_CORE_REG(fp_regs.vregs[i]); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + dprintf(debug_fd, " V%.2u: (%s)\n", + i, strerror(errno)); + else { + strp = str; + strsz = sizeof str; + sappend_bytes(&strp, &strsz, bytes, 16); + dprintf(debug_fd, " V%.2u: %s\n", i, str); + } + } + + reg.addr = (__u64)&data32; + + reg.id = ARM64_CORE_REG(fp_regs.fpsr); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + die("KVM_GET_ONE_REG failed (fpsr)"); + dprintf(debug_fd, " FPSR: 0x%x\n", data32); + + reg.id = ARM64_CORE_REG(fp_regs.fpcr); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) + die("KVM_GET_ONE_REG failed (fpcr)"); + dprintf(debug_fd, " FPCR: 0x%x\n", data32); + + reg.id = KVM_REG_ARM64_SVE_VLS; + assert((size_t)1 << ((reg.id & KVM_REG_SIZE_MASK) >> + KVM_REG_SIZE_SHIFT) == + sizeof vqs); + reg.addr = (u64)&vqs; + + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) { + dprintf(debug_fd, " SVE_VLS:(%s)\n", strerror(errno)); + if (vcpu->kvm->cfg.arch.has_sve) + die("SVE vcpu doesn't have KVM_REG_ARM64_SVE_VLS!"); + } else { + if (!vcpu->kvm->cfg.arch.has_sve) + die("KVM_REG_ARM64_SVE_VLS present on non-SVE vcpu!"); + + strp = str; + strsz = sizeof str; + sappend_bytes(&strp, &strsz, vqs, sizeof vqs); + dprintf(debug_fd, " SVE_VLS:%s\n", str); + } + + reg.addr = (__u64)&data; + reg.id = ARM64_SYS_REG(3, 0, 1, 2, 0); + if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) { + dprintf(debug_fd, " ZCR_EL1:(%s)\n", strerror(errno)); + if (vcpu->kvm->cfg.arch.has_sve) + die("ZCR_EL1 unexpectedly absent on SVE vcpu"); + } else { + if (!vcpu->kvm->cfg.arch.has_sve) + die("ZCR_EL1 unexpectedly present on non-SVE vcpu"); + + dprintf(debug_fd, " ZCR_EL1:0x%lx\n", data); + } + + for (i = 0; i < 32; ++i) + show_sve_zn(debug_fd, vcpu, i); + + for (i = 0; i < 16 + 1 /*FFR*/; ++i) + show_sve_pn(debug_fd, vcpu, i); } From patchwork Fri Jan 18 16:14:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 10770859 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EB44613B4 for ; Fri, 18 Jan 2019 16:18:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D7D632F64C for ; Fri, 18 Jan 2019 16:18:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CC56C2F658; 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Fri, 18 Jan 2019 08:15:39 -0800 (PST) From: Dave Martin To: kvmarm@lists.cs.columbia.edu Subject: [RFC PATCH 12/12] arm64: [HACK] Check that out-of-range SVE register IDs can't be dumped Date: Fri, 18 Jan 2019 16:14:21 +0000 Message-Id: <1547828061-20462-13-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> References: <1547828061-20462-1-git-send-email-Dave.Martin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_081542_398289_92FBFF9B X-CRM114-Status: GOOD ( 11.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Julien Grall , Andre Przywara , =?utf-8?q?Alex_Benn=C3=A9e?= , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP As a sanity-check that invalid SVE register IDs can't be accessed via KVM_GET_ONE_REG, this patch adds code to attempt to do just that (at the expense of making dumping even slower). Because of the way the register IDs are encoded, out-of-range slice IDs may still result in a valid register encoding, so there is nothing to test for that case. Signed-off-by: Dave Martin --- arm/aarch64/kvm-cpu.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arm/aarch64/kvm-cpu.c b/arm/aarch64/kvm-cpu.c index 28c5010..6b1580c 100644 --- a/arm/aarch64/kvm-cpu.c +++ b/arm/aarch64/kvm-cpu.c @@ -247,7 +247,7 @@ static void show_sve_zn_slice(int debug_fd, struct kvm_cpu const *vcpu, sappendf(&strp, &strsz, " Z%.2u/%.2u:", n, i); if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) { dprintf(debug_fd, "%s(%s)\n", str, strerror(errno)); - if (vcpu->kvm->cfg.arch.has_sve) + if (n < 32 && vcpu->kvm->cfg.arch.has_sve) die("Z-reg unexpectedly absent on SVE vcpu"); return; @@ -256,6 +256,9 @@ static void show_sve_zn_slice(int debug_fd, struct kvm_cpu const *vcpu, if (!vcpu->kvm->cfg.arch.has_sve) die("Z-reg unexpectedly present on non-SVE vcpu"); + if (n >= 32) + die("Out-of-range Z-reg unexpectedly present"); + sappend_bytes(&strp, &strsz, bytes, sizeof bytes); dprintf(debug_fd, "%s\n", str); } @@ -292,7 +295,7 @@ static void show_sve_pn_slice(int debug_fd, struct kvm_cpu const *vcpu, if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) { dprintf(debug_fd, "%s(%s)\n", str, strerror(errno)); - if (vcpu->kvm->cfg.arch.has_sve) + if (n < 16 + 1 /* FFR */ && vcpu->kvm->cfg.arch.has_sve) die("P-reg unexpectedly absent on SVE vcpu"); return; @@ -301,6 +304,9 @@ static void show_sve_pn_slice(int debug_fd, struct kvm_cpu const *vcpu, if (!vcpu->kvm->cfg.arch.has_sve) die("P-reg unexpectedly present on non-SVE vcpu"); + if (n >= 16 && reg.id != KVM_REG_ARM64_SVE_FFR(i)) + die("Out-of-range P-reg unexpectedly present"); + sappend_bytes(&strp, &strsz, bytes, sizeof bytes); dprintf(debug_fd, "%s\n", str); } @@ -406,9 +412,9 @@ void kvm_cpu__show_registers(struct kvm_cpu *vcpu) dprintf(debug_fd, " ZCR_EL1:0x%lx\n", data); } - for (i = 0; i < 32; ++i) + for (i = 0; i < 32 + 1 /* should fail */; ++i) show_sve_zn(debug_fd, vcpu, i); - for (i = 0; i < 16 + 1 /*FFR*/; ++i) + for (i = 0; i < 16 + 1 /* FFR */ + 1 /* should fail */; ++i) show_sve_pn(debug_fd, vcpu, i); }