From patchwork Fri Oct 21 22:28:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evgenii Stepanov X-Patchwork-Id: 13015528 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0861EFA3740 for ; Fri, 21 Oct 2022 22:29:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: Mime-Version:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=k079UuiHP3YRBhyvlNy/B098UC62BEQ1enhQlEg3+F8=; b=OLd /uOMJLeY1rCikd9iYZHfkWu5ymfkFrVyTyoJmj1Lq1JzX7882U3TFXNbMzU37pLuDAJOF98l8ux+I ZmbyIk4bfYw9adFkS1nWejFMbB+xhDgYPuMP3J3t+eHykZCCKTZM8NI7vF7EoitaryBGJdVcaC5w3 wpkNF1vlLjC863/W7tr/+iLbni7yKtV6FhPuXoEuRmm2IU807qmCoNJRRzYMHOJepaJapfD6EHZXi 89JG0iVIHYReICfuoEnnbBtHK3spm9P4g+OPEiIWXgGJijZLit15Murj7TgC8O10syXMuFFSlr9hv m80EeCTH0BPmjnNmnuodTUFnRSoyYbg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1om0V9-00ACcO-Pi; Fri, 21 Oct 2022 22:28:27 +0000 Received: from mail-yw1-x1149.google.com ([2607:f8b0:4864:20::1149]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1om0V6-00ACbj-G9 for linux-arm-kernel@lists.infradead.org; Fri, 21 Oct 2022 22:28:25 +0000 Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-36b1a68bfa6so202547b3.22 for ; Fri, 21 Oct 2022 15:28:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:mime-version:date:from:to:cc:subject :date:message-id:reply-to; bh=UNGrrBQSFJPioHxic2YhpQaL13tNOPKKc9e4+Y6lW8k=; b=GRjRHyXTE27B29YnD2HJByyz3W+700Npn0UlJyjcUv0fTWRPpk97F2bNonvmnpiDxh g/78zE0v2v228u8mCtmIvNuulUIzJU1BjwAijMPIxh9Rcg1p7sOtw2GiPxuAx+TPnpQd syLdHCxlIqOxrJmbssi6cOkK3CP06GK+70QGTkOSqcnw5vpjij0H7u8hWTD6yC2WIxjz /UJ3W3L7OpKZO3zw8kAXtj0iectnuEdw3c9hoGKMLtIo3Oe6V/YlqbNOH/yGyj9YJBNm vaIsPoH74TVQXh/5h7oXgdBAyKbwRwb5LxAl4j9TTKx+te6MOjhqPpttBElipDkFhDf7 btJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:mime-version:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=UNGrrBQSFJPioHxic2YhpQaL13tNOPKKc9e4+Y6lW8k=; b=oKmZpWzaLv+wxFz0nfhGbr13aQx8ohXnFkieYWD3v+9UsHwL6DpGq8zrRyL0J89Bux aNXk++NZPxdoHn/tfal/CVGDgq2qG9d+Uw+7MZejdnuX8r0PxusKrErzBzQVtbRJ6fn5 7gxSqQiVQD8R3bOHFP7VZJ9XoyyXQc3cd2lHBddulVp9djXDFv7N+0UNX5XtivZh+tql vWEvsDBX+BcTDv0Vo9Q8Hvcq2pL7+RqH0RmiFSPyJzz2Drq3r8+Cyq729aiFsla9KPKf W9o1ydwOLK1oivyTE4wKn4HBRASmfLd7fY2Okcu3rPhna6Wng+sdz5a5oKdqeGu1XAOE SmTg== X-Gm-Message-State: ACrzQf1lZlQWAcBJEXT3YCiK8qgDAvOi1Q3b3GREILpcHCinJHRwqJ2L fJl1DLnIEYCQw7fiXYnU1+PLOE3t3Mpz X-Google-Smtp-Source: AMsMyM5TbyMWFj8dXnMjbTzsabuwCCGxprLxGdPNkjU9sB5Pn03oatqgJU6mjH6D+fPclNH2ondarbIPH43I X-Received: from eugenis.svl.corp.google.com ([2620:15c:2ce:200:8a12:10f5:7696:29de]) (user=eugenis job=sendgmr) by 2002:a81:130a:0:b0:360:9739:82be with SMTP id 10-20020a81130a000000b00360973982bemr19424499ywt.69.1666391301693; Fri, 21 Oct 2022 15:28:21 -0700 (PDT) Date: Fri, 21 Oct 2022 15:28:11 -0700 Mime-Version: 1.0 X-Mailer: git-send-email 2.38.0.135.g90850a2211-goog Message-ID: <20221021222811.2366215-1-eugenis@google.com> Subject: [PATCH] arm64/mm: Consolidate TCR_EL1 fields From: Evgenii Stepanov To: Greg Kroah-Hartman , linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221021_152824_564773_BC79FB5B X-CRM114-Status: GOOD ( 12.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Anshuman Khandual commit e921da6bc7cac5f0e8458fe5df18ae08eb538f54 upstream. This renames and moves SYS_TCR_EL1_TCMA1 and SYS_TCR_EL1_TCMA0 definitions into pgtable-hwdef.h thus consolidating all TCR fields in a single header. This does not cause any functional change. Cc: Catalin Marinas Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Acked-by: Catalin Marinas Signed-off-by: Anshuman Khandual Link: https://lore.kernel.org/r/1643121513-21854-1-git-send-email-anshuman.khandual@arm.com Signed-off-by: Will Deacon --- arch/arm64/include/asm/pgtable-hwdef.h | 2 ++ arch/arm64/include/asm/sysreg.h | 4 ---- arch/arm64/mm/proc.S | 2 +- 3 files changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index 40085e53f573..66671ff05183 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -273,6 +273,8 @@ #define TCR_NFD1 (UL(1) << 54) #define TCR_E0PD0 (UL(1) << 55) #define TCR_E0PD1 (UL(1) << 56) +#define TCR_TCMA0 (UL(1) << 57) +#define TCR_TCMA1 (UL(1) << 58) /* * TTBR. diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 394fc5998a4b..f79f3720e4cb 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -1094,10 +1094,6 @@ #define CPACR_EL1_ZEN_EL0EN (BIT(17)) /* enable EL0 access, if EL1EN set */ #define CPACR_EL1_ZEN (CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN) -/* TCR EL1 Bit Definitions */ -#define SYS_TCR_EL1_TCMA1 (BIT(58)) -#define SYS_TCR_EL1_TCMA0 (BIT(57)) - /* GCR_EL1 Definitions */ #define SYS_GCR_EL1_RRND (BIT(16)) #define SYS_GCR_EL1_EXCL_MASK 0xffffUL diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index d35c90d2e47a..50bbed947bec 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -46,7 +46,7 @@ #endif #ifdef CONFIG_KASAN_HW_TAGS -#define TCR_MTE_FLAGS SYS_TCR_EL1_TCMA1 | TCR_TBI1 | TCR_TBID1 +#define TCR_MTE_FLAGS TCR_TCMA1 | TCR_TBI1 | TCR_TBID1 #else /* * The mte_zero_clear_page_tags() implementation uses DC GZVA, which relies on