From patchwork Tue Oct 25 10:17:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vadym Kochan X-Patchwork-Id: 13019021 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DC7D7C38A2D for ; Tue, 25 Oct 2022 10:20:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TrP1IO28cB4cj9owYE13KfDXTvkEdCszxsyJ3f1bBX4=; b=hLvPGQLJqJNU5q Nn0Jktjv/Brunhei1dTsF24C4fSe/PWwPLm30JWUZ8v8qQc31nVFAndcUwRi2Zt38X93VLS55Q+tc XJNEwaX551t3Z6+dU7SU6z7ZUoEIYcBPbOPBDd0Gc8DSYKH8bL98j9YHSHMhtBD0ANyS0zPo+A/kn BLPrZ4Xq64g/M9YtdBDA8fLBKuRZZze9cWGkBcgUIZt+SkbsAS6VVPznalKLH/hAbKOS0rtwn6GhX njcrDljrpNgdhdrOHvfFOCTacHtRLwysxLVsS2t0jdB/ym1ppalfC6QGwnqwr0K3jnTypb0ShGSzJ soNsjCrC/WcSSNukYTKg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1onH0u-004j1Q-A5; Tue, 25 Oct 2022 10:18:28 +0000 Received: from mail-db5eur02on2112.outbound.protection.outlook.com ([40.107.249.112] helo=EUR02-DB5-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1onH0d-004iuZ-GU; Tue, 25 Oct 2022 10:18:13 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=NVDFdosfl9lcxttBQGpwtfwv4RRtsGwmgtLCSBhviXBP9Y5Wvj5xJczThU8Sui/0ngfj0YMzWV9WvTEUOCwEw2Xsyo1UNZvn9Qb64il9tF72rEv+Pcssv93nP3kpjgLkziLUYCbbCYKdB02an2whzgR87lvCVSmjSmACHEs1AL0IzqdiSsAbIrU8HbnAQBnwFSJiqZQNXXYQA0MVf1E7UriV1ySp58guk+XKfVYnEdVrebN7T9DfKnzEfkSF/lOzQ+oTlC4xaE/qYm4NYYwPdwWQt35ZPhvzS9DMGZMO/xuUO1cHdFv3rGmFriNGw/a7e6nMdtil83qpjYcgavD/SA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=KQfE0CYlWPJ/xPsuL9EtH9SgU8dna71cdVrF/KPF7ZI=; b=oKb2V+t6VD0nHkplviOmnsKZIYuPta4q+g4aKz48T7FcPkRnHPPpEyA8pfbIETg7nEgrzGZxt2mcceNzEmLzOzbiuLTg5tuQQEW+o0NXcNb0S/fiQTehr4C+nPfibQz/xVg88NTGEG+a9LJ98j3/enCt+BGJHBM6jaVv+CKnLdBjl1Zmj3b3frSbrt0FRPDgji4uzGMnZ5EvzMD4RmOKrNIDdZiZpmWYaEcjK7tQKPRbkHXs8EkrWcmSeO33lIou3sSUgA/cFW9qBdHJtANv0x/JawsQShHZkT4R0TwED6cz06sexSSLm+6zXWX1bJF5WAyhFnueqehMlSQ6eNDAIQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=plvision.eu; dmarc=pass action=none header.from=plvision.eu; dkim=pass header.d=plvision.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=plvision.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=KQfE0CYlWPJ/xPsuL9EtH9SgU8dna71cdVrF/KPF7ZI=; b=ZgnNO8vhAwyb5TVwf+87vutUKpHa9ot1SiDjThosHJ+lf2e1mh9g33ThuLkZ6CbtXQDIAeAgm2UszM4Cms4RUOSEFcfpz6wcwvgMCskmDGlWzG4PPqq/NQENYxE6Allg71od6aUVvDumNdZQiNzw1qPY2g16bM/bSHZmQP3Gvds= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=plvision.eu; Received: from VI1P190MB0317.EURP190.PROD.OUTLOOK.COM (2603:10a6:802:38::26) by VI1P190MB0733.EURP190.PROD.OUTLOOK.COM (2603:10a6:800:121::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5746.28; Tue, 25 Oct 2022 10:18:07 +0000 Received: from VI1P190MB0317.EURP190.PROD.OUTLOOK.COM ([fe80::2b03:a6ec:3529:b969]) by VI1P190MB0317.EURP190.PROD.OUTLOOK.COM ([fe80::2b03:a6ec:3529:b969%5]) with mapi id 15.20.5746.028; Tue, 25 Oct 2022 10:18:07 +0000 From: Vadym Kochan To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Elad Nachman , Vadym Kochan , Chris Packham Subject: [PATCH v4 1/2] dt-bindings: mtd: marvell-nand: Convert to YAML DT scheme Date: Tue, 25 Oct 2022 13:17:10 +0300 Message-Id: <20221025101713.11893-2-vadym.kochan@plvision.eu> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221025101713.11893-1-vadym.kochan@plvision.eu> References: <20221025101713.11893-1-vadym.kochan@plvision.eu> X-ClientProxiedBy: FR3P281CA0146.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:95::18) To VI1P190MB0317.EURP190.PROD.OUTLOOK.COM (2603:10a6:802:38::26) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VI1P190MB0317:EE_|VI1P190MB0733:EE_ X-MS-Office365-Filtering-Correlation-Id: 1c2c051d-3a45-41c9-53e4-08dab67235b1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ywk3RQdmhgmetWTRy1foH2K2cotDe+87INiF6XKOZ4G8LeDcbMhz6R/d0d224jNfxKWwZdO4+XxduCysU6Lcoz21482nrsAsJeKnkYzLC+j/zJXzQg+vL7gzRcN6rcMC90QQ8JKfz6OvK1hSvrCv1My142KP82jkUJ3tn52HHGiikXs5az7mPRdBfrATkQ9xyE7dip9ArFzWdv94OfLrNVVyWAThc01xWeze2V6Drp9NYaSZlL3CzFuEC65wpo7bIa6VvsdNkGmt0hWzQ0J1zT6CIkAp9KBSCRUSvE83gNeWD0ujvRDHykyDIjEQDfIbINZMBkpxONlV/nTUI20SufTGQkX4TPx0p4hE4T2FAuFk+zCvDz9uAASd08ot4HjCrh0g1mDy3E8NQ3YkusETXyA4iqQlGd8USQAdrB/Y/AinoJCj1YBRZBxVAkhDlm+bAIj6lImfEg2dAQuczkC93VDF8EUArkVBThxVRT3JX3ZjfLRLXR/9vjzWS/FwjQEvgU1j1GAchmRUlvTbIBY4GTLebgvp7Gcn03ZV01dLPW2Gh/5jt3KcTlbDCqoAcD4dt7prKYUWuCnPSMpDvyQksOE3BcV7XhfVJj7CcsP52QChMWN6IV5e4Uj63C/y8KtmTdlH4ZI0xhR0VQbiCbB91/JGKIe4oKxaIagerewjdbGvXWoKTeMkmSiMihanq1dMkbIc57Ob7OyNJPUoKcj32ZW+gtFbaQipZtqh1B9XBuOqlwTh4h+pVkL4PC/fTYQAQyrYgahg5wP2jE0Ipu3bVT1sMFdijvQq0wJtdggG8Wz0p0VBk7svVfJCVEKI7pAR X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VI1P190MB0317.EURP190.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230022)(4636009)(376002)(366004)(34036004)(396003)(39830400003)(346002)(136003)(451199015)(86362001)(36756003)(38100700002)(38350700002)(921005)(2906002)(5660300002)(7416002)(83380400001)(44832011)(8936002)(41320700001)(30864003)(6666004)(52116002)(6506007)(186003)(2616005)(1076003)(26005)(6512007)(66946007)(110136005)(54906003)(8676002)(508600001)(316002)(66556008)(66476007)(6486002)(966005)(41300700001)(4326008);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: LpI8+ZcAfHb7ehoK8MfiND+POJDgs+eD0yFAme0DW+2HZSEG4A3IBJK//2Q56T54+sGZz3uMDV3awIIgFqWvzuw5RYt97emEI3LenDR4fDvH3uYa2WpCUnDfJV2YijAGmX4bpu5Hxpqpa0lAxxoAdURwTI/KF8pTh71Lweb9Cpt4rOhGZzjMuYP20cEEvtnFZVX+hXt4uRlpn9FD4vVoG5BezWEgJ8S6mPTwGPRyHA/VUeOG7Rkb4av3r1YWuy4m5ARQ4qda6UzN5WRn8GwERVAa7L5ifrEyPxfMVQ2hK8cfEXrcs0V7yhJks/M1iXrcRQcpYTdqEZnPazk8zmz2q1KhpXxj7a8av4EcnZsCj1e4vnFRIvHwSgGIOEede17VMicg86vyUq/3qJf9NFoxZ6YIqzLss9eG+h6Zb5TcbktmuIgrbcxNjul2wmlTw7Blrkg34GTEG/wVdMwypP3Rgq6gZZbgC3gYFgP6EhDoj8fD1YQ6cQy08lTmHpx8jaItiymjoU8qK8FcpoWyhAYr9N6VipO57fdpHzuGdkzbWZJS5lpX2FnGzEDzDmoMhWfCPC1N236Qb3/EobfYRWgwFXjsMcArJOVcEQUkHFQ04+/+dz84H+6MKykXrhARAcYWrngthWlT0xcBYaFH03/geixDRgD8DOOcH+FC7vg6munOdPPvShuiBILASoFYNZdAF1y7SumycDsKkXnzzMMVaafl7ZN+4nul7gXZrk5+VNuY0mI8H+qjFPX5NNoWdVfqmZMlGToEgnACPfbVRycxpaqF34nJDKesTp8tbb2GRwMwcFFYDjkxegEzsNe4nMMrZhbkaHVH595Ya5w96oLD0zkXHKuTKn9f9EXllVqVDYNO2GYgdXCK/UKUvjkwXE/D7laR5NAn2jaF2ZXJDNoUC49ET827yVntHmzvJo61bk/DzjcfqV7Jl1yviG2fwLbLMRbu1prnWhYoyEQwaDGz8ul5cHozf0sbaRmkWfarYJeHAPbxLm6LGiGMKrmdUxZIQd1dKG2nZNxszwDKM1QJ1IPqgDDUsWZPUuNwgTeNaPcRGMgXUEmE+A46LvaZ+VveiGT8bF78C7fSn2WE46vf3uplWctc4z1/GCVASNtmh/Wci3U1IkI3E0nTkaVETKz8L2eoOpJWwu1rJl+GFwjG80/sHxG4t5RZ4ODRVUGAoCdQGVuvM4REyphSUKmLtoljWDHVOP1e8ZDiuinZ7U1sVtlIVObwR/6ee8nM11rI0Ddj37hXjVRJK5iZrLNfzSqopf0YwhUi09mPwzOqFr+Ayhly7xuz5SnCX3IDNVTZGJwmBSGBkJ5J9a91Rh/Tth9VA7Nb/lgviYXljSYp0aZFBqfr22xAKdc+3FKENjWZa/VibyCM9cdipXX6thD7Dfgk54OylSA7Cu3D0qTzeA0SKt++5QEhjrwuZcYIauTm1bkUAfGH0I99eHkjlg1Mjj2z34HiqPuqSxGpPp+9jib9bcZP0fPZ8CUbKByCrTRJXjhq4CS0UdVKBhb+w1NJoyqmY8ITFZTsx45RYb4HcXqAx4K90WGtkkwWxUtcqPaoqcO2/87aD1dUzJrXuzGMkTw1nrM/tDPzrbT7EAEM1u0MaQ== X-OriginatorOrg: plvision.eu X-MS-Exchange-CrossTenant-Network-Message-Id: 1c2c051d-3a45-41c9-53e4-08dab67235b1 X-MS-Exchange-CrossTenant-AuthSource: VI1P190MB0317.EURP190.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2022 10:18:07.1093 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 03707b74-30f3-46b6-a0e0-ff0a7438c9c4 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: +Oz/CAlO5YXDwyoII9u2j+vEnrR6hcb2IXKlVfGjzGEzpNFIjmCB+cdZFj69pJcKonKDRCosc7AbTShOsBf1lhrxqTRnZZwwtW/ZnfOk9J8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1P190MB0733 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221025_031811_589750_D679B357 X-CRM114-Status: GOOD ( 22.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Switch the DT binding to a YAML schema to enable the DT validation. Dropped deprecated compatibles and properties described in txt file. Signed-off-by: Vadym Kochan --- v4: 1) Remove "label" and "partitions" properties 2) Use 2 clocks for A7K/8K platform which is a requirement v3: 1) Remove txt version from the MAINTAINERS list 2) Use enum for some of compatible strings 3) Drop: #address-cells #size-cells: as they are inherited from the nand-controller.yaml 4) Add restriction to use 2 clocks for A8K SoC 5) Dropped description for clock-names and extend it with minItems: 1 6) Drop description for "dmas" 7) Use "unevalautedProperties: false" 8) Drop quites from yaml refs. 9) Use 4-space indentation for the example section v2: 1) Fixed warning by yamllint with incorrect indentation for compatible list .../bindings/mtd/marvell,nand-controller.yaml | 187 ++++++++++++++++++ .../devicetree/bindings/mtd/marvell-nand.txt | 126 ------------ MAINTAINERS | 1 - 3 files changed, 187 insertions(+), 127 deletions(-) create mode 100644 Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml delete mode 100644 Documentation/devicetree/bindings/mtd/marvell-nand.txt diff --git a/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml new file mode 100644 index 000000000000..71c870867552 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/marvell,nand-controller.yaml @@ -0,0 +1,187 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell NAND Flash Controller (NFC) + +maintainers: + - Miquel Raynal + +properties: + compatible: + oneOf: + - items: + - const: marvell,armada-8k-nand-controller + - const: marvell,armada370-nand-controller + - enum: + - marvell,armada370-nand-controller + - marvell,pxa3xx-nand-controller + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: + Shall reference the NAND controller clocks, the second one is + is only needed for the Armada 7K/8K SoCs + + clock-names: + items: + - const: core + - const: reg + + dmas: + maxItems: 1 + + dma-names: + items: + - const: rxtx + + marvell,system-controller: + $ref: /schemas/types.yaml#/definitions/phandle + description: Syscon node that handles NAND controller related registers + +patternProperties: + "^nand@[0-3]$": + type: object + properties: + reg: + minimum: 0 + maximum: 3 + + nand-rb: + minimum: 0 + maximum: 1 + + nand-ecc-strength: + enum: [1, 4, 8] + + nand-on-flash-bbt: true + + nand-ecc-mode: true + + nand-ecc-algo: + description: | + This property is essentially useful when not using hardware ECC. + Howerver, it may be added when using hardware ECC for clarification + but will be ignored by the driver because ECC mode is chosen depending + on the page size and the strength required by the NAND chip. + This value may be overwritten with nand-ecc-strength property. + + nand-ecc-step-size: + description: | + Marvell's NAND flash controller does use fixed strength + (1-bit for Hamming, 16-bit for BCH), so the actual step size + will shrink or grow in order to fit the required strength. + Step sizes are not completely random for all and follow certain + patterns described in AN-379, "Marvell SoC NFC ECC". + + marvell,nand-keep-config: + description: | + Orders the driver not to take the timings from the core and + leaving them completely untouched. Bootloader timings will then + be used. + $ref: /schemas/types.yaml#/definitions/flag + + marvell,nand-enable-arbiter: + description: | + To enable the arbiter, all boards blindly used it, + this bit was set by the bootloader for many boards and even if + it is marked reserved in several datasheets, it might be needed to set + it (otherwise it is harmless) so whether or not this property is set, + the bit is selected by the driver. + $ref: /schemas/types.yaml#/definitions/flag + deprecated: true + + required: + - reg + - nand-rb + +unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + +allOf: + - $ref: nand-controller.yaml# + + - if: + properties: + compatible: + contains: + const: marvell,pxa3xx-nand-controller + then: + required: + - dmas + - dma-names + else: + properties: + dmas: false + dma-names: false + + - if: + properties: + compatible: + contains: + const: marvell,armada-8k-nand-controller + then: + required: + - marvell,system-controller + properties: + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + minItems: 2 + else: + properties: + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + + marvell,system-controller: false + +examples: + - | + #include + nand_controller: nand-controller@d0000 { + compatible = "marvell,armada370-nand-controller"; + reg = <0xd0000 0x54>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&coredivclk 0>; + + nand@0 { + reg = <0>; + label = "main-storage"; + nand-rb = <0>; + nand-ecc-mode = "hw"; + marvell,nand-keep-config; + nand-on-flash-bbt; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Rootfs"; + reg = <0x00000000 0x40000000>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mtd/marvell-nand.txt b/Documentation/devicetree/bindings/mtd/marvell-nand.txt deleted file mode 100644 index a2d9a0f2b683..000000000000 --- a/Documentation/devicetree/bindings/mtd/marvell-nand.txt +++ /dev/null @@ -1,126 +0,0 @@ -Marvell NAND Flash Controller (NFC) - -Required properties: -- compatible: can be one of the following: - * "marvell,armada-8k-nand-controller" - * "marvell,armada370-nand-controller" - * "marvell,pxa3xx-nand-controller" - * "marvell,armada-8k-nand" (deprecated) - * "marvell,armada370-nand" (deprecated) - * "marvell,pxa3xx-nand" (deprecated) - Compatibles marked deprecated support only the old bindings described - at the bottom. -- reg: NAND flash controller memory area. -- #address-cells: shall be set to 1. Encode the NAND CS. -- #size-cells: shall be set to 0. -- interrupts: shall define the NAND controller interrupt. -- clocks: shall reference the NAND controller clocks, the second one is - is only needed for the Armada 7K/8K SoCs -- clock-names: mandatory if there is a second clock, in this case there - should be one clock named "core" and another one named "reg" -- marvell,system-controller: Set to retrieve the syscon node that handles - NAND controller related registers (only required with the - "marvell,armada-8k-nand[-controller]" compatibles). - -Optional properties: -- label: see partition.txt. New platforms shall omit this property. -- dmas: shall reference DMA channel associated to the NAND controller. - This property is only used with "marvell,pxa3xx-nand[-controller]" - compatible strings. -- dma-names: shall be "rxtx". - This property is only used with "marvell,pxa3xx-nand[-controller]" - compatible strings. - -Optional children nodes: -Children nodes represent the available NAND chips. - -Required properties: -- reg: shall contain the native Chip Select ids (0-3). -- nand-rb: see nand-controller.yaml (0-1). - -Optional properties: -- marvell,nand-keep-config: orders the driver not to take the timings - from the core and leaving them completely untouched. Bootloader - timings will then be used. -- label: MTD name. -- nand-on-flash-bbt: see nand-controller.yaml. -- nand-ecc-mode: see nand-controller.yaml. Will use hardware ECC if not specified. -- nand-ecc-algo: see nand-controller.yaml. This property is essentially useful when - not using hardware ECC. Howerver, it may be added when using hardware - ECC for clarification but will be ignored by the driver because ECC - mode is chosen depending on the page size and the strength required by - the NAND chip. This value may be overwritten with nand-ecc-strength - property. -- nand-ecc-strength: see nand-controller.yaml. -- nand-ecc-step-size: see nand-controller.yaml. Marvell's NAND flash controller does - use fixed strength (1-bit for Hamming, 16-bit for BCH), so the actual - step size will shrink or grow in order to fit the required strength. - Step sizes are not completely random for all and follow certain - patterns described in AN-379, "Marvell SoC NFC ECC". - -See Documentation/devicetree/bindings/mtd/nand-controller.yaml for more details on -generic bindings. - - -Example: -nand_controller: nand-controller@d0000 { - compatible = "marvell,armada370-nand-controller"; - reg = <0xd0000 0x54>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = ; - clocks = <&coredivclk 0>; - - nand@0 { - reg = <0>; - label = "main-storage"; - nand-rb = <0>; - nand-ecc-mode = "hw"; - marvell,nand-keep-config; - nand-on-flash-bbt; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "Rootfs"; - reg = <0x00000000 0x40000000>; - }; - }; - }; -}; - - -Note on legacy bindings: One can find, in not-updated device trees, -bindings slightly different than described above with other properties -described below as well as the partitions node at the root of a so -called "nand" node (without clear controller/chip separation). - -Legacy properties: -- marvell,nand-enable-arbiter: To enable the arbiter, all boards blindly - used it, this bit was set by the bootloader for many boards and even if - it is marked reserved in several datasheets, it might be needed to set - it (otherwise it is harmless) so whether or not this property is set, - the bit is selected by the driver. -- num-cs: Number of chip-select lines to use, all boards blindly set 1 - to this and for a reason, other values would have failed. The value of - this property is ignored. - -Example: - - nand0: nand@43100000 { - compatible = "marvell,pxa3xx-nand"; - reg = <0x43100000 90>; - interrupts = <45>; - dmas = <&pdma 97 0>; - dma-names = "rxtx"; - #address-cells = <1>; - marvell,nand-keep-config; - marvell,nand-enable-arbiter; - num-cs = <1>; - /* Partitions (optional) */ - }; diff --git a/MAINTAINERS b/MAINTAINERS index d7d76760ef93..9b165112be3e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12344,7 +12344,6 @@ MARVELL NAND CONTROLLER DRIVER M: Miquel Raynal L: linux-mtd@lists.infradead.org S: Maintained -F: Documentation/devicetree/bindings/mtd/marvell-nand.txt F: drivers/mtd/nand/raw/marvell_nand.c MARVELL OCTEONTX2 PHYSICAL FUNCTION DRIVER From patchwork Tue Oct 25 10:17:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vadym Kochan X-Patchwork-Id: 13019022 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DC165C38A2D for ; Tue, 25 Oct 2022 10:20:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=KhCuMPO3xmNUHLEf1xyuwWNgm7kM+Rdwk22q/jE/Dm0=; b=Rsilk8n4dRsSuu sd8FOvS7R28iSuWk3vrgfurUo3HoXXjy42iFjxDckQZ2gZ1ym5sqqf6vnDldBkqXGBT1GCExvWofH W7jlBcAQtx7NsFj3KA/mQLub7NOVaK4Sr9wj6sAf2DWrNDaP/x3R598DAzMUewZmDffZvzykMpBtO O7rbtFxk0ZyYw5pjp7SKrN2cHnltpwZO7OI0PShRPO32NYUI5tb/thkfPNo2VttQmIUAY44Qt7rVE hDXutbAqJj7JV9VgmLeaxM4EK++U/sDsdPRap8V3sZGHWGu7dz9tEqV1mUwAIT5IBzdFVsX5FbJDg +lgwwsNAdP4ZX4CKdpww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1onH1D-004j9B-F0; Tue, 25 Oct 2022 10:18:47 +0000 Received: from mail-db5eur02on2112.outbound.protection.outlook.com ([40.107.249.112] helo=EUR02-DB5-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1onH0g-004iuZ-5p; Tue, 25 Oct 2022 10:18:15 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=bHvLVm/JJeEyvyqkGniFgONzAn0NVNnvM8BCgx/4y0CU6lGG3OWjD5ugfhNdlZT9HoUMZEUbvQnyxTCl2RR7hSxLcQ8X9jeLXEqTVbVCJwDHvIVWzvqwlwgQSzCDMZ+af+BsWD+32fRE/T8qPfmJkux28sSwydC9x56/cv3UhOBle/iwzVd8n3Kj7hGZeABffYqlYfj8agSdJ+LpQIKM4jF/MbHispvzIt1SspM0m7CTKtR7FlEZHPHRCxz9qXngx6vqGguMdMgzSOeF+tuPhJEtPXRvyZMbkbNWzH+TYMV8NOp7oMVZKkMOLO3xD1zfY1vb70OmtthnbI9Bs7K3fQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=bT3zKk5OE9MeHqRlwAWA3oRF6Rlnl/yzQNBN+2ksvzo=; b=bQyNgbfmFHq0q/pgOxOGUYJT2iQMw6qg/VtlvtysOY2y3Bq8WaYyQ2pUqa+8TgUY3LpOVqctFnyG90ZUW1t4Q2PqMt6Y9fkwcCjiqPmz2HDrqpVf6skWQ815LGOD4s7edLGytp8/GKhGuQkuHCpEivsODMNK3J8gC06repmwcREl6GIkJPwIkvoECZH7aFqJ9P2/YfsWnmmmX/PuTbirhcpR/OhUAB1FsE9bmeqyJ6eAGVZvfFj7GzTSyAPEq6xSV8sHWU5C9kW8qOIUejiBRBjqiitWxuGJbVgUc+7Bzr2X7LteLd8DIhszghgZRaBcYQUc8OijL+2dCzIUNBnKmw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=plvision.eu; dmarc=pass action=none header.from=plvision.eu; dkim=pass header.d=plvision.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=plvision.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=bT3zKk5OE9MeHqRlwAWA3oRF6Rlnl/yzQNBN+2ksvzo=; b=mYsro4+67RZC7A+PX35kFaOqsuET7+GKfkgk1fpzTHnNqpp2P/NKeHG7uvgRtCSqnm8uheSlLwCPzOQaRkFdzBr/8GKu4i5t7MCDkWN1NAwtQhyQ8mVv84EWTWkIpl6kixPfz6GMLgyQjXD/QUxZsjYs/nJLOxcBPTQ+eHe1y1g= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=plvision.eu; Received: from VI1P190MB0317.EURP190.PROD.OUTLOOK.COM (2603:10a6:802:38::26) by VI1P190MB0733.EURP190.PROD.OUTLOOK.COM (2603:10a6:800:121::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5746.28; Tue, 25 Oct 2022 10:18:10 +0000 Received: from VI1P190MB0317.EURP190.PROD.OUTLOOK.COM ([fe80::2b03:a6ec:3529:b969]) by VI1P190MB0317.EURP190.PROD.OUTLOOK.COM ([fe80::2b03:a6ec:3529:b969%5]) with mapi id 15.20.5746.028; Tue, 25 Oct 2022 10:18:10 +0000 From: Vadym Kochan To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Elad Nachman , Vadym Kochan , Chris Packham Subject: [PATCH v4 2/2] arm64: dts: marvell: cp11x: Fix nand_controller node name according to YAML Date: Tue, 25 Oct 2022 13:17:11 +0300 Message-Id: <20221025101713.11893-3-vadym.kochan@plvision.eu> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221025101713.11893-1-vadym.kochan@plvision.eu> References: <20221025101713.11893-1-vadym.kochan@plvision.eu> X-ClientProxiedBy: FR3P281CA0146.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:95::18) To VI1P190MB0317.EURP190.PROD.OUTLOOK.COM (2603:10a6:802:38::26) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VI1P190MB0317:EE_|VI1P190MB0733:EE_ X-MS-Office365-Filtering-Correlation-Id: ff4f4210-9d81-4f98-2425-08dab672376f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: UE04Ee4EwfeK34nJ6U+15D7VMf6WjDmBv2dmXf26UrNL/PVLVaqH1F+rA4KwVpTRP3fhjyJAwk0j8ziRLpLI3IiZbl8op5e9aAVOGpUoiuHQA/jgFBUgx4nE7eZm9I6C0qcGt0CjdXI4Gl0+jMtdLPQp2yMCOk5636pqskezviwpU+M7LEJqWOMfgdDpkcGByn40nv7rljcHJD9yx932tfBl3DvIgbGv01XKDPE3rK7pbJWKuZ4A7fbb5DKu3uyKO5szy5PLGsL7dCjn3m5pVQmThKSReoyfrvSRHS6HzZ9Dih/oOD1bO2ILi7qLNs5WQ4gzfN4RoIMWD4hZM827K4hXio693gxyvoH/5fMVOaZ6Nkt45sDoMILrelM3g4pEnskav1GMaHznUJ0d+15ZOphWaeq19t2uXdeYBj93LPCySXADeaePIQZoyMb+98Uo7Qt3feon79nEgd8HrAgSnN1P4mFRfzoFa33Z/6tulhIw2L6JI4E37Qw1fMlwjiaEqFZZSzGISxRJRjOIE3NoHZjTrgAFYj461lZy3juGfkjjulimsH4HH/R5m6iaGn9islNiV9RYLxynNFm6tNHv7l/ub/ihXtiF0EuXZ27Z+UEWzgzJaaYAufLM9o+aaM0jaR/sIIT5DjCr3pm0/7VI9P2S+5sjWLMjeWwg9WAEha+WiD46vD9IGS3kEA9PuekKsaXjns9Pn2HJlVrLm6kF2GcqUuwRQ4k+S+BCSIinP0rnZIquH/qa/GFPPcqaaxjyxGq3z/OaOkngkNQyLi3k3g== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VI1P190MB0317.EURP190.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230022)(4636009)(376002)(366004)(34036004)(396003)(39830400003)(346002)(136003)(451199015)(86362001)(36756003)(38100700002)(38350700002)(921005)(2906002)(5660300002)(7416002)(83380400001)(44832011)(8936002)(41320700001)(4744005)(52116002)(6506007)(186003)(2616005)(1076003)(26005)(6512007)(66946007)(110136005)(54906003)(8676002)(508600001)(316002)(66556008)(66476007)(6486002)(41300700001)(4326008);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 33JYDiuZ4iJqBfzmaqkkiqyEaDmYrHqMqVuxFs6mgGJDeEQryFOfZ7tx2wQi/gGTJJCghh1P0u13xrrNqV7aiYAPI6r1ShFumpOtbhbu21AmaeOVBsix+Cd3wA+MylL7d6f//CX3b4WRum1zqYjxEDRrUoHLaZn/4uuuAi8MWNJ3z8v4BFYnTqv4ZETEU5VwGcDwCKXb1VMsFEJ5ttm90gxrWdBjmSCaII265t8DA46LbFRnqAS2IEHQNKzFYVebceqCQUqEqOnfRmX9pJyNja+qf828DrfSlvHzUvi++vToKHieturnNJWOikmZiy2PnKw2aWVy0owjpcaugH6iM7M99jURdZNNhsbbL+ombp4RTi2RBnLxo4jNad6aAcISfpz+s1Wj3MNLbeRzxCsQdEoI5Yt418Y3W00YrjYUHycGe14W09/OPGW8n0exwVxs3m85sO8G79NCiyTySZ08+O/CX+GFW1pY8mIWAP+OIdcMhngc9/6zQMK/DvpwoEF33OU8kpvgGhsi4aEMu/vbtzhCPT+T/87N5OxKbrwGqxcypi45XYi/WVZc1zvkmwZDK3V3SNTkMlvJo5M0M6ijEWKTDLK3cBWnKg03jRe3qNjogIrH9ITy35CfOSB72ivruR8PT096ZtjrhAQeCo5TCkZG7etpH0kXCOAypOSLh9A2A5ZdYesBsKc0HlYXtcPOkNJY29+DwlS/Q/5BE0r016uJ4E4OB9xYSSHE/ZI3qbMCFPRTs1dWZneBIWkcyYYda9eM/aHtZ+wWyRAeBgGo+pmoAcnd8ToMZmI2nn1UhlInANOuSFv7iLLE/6wXM2cyVIRpi7Iggg179NvTqWk8qENgZiSVWKjxth+3qIk/qdE3qF8AVgsXvCpccwcGTGNz0lCd8xOxUT/gpGUVNcxAj3O0V+7bX+ne784IrNlboNgC1SLJ27ChPkLJUnO9uURuJMhASR72jnGWxf7551ASfk+wR+LmJgtMenC5w1N3PP2OMFFnclb+l68JvI7AmgfAL9t+xOrtUWPnYq0PK27UzWk1TUxeNpqFMde05/2Aqv+aRqIc5WcaI0IksDaJnpbzGpkz852KN+7LFEA1rEsguGLFmudE4ATsimv1nWEa5Trz54b9fce6ChC+yYcHD4YIlD9+7vJzZez5WePuH3WfgWFrH/Jx22JT7U2RBZ8qNyZxLbLirg+iOhjsZGebvz7be60B4/XyQ+tuySgTmI8ZimZdPmXTH2v8k8UlZuaSQ6dno3TpxkAn2j7kTOuxy0robaMd+iR2+csOczU+6eD2agSPudFSrGrFXwFd3qumihELs83wYFxB6sTzm3E3jB4n5Dh0PCMwCl7U1d0wt1HgUqCXrbAOTD1tMSyUUWTF9m9l8Fu4cbqrnpbBcQkX5ysflHqxQf/rE91hLKsMkUBg1fhu0JBUMJCl77XoGZkFbCmAcdMxGIoxNJ7sJSZMo9Kk/SZCCTxeTddUbBAao47R7q+w5cu9iCchSIZhXIMzRGc/gXkUMtPeKDqSzQ/G3C8Z6CdpU1HJnmaIafSeas48fdPH9tw5lVeWBruhosanX1i5nYVzXtYLQ514Lqrp8+uYo9AujQP/c6ysyBt0NivayQ== X-OriginatorOrg: plvision.eu X-MS-Exchange-CrossTenant-Network-Message-Id: ff4f4210-9d81-4f98-2425-08dab672376f X-MS-Exchange-CrossTenant-AuthSource: VI1P190MB0317.EURP190.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2022 10:18:10.0622 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 03707b74-30f3-46b6-a0e0-ff0a7438c9c4 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: DEkk48Y+XOGgAkKNz7dlE2Yic9z6eVojvsfNF9cid9cox9hlEGAVSx3QjtprMyFP+uELIKSZdvoZEMVMe6aXGlKhyr9auBg/Uo8Jkx0KhIw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1P190MB0733 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221025_031814_270791_06B96ABD X-CRM114-Status: GOOD ( 11.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Marvell NAND controller has now YAML to validate it's DT bindings, so change the node name of cp11x DTSI as it is required by nand-controller.yaml Signed-off-by: Vadym Kochan --- arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi index 7d0043824f2a..982b180b33e6 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi @@ -468,7 +468,7 @@ status = "disabled"; }; - CP11X_LABEL(nand_controller): nand@720000 { + CP11X_LABEL(nand_controller): nand-controller@720000 { /* * Due to the limitation of the pins available * this controller is only usable on the CPM