From patchwork Tue Oct 25 19:15:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019791 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23522C38A2D for ; Tue, 25 Oct 2022 19:15:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231937AbiJYTPn (ORCPT ); Tue, 25 Oct 2022 15:15:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232651AbiJYTPg (ORCPT ); Tue, 25 Oct 2022 15:15:36 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84D367F0B3; Tue, 25 Oct 2022 12:15:35 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJJM112020; Tue, 25 Oct 2022 14:15:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725319; bh=T7L44GLh1Vpy3fYEU2edI0jDVnA8qvZMddOrW4XRkQw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=O3OVR6Gugrx01MazxWrZvcLX9pdJ+1Yy4WBWkeDg845n4p40h0aEfPqhu/Lgx7ZqQ Sm4To9gPFrLBeHMuRcELuv1Iuk92p23Fu2PynOz6HzhvKstUf7BymfWV1XIUtq97qY g1f43i+3wOpDwF5uCwbz3hLXYEFwvEyYnPPxAsVs= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFJex058279 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:19 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJKQ018057; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 01/11] thermal: k3_j72xx_bandgap: simplify k3_thermal_get_temp() function Date: Tue, 25 Oct 2022 14:15:05 -0500 Message-ID: <20221025191515.9151-2-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1018; h=from:subject; bh=g+YxgOMLXP3w1bq6vyZoRrUwJBsI9oCmt8mLlbeowlY=; b=owNCWmg5MUFZJlNZ00DIPQAAbv///v/Pf39sW92/r9/veX1/t3O+zxeur+Z7S5v/81/wjmawARsY yHqBkDQaaGQDQA0eoMgGRoAaANAHqAAyAAAPUGgMgaADQ0PFNpHqeUep6ahwj1AaAADQGgGgNGgwjQ DIDQDQyDI0NPJAyGjJo0aaHqZHkQNDIYmh6hoBodNMEYEDTJppoBkAGmEyGRo0GTEYg0HpNBkyYgyD BAGg0BkyAAyAAA0BQrwSmeh/OzZB42vG1khoUrQtFYPX021+N8e4kPBAfPYC+sWJSuAKhSpnYIm78h 4KvYfkJsGC+BTy93/IwJsnkQCq2yaGyUXR+JJPOdy4QC3wZ/qGYFsrjYCQ4CogljFI5MaqnGh+voQA eJUILXtWFss7btkLWfbEGpk3Z46RE89XNKpWaiU0INIb/LjEqQdue4RWx/CqarJqHaLgiqO8dNwxF6 tnt4qR/lhXTLwwAdXW9I0JHXjUZ+HlPM7WbzIZCGirV0cGUKHqfyQTk4x2c0x/Wc8KyY23pIV/tXND APVSWb3/bUwaitRcxSlESFODvwDXF4rI3WuvMCMM4HIHHOrXWDvl7Q8f4loVBUolQA5JBzFoQCi1xP MMVsEkWDCdSo6swAtGhLMn0ASBsC2NCVnqpfGmvG+Cq1Th+I1IAG2Olhn+LuSKcKEhpoGQeg== X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The k3_thermal_get_temp() function can be simplified to return only the result of k3_bgp_read_temp() without needing the 'ret' variable Signed-off-by: Bryan Brattlof --- drivers/thermal/k3_j72xx_bandgap.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/thermal/k3_j72xx_bandgap.c b/drivers/thermal/k3_j72xx_bandgap.c index c073b1023bbe7..a9f99a190cb61 100644 --- a/drivers/thermal/k3_j72xx_bandgap.c +++ b/drivers/thermal/k3_j72xx_bandgap.c @@ -249,14 +249,7 @@ static inline int k3_bgp_read_temp(struct k3_thermal_data *devdata, /* Get temperature callback function for thermal zone */ static int k3_thermal_get_temp(struct thermal_zone_device *tz, int *temp) { - struct k3_thermal_data *data = tz->devdata; - int ret = 0; - - ret = k3_bgp_read_temp(data, temp); - if (ret) - return ret; - - return ret; + return k3_bgp_read_temp(tz->devdata, temp); } static const struct thermal_zone_device_ops k3_of_thermal_ops = { From patchwork Tue Oct 25 19:15:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019790 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB893FA3742 for ; Tue, 25 Oct 2022 19:15:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232183AbiJYTPl (ORCPT ); Tue, 25 Oct 2022 15:15:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57760 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232621AbiJYTPf (ORCPT ); Tue, 25 Oct 2022 15:15:35 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 944597F13B; Tue, 25 Oct 2022 12:15:34 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJrZ114081; Tue, 25 Oct 2022 14:15:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725319; bh=QYyMABB6AHijjyJOhUhJ54RA/v1ktwtBQZkA4ygi9Aw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=K9BoHj8QXa/HeNJdh12vspKOhzzEEqdGWZD1TKRB1gowftRa+VL2J48B3N/83Jw2w 27oxd9ZN1u6PMWMmLqxI9282GkbHbxNiWdMyJs5+R+yUU1zjeFAw2kRV+cBZ4u0Bwb WK1X8seN1xsPVv3sv7Ay6Nxqz3t6Qex+cfjYblTE= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFJf0058279 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:19 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJF3038866; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 02/11] thermal: k3_j72xx_bandgap: use bool for i2128 erratum flag Date: Tue, 25 Oct 2022 14:15:06 -0500 Message-ID: <20221025191515.9151-3-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1775; h=from:subject; bh=plpAnJmVQap8rt0k9uux1w9KO8wCDCu2HZBNeax8/MM=; b=owNCWmg5MUFZJlNZmD5tcAAAbH////ffH/Xpvu/en193Xl3W3Xd/7c9Z/u8/d1ub9/f60fwwARsw IepoA0ZDQABpk0AADRkGgDQAGgaAADQMgNAZAAMTTQNBtJiZGmA009UOmjQNNAaaZNGI0yZGgGjIYT TQyNNGgAAyG1NNBkAAAGjQNNGQyaGJoyA2kANB00ZNMIAMjQaADIwQxDTRoGQ0ZDRpoYAmQA0NGjEA BoGmgyAZDJkAADAQJmHOHBAS98YOIdxUPlwKohMhPg2Z9qBdDf0fFgOwAiAuVzu5IfnJNMrZqN8oDA Js5+tUA+suMLzF6GFPRSc2fOoldg4YPqwQGZAuDaVmsuNCqm9fnVBEAi6wsU+9Y+HxHjgMofkFlKre HUUjxPGIFWo3570L8BDGW7rwYAD4p+hSWw9JL+RYTcJikYDrvjxaJaDiEmhMhxp+WU8JxGfnZeux1A z0YsBtwuK9wiT6JMmpjTiKVATBjOwaG7bGmnqr3hxlalSuJhT/I6E6tXOFWAWTl1p0U2LCJ1Jyi9gB BpI88JyhzCsaNNFJDF29U23FYsR7lNHFhW3WHxC8OYZnLCDHsV6jEXregcOlhGDK/qs3wECfWjhNsh CyIwDdsgMVLNEQtSTUPaC1USzqWWecTvsgD3ourn0k7QED3lRVQRQiACYAP8XckU4UJCYPm1wA X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Some of TI's J721E's require a software trimming method to report temperatures accurately. Currently we are using a few different data types to indicate when this device should apply the erratum. Change the 'workaround_needed' variable's data type to a bool to align with how we are using this variable currently. Signed-off-by: Bryan Brattlof --- drivers/thermal/k3_j72xx_bandgap.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/thermal/k3_j72xx_bandgap.c b/drivers/thermal/k3_j72xx_bandgap.c index a9f99a190cb61..b9d20026771a5 100644 --- a/drivers/thermal/k3_j72xx_bandgap.c +++ b/drivers/thermal/k3_j72xx_bandgap.c @@ -340,7 +340,7 @@ static void print_look_up_table(struct device *dev, int *ref_table) } struct k3_j72xx_bandgap_data { - unsigned int has_errata_i2128; + const bool has_errata_i2128; }; static int k3_j72xx_bandgap_probe(struct platform_device *pdev) @@ -351,7 +351,7 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct k3_j72xx_bandgap *bgp; struct k3_thermal_data *data; - int workaround_needed = 0; + bool workaround_needed = false; const struct k3_j72xx_bandgap_data *driver_data; struct thermal_zone_device *ti_thermal; int *ref_table; @@ -522,11 +522,11 @@ static int k3_j72xx_bandgap_remove(struct platform_device *pdev) } static const struct k3_j72xx_bandgap_data k3_j72xx_bandgap_j721e_data = { - .has_errata_i2128 = 1, + .has_errata_i2128 = true, }; static const struct k3_j72xx_bandgap_data k3_j72xx_bandgap_j7200_data = { - .has_errata_i2128 = 0, + .has_errata_i2128 = false, }; static const struct of_device_id of_k3_j72xx_bandgap_match[] = { From patchwork Tue Oct 25 19:15:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019793 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 907D6C38A2D for ; Tue, 25 Oct 2022 19:16:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232896AbiJYTQu (ORCPT ); Tue, 25 Oct 2022 15:16:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231628AbiJYTQb (ORCPT ); Tue, 25 Oct 2022 15:16:31 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36CBDDED35; Tue, 25 Oct 2022 12:15:54 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJuI074676; Tue, 25 Oct 2022 14:15:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725319; bh=3eIMtKaot4dMOLF8vrcRprS13eBVxZaNUsR4vZmwHYg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=gJ8CiB/9R6L5iypIFmL/LAeeXo6JakUCnO5BOBPVtysvQ81jLjZhe4c3ZDqyPvGKm KXvR2Do5Wil9HtPC1c6DOKp4eUv65g1AtK0JNlssd05KrpKq/35Q4iVtNeA0bhxD3b dBBzTQP1HZ8ufp1fD/LRfJy4BPYscN6u9ZDIUlJI= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFJWr065987 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:19 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJEv007000; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 03/11] thermal: k3_j72xx_bandgap: remove fuse_base from structure Date: Tue, 25 Oct 2022 14:15:07 -0500 Message-ID: <20221025191515.9151-4-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4006; h=from:subject; bh=BJVvhDze1728PDHb2aAD1qwDBK4lUra5IUOJll7k50E=; b=owNCWmg5MUFZJlNZP6G8OQAAa3///7ftru1pfpff411f39q31n2m/v9kbX5/6mh5vr9xn98wARsz WQ9QeoaeUPUA0aA0AAaeoA9QNAZNAGgAxAAADQAAGh6h6mQyaPU0NPTU09TeqeoZQMTRpoNNNANAGQ MjQbUNDQxABhDQGIGajQabU9CGjJk0aYmQDIGTQNBhA7SbSDQ0MgGgyaAeoMjJiGhhGQGg0AMjTR6j TINNAAGI00A00eoBp+qAyYQ0Bh75JMRxigZOJ2HkcpEqJqH6vnJ0pYnIlBxnsHL7RAQYaHgMZQHzcE AQtMvGZAr/17QVmNOHNAsGDZtJHrWp2uu8fYQDk87UxYZNZPC8yuEUXvUEAEfiA7+rEqUM+L05CNIv LVUFzRn83VbQdf5LfYSTKm+LYdiPoa8BjDQfMrynqNl6qFN5ZSoBc1QjYHN/FOV2tBCkkoh4jKqB89 q5ZohFxKYVYrJuPAkPfSjPcMy5ATiBO8pSHC9aOxUrZj1NUqgFXfY28lhaG9wms79Itj5dWgYnAYQO kjy9VWQEWz/VGCJXALg9398z9SzmCoEgD1MXRjYFDAcjwAIMypeGzi39fix8oF13ooRWciINgLZ4k2 Y7Mgmq83nAa2PTDHHMf5c3BaDT6oMG8oHQOK6gCPmgI6Q+EPSv+ynYjEt8s/xdyRThQkD+hvDk X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org 'fuse_base' is only needed during the initial probe function to provide a software trimming method for some devices effected by TI's i2128 erratum. Not all devices that use this hardware device will need to map this eFuse region. Remove fuse_base from the main k3_j72xx_bandgap structure Signed-off-by: Bryan Brattlof --- drivers/thermal/k3_j72xx_bandgap.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/drivers/thermal/k3_j72xx_bandgap.c b/drivers/thermal/k3_j72xx_bandgap.c index b9d20026771a5..71bf65e6afaed 100644 --- a/drivers/thermal/k3_j72xx_bandgap.c +++ b/drivers/thermal/k3_j72xx_bandgap.c @@ -177,7 +177,6 @@ struct k3_j72xx_bandgap { struct device *dev; void __iomem *base; void __iomem *cfg2_base; - void __iomem *fuse_base; struct k3_thermal_data *ts_data[K3_VTM_MAX_NUM_TS]; }; @@ -276,7 +275,7 @@ static int k3_j72xx_bandgap_temp_to_adc_code(int temp) } static void get_efuse_values(int id, struct k3_thermal_data *data, int *err, - struct k3_j72xx_bandgap *bgp) + void __iomem *fuse_base) { int i, tmp, pow; int ct_offsets[5][K3_VTM_CORRECTION_TEMP_CNT] = { @@ -298,16 +297,16 @@ static void get_efuse_values(int id, struct k3_thermal_data *data, int *err, /* Extract the offset value using bit-mask */ if (ct_offsets[id][i] == -1 && i == 1) { /* 25C offset Case of Sensor 2 split between 2 regs */ - tmp = (readl(bgp->fuse_base + 0x8) & 0xE0000000) >> (29); - tmp |= ((readl(bgp->fuse_base + 0xC) & 0x1F) << 3); + tmp = (readl(fuse_base + 0x8) & 0xE0000000) >> (29); + tmp |= ((readl(fuse_base + 0xC) & 0x1F) << 3); pow = tmp & 0x80; } else if (ct_offsets[id][i] == -1 && i == 2) { /* 125C Case of Sensor 3 split between 2 regs */ - tmp = (readl(bgp->fuse_base + 0x4) & 0xF8000000) >> (27); - tmp |= ((readl(bgp->fuse_base + 0x8) & 0xF) << 5); + tmp = (readl(fuse_base + 0x4) & 0xF8000000) >> (27); + tmp |= ((readl(fuse_base + 0x8) & 0xF) << 5); pow = tmp & 0x100; } else { - tmp = readl(bgp->fuse_base + ct_offsets[id][i]); + tmp = readl(fuse_base + ct_offsets[id][i]); tmp &= ct_bm[id][i]; tmp = tmp >> __ffs(ct_bm[id][i]); @@ -356,6 +355,7 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) struct thermal_zone_device *ti_thermal; int *ref_table; struct err_values err_vals; + void __iomem *fuse_base; const s64 golden_factors[] = { -490019999999999936, @@ -387,9 +387,9 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) return PTR_ERR(bgp->cfg2_base); res = platform_get_resource(pdev, IORESOURCE_MEM, 2); - bgp->fuse_base = devm_ioremap_resource(dev, res); - if (IS_ERR(bgp->fuse_base)) - return PTR_ERR(bgp->fuse_base); + fuse_base = devm_ioremap_resource(dev, res); + if (IS_ERR(fuse_base)) + return PTR_ERR(fuse_base); driver_data = of_device_get_match_data(dev); if (driver_data) @@ -428,7 +428,7 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) } /* Workaround not needed if bit30/bit31 is set even for J721e */ - if (workaround_needed && (readl(bgp->fuse_base + 0x0) & 0xc0000000) == 0xc0000000) + if (workaround_needed && (readl(fuse_base + 0x0) & 0xc0000000) == 0xc0000000) workaround_needed = false; dev_dbg(bgp->dev, "Work around %sneeded\n", @@ -452,7 +452,7 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) err_vals.refs[1] = PLUS30CREF; err_vals.refs[2] = PLUS125CREF; err_vals.refs[3] = PLUS150CREF; - get_efuse_values(id, &data[id], err_vals.errs, bgp); + get_efuse_values(id, &data[id], err_vals.errs, fuse_base); } if (id == 0 && workaround_needed) @@ -501,6 +501,9 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) */ kfree(ref_table); + if (workaround_needed) + devm_iounmap(dev, fuse_base); + return 0; err_free_ref_table: From patchwork Tue Oct 25 19:15:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019785 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 024A7FA3743 for ; Tue, 25 Oct 2022 19:15:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232573AbiJYTPf (ORCPT ); Tue, 25 Oct 2022 15:15:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57710 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232332AbiJYTPd (ORCPT ); Tue, 25 Oct 2022 15:15:33 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5DB47E018; Tue, 25 Oct 2022 12:15:32 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFKTV074682; Tue, 25 Oct 2022 14:15:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725320; bh=GDY2m1FVwVyz7kvfzVAQWW25+3Z4zZqO277aPfxWmww=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=bBabcN/CRBsygW1vkQa0w98aZtOwLtU/X5TsRxTQxAsihgJd9YExyvym+kc0niWwL xMHUgvWKozkL0TixRLBFv3lZD8zCjLzeQk4JEdIY7xTgGjUB7NHumHQzxKfSE4J1Ey MjEneHatIvJ+bW0nlf9+3M6ycorgsK25Oe8K55YM= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFK9Y058285 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:20 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJge056994; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 04/11] thermal: k3_j72xx_bandgap: map fuse_base only for erratum workaround Date: Tue, 25 Oct 2022 14:15:08 -0500 Message-ID: <20221025191515.9151-5-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2771; h=from:subject; bh=3VK0DERXGogo+qPJUQ5h+7vzk2QFXgKHa6rxgwtgdIs=; b=owNCWmg5MUFZJlNZ6Nc6iQAAa/////f7/3d8+/OyG7r9f5vvxznjfk/Mvv4t8T+dl9fb3+6wARsW DtRpo0ANAyADTTQaBk0yGgAZGgAGjQ0DTQyBk0NAA0aAwgMjQaDI0G9NJDoDR6mjQDTTQAPUA000AM mh6gAeoaA0D1DINMmQeiHqeoeoDamRoPUDQ0GgGTRoGhDI9TQ2pkyBoNGg2kAGmgyHqNAyaZAAA00N DQDCANAaNND1MgBkxMmjRoyGmQwABYCgyRiQCIB64UiEXChMVW2+fXIEakCUVAMxQecoPn2CJwFGGj IfT/2s63dGyAJMvVtyrBLWeA8bOkMAnub0rXkJGwblmtN4polTJkvwMKxWLlQFHk0XZV5ZbOATj8S6 3FKYhI+X1SgEXzIZbbCHv4M4clfTdDi6pm0R7Jap1nkbu0HA8o7n2SqEE+bSlekmarDYfcDIlJAbvX /QlgjZuncNNiITHz2YT07xjtBirwXPI4B4g8syrC1KhPCzyLA53n6R3RnYz6FeNcd8f2kAxGlbwIdk Al8VehXE3TcH+FNiRKGYI4/VYsu/2D8GGuP6v23keI6fFJ+nm1JrM2XdNv3KgC5FFVjjYMOebIxIr7 nRNiI7DAUkJHB03AonRBF6xw3RfhVA7k2XPNgA6fAW4An1NoMLyLgjCZ6wZ3gUDSnSf4u5IpwoSHRr nUSA X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Some of TI's J721E SoCs require a software trimming procedure for the temperature monitors to function properly. To determine if a particular J721E is not affected by this erratum, both bits in the WKUP_SPARE_FUSE0 region must be set. Other SoCs, not affected by this erratum, will not need this region. Map the 'fuse_base' region only when the erratum fix is needed. Signed-off-by: Bryan Brattlof --- drivers/thermal/k3_j72xx_bandgap.c | 37 ++++++++++++++++++------------ 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/drivers/thermal/k3_j72xx_bandgap.c b/drivers/thermal/k3_j72xx_bandgap.c index 71bf65e6afaed..031ea1091909a 100644 --- a/drivers/thermal/k3_j72xx_bandgap.c +++ b/drivers/thermal/k3_j72xx_bandgap.c @@ -386,15 +386,32 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) if (IS_ERR(bgp->cfg2_base)) return PTR_ERR(bgp->cfg2_base); - res = platform_get_resource(pdev, IORESOURCE_MEM, 2); - fuse_base = devm_ioremap_resource(dev, res); - if (IS_ERR(fuse_base)) - return PTR_ERR(fuse_base); - driver_data = of_device_get_match_data(dev); if (driver_data) workaround_needed = driver_data->has_errata_i2128; + /* + * Some of TI's J721E SoCs require a software trimming procedure + * for the temperature monitors to function properly. To determine + * if this particular SoC is NOT affected, both bits in the + * WKUP_SPARE_FUSE0[31:30] will be set (0xC0000000) indicating + * when software trimming should NOT be applied. + * + * https://www.ti.com/lit/er/sprz455c/sprz455c.pdf + */ + if (workaround_needed) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 2); + fuse_base = devm_ioremap_resource(dev, res); + if (IS_ERR(fuse_base)) + return PTR_ERR(fuse_base); + + if ((readl(fuse_base) & 0xc0000000) == 0xc0000000) + workaround_needed = false; + } + + dev_dbg(bgp->dev, "Work around %sneeded\n", + workaround_needed ? "" : "not "); + pm_runtime_enable(dev); ret = pm_runtime_get_sync(dev); if (ret < 0) { @@ -427,13 +444,6 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) goto err_free_ref_table; } - /* Workaround not needed if bit30/bit31 is set even for J721e */ - if (workaround_needed && (readl(fuse_base + 0x0) & 0xc0000000) == 0xc0000000) - workaround_needed = false; - - dev_dbg(bgp->dev, "Work around %sneeded\n", - workaround_needed ? "" : "not "); - if (!workaround_needed) init_table(5, ref_table, golden_factors); else @@ -501,9 +511,6 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) */ kfree(ref_table); - if (workaround_needed) - devm_iounmap(dev, fuse_base); - return 0; err_free_ref_table: From patchwork Tue Oct 25 19:15:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019782 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A240C38A2D for ; Tue, 25 Oct 2022 19:15:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232000AbiJYTPc (ORCPT ); Tue, 25 Oct 2022 15:15:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229952AbiJYTPb (ORCPT ); Tue, 25 Oct 2022 15:15:31 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3715D7B596; Tue, 25 Oct 2022 12:15:30 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJ7b114083; Tue, 25 Oct 2022 14:15:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725319; bh=ZL+YBJQnQSuukUMqpWoTNGCHm/b9bnX/oYmoOE+d/FI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=OKckoL/GfszSOf8nC78uXgGuGM54L9GiYSrrW6i9/k5QJQsmxC1e7lOxR4gN7xN2u xVtSxCra31wWCVz/YFvHj18BVZF2/dw2MnPC+Wa2jW+tFH9o0WdUF2s3BihTFmP9kQ lr3eVbz0IqppJcBkX7mp9qCx3TnTPEiJCLa141qY= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFJDd065990 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:19 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJbX038872; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 05/11] dt-bindings: thermal: k3-j72xx: elaborate on binding description Date: Tue, 25 Oct 2022 14:15:09 -0500 Message-ID: <20221025191515.9151-6-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1844; h=from:subject; bh=X0Gh04bGx605RJeJrzQxigJ9CmhRVnqOURTu0JyzGYk=; b=owNCWmg5MUFZJlNZOWG3gQAAcn///77Pf////l/XLb/v/tvruz978P3uvvbz8XsZvZJ+j/SwARsr B2k00aDQDQNDQAAGQZGQDQDQaAANDEBkwIGgAAAAeoAAbSDTRmp6m2qHQAaAaABoxGmg0BoaDIaA9I ZMgADQNANNG1NADNQDQG0JkDRoeKBkAZBoZQep6mTINGgDQyBiA00DAmhoANBiNABkZBkAyDIaGjQG QBkANNA9QNGmjIAg775YQYWGC/iiIwpkEAttmJGCwEMBul41oBi14bzmVinKERBshcHg3a31TuCY5M TVKNjWOYqa/w5Y5ulEDTUbuSuEHRel89F1Vl8IoUWPb0inrrCUgmViG/X25ACoHtm/scRZo5frcWVA DgmCpoGQSJcw2/pNT37GINJi7TJUnGkIYDzJ2ayfE51S5x9IFkxcgeD2XHhK5xlpSM3RdaxExWh2sf +uuMQvROfQ45LEXTA24LCTwvfZlxAOZhuWjE9eJpOLgshOPaowmYvP96WXsHEESZAJ+rLdCshlJIoM G1aCo4bvPVv1iEuscLwKCZ7Bq/U/kvDPImYi8RDmIMkiyJjkYwW+yPgHNpUkitLR4rBnqlEbY4nJKZ tCQX5jBIkZb06dYxukxwhg9zLDdRmkm1oHPYAMy/gRaEBAgKgMQrSmSDg/xdyRThQkDlht4EA= X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Elaborate on the function of this device node as well as some of the properties this node uses. Signed-off-by: Bryan Brattlof Acked-by: Krzysztof Kozlowski --- .../bindings/thermal/ti,j72xx-thermal.yaml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml index c74f124ebfc00..3bb870a26872f 100644 --- a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml @@ -9,6 +9,19 @@ title: Texas Instruments J72XX VTM (DTS) binding maintainers: - Keerthy +description: | + The TI K3 family of SoCs typically have a Voltage & Thermal + Management (VTM) device to control up to 8 temperature diode + sensors to measure silicon junction temperatures from different + hotspots of the chip as well as provide temperature, interrupt + and alerting information. + + The following polynomial equation can then be used to convert + value returned by this device into a temperature in Celsius + + Temp(C) = (-9.2627e-12) * x^4 + (6.0373e-08) * x^3 + \ + (-1.7058e-04) * x^2 + (3.2512e-01) * x + (-4.9003e+01) + properties: compatible: enum: @@ -19,7 +32,11 @@ properties: items: - description: VTM cfg1 register space - description: VTM cfg2 register space - - description: VTM efuse register space + - description: | + A software trimming method must be applied to some Jacinto + devices to function properly. This eFuse region provides + the information needed for these SoCs to report + temperatures accurately. power-domains: maxItems: 1 From patchwork Tue Oct 25 19:15:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019787 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AAAF1FA3740 for ; Tue, 25 Oct 2022 19:15:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232723AbiJYTPi (ORCPT ); Tue, 25 Oct 2022 15:15:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232460AbiJYTPd (ORCPT ); Tue, 25 Oct 2022 15:15:33 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B653E7F0B3; Tue, 25 Oct 2022 12:15:32 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFKxl074680; Tue, 25 Oct 2022 14:15:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725320; bh=kJg2w2YyvaAxJz6O0g5hLPC43gY8IVp6CZbO0QPsoSg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pZzv909EivZAOWAJDa+qpC3J1LTxdWQ/vamvOL1iuxQVvsmA2uLPaHZEJdveOMXbD aeoPOmr1sm+YpP1zqiBMzjCz95RBiYByIzlTyPXZtcsv/KQ9t17W7CDqYptwwGlddC OoVqPrnJBiK++fOdUHThRSTcECy5jRVTGH4bDXiE= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFJBk065993 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:20 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJQD056997; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 06/11] dt-bindings: thermal: k3-j72xx: conditionally require efuse reg range Date: Tue, 25 Oct 2022 14:15:10 -0500 Message-ID: <20221025191515.9151-7-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1447; h=from:subject; bh=9FYBQiKpTMnTu19yT0LGLoV8d9yOv5BwuV30CxJBgHY=; b=owNCWmg5MUFZJlNZpo8qqwAAbH///v9/l/Pv+2/3R/n1n62/vfz/5Vd9be7/X/uZ/1nF/1cwARs1 aOTQ0BoANDQaBoAA09ID1DQAaAA0AADQAMgAAM1DIAANonqaH6oDQ8UeodAaAaADQaGgaAB6gGj0ga A0bUA0AANqAAAHpAA0B6gxqGg9QAxND1A9TNDvVNPUHqB6g0aaA0GgNqNA0BpkAANADTQAANAZDTQN GjEAAGgA0ABoGQ/UmCCbLVQD7R9EKgm2wU6SUeLjxOoz5BNO9q5oqpGNTOBIhDcqsCDJ7ywR/Ij5gg 5GQIIM+m5NIz7sDSUdweBGsJSH7xLNdPUJXORinPI1wK83ROoeiPCHDe8MsImPcJKjHRFf1Xxq/02L uuTYKKvQLCBku0bk9Zb2bDJ4fmoowlm8WvAMpNkCOY3IuJy4Gj1tcOpABdKK3nvXqdVajf7rmC2eeZ k2rAa6LsIOEjigDNkQbs5cq8QM5CVx0lT9xCJttQYKbxgIvqHQh0teNEhKb+FLrX2VCvT4ST6ye00U xE/PSOA+gmif48r6Rh9unBhCjHGdg/BAntYNW9Bsj6sPL1W5Kg1JXzmwolgnsOx/BBdcJogsmhgYtm VaMGLyF9gAspmQrQqjMQRo9xO//A/9+o2CsgdMhuM/CfV7mBGUV4i+gTp/i7kinChIU0eVVYA= X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Only some of TI's J721E SoCs will need a eFuse register range mapped to determine if they're affected by TI's i2128 erratum. All other SoC will not need this eFuse range to function properly Update the bindings for the k3_j72xx_bandgap thermal driver so other devices will only need two register ranges Signed-off-by: Bryan Brattlof Reviewed-by: Krzysztof Kozlowski --- .../bindings/thermal/ti,j72xx-thermal.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml index 3bb870a26872f..0509c9cec224d 100644 --- a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml @@ -37,6 +37,7 @@ properties: devices to function properly. This eFuse region provides the information needed for these SoCs to report temperatures accurately. + minItems: 2 power-domains: maxItems: 1 @@ -44,6 +45,21 @@ properties: "#thermal-sensor-cells": const: 1 +allOf: + - if: + properties: + compatible: + contains: + const: ti,j721e-vtm + then: + properties: + reg: + minItems: 3 + else: + properties: + reg: + maxItems: 2 + required: - compatible - reg From patchwork Tue Oct 25 19:15:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019788 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 454D0FA373E for ; Tue, 25 Oct 2022 19:15:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231751AbiJYTPj (ORCPT ); Tue, 25 Oct 2022 15:15:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57738 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232614AbiJYTPf (ORCPT ); Tue, 25 Oct 2022 15:15:35 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B6797F11A; Tue, 25 Oct 2022 12:15:34 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFKOK114089; Tue, 25 Oct 2022 14:15:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725320; bh=Le+bXLRPi2PorGOqYWdZ7TXZI7dPM2vRnsQn7M/5zyo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jiTVp1Et2ENCHcp1WpQgK8PNUPLqTQS6URzLK4rce0jU/l5EpeHJyTSDAnM6bYd4j SEzUspbYpMZjtWzqiyYIdIlTA5YHBSj65ph3rC4Tv0wmaU8TwYFfbGl8Qpyq8Kiwij OLDewvvrnbnfaaABNabJJjM48zzC19yQVFp3eYUQ= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFKh9027909 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:20 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJGB018066; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 07/11] arm64: dts: ti: k3-am64-main: add VTM node Date: Tue, 25 Oct 2022 14:15:11 -0500 Message-ID: <20221025191515.9151-8-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3215; h=from:subject; bh=xlJl/GZ0bAid8uJVN8dSqjl+Si5t64KdmpX6Ljuu5Vs=; b=owNCWmg5MUFZJlNZOUJDugAAYv///v/5jvtvvqXe377xfuhP4b+23q7uH+tT/O3/7zH//v8wARpq hyaA0BoyGgBoA0NNNNGg0AaNNGgGhoGhoaNBk00AAA0HqGRo9IGmnppMjRkZPU8ohoGTTTBGTQyBpk BoaBgTQZGTIDQAZBk0NDIGQBoBpkBkGQxGQxNHqNGmgByZNGjI0yGCNAaAGmJiZGQaAaAAADJpkYmA TJhAGQ9QaNMQaAAGgAGQqUM3EWOSJD5AEMLNCvCOK0raYDgIouZGsRQ8MC7HwLUhM6R3yeMAS2CZk/ d9Y80hcTrWH60GRQ0RYJCJ4golRJQ5WkxQrUQ/ohsZKbamGCI3dpxx1GrDdBNDyz2tvhWIXCcUGOzZ MLcgA2UARczNLnVXgFiLdMs4Rw2KVdrl/cq5C5A6nQtiRnqssMDRQdHctPe1in3Ba5nBLPzB6qgt8g a6uUpUkJr4haH47t3utt+RcUbb8Y4kGkUnSkmUgW/0GtKs6kAFLgr3N8PpmwLZk1RuzX6USGPJphoA gPNKc7KXC8qR1XaSOHaMyYvkUqQHZoQjgPlgEKuEeZRI/LpPD9ewASrpuvub2tZ8CSjrCtc7JMrFe6 DSUiD2rA25IOBRizq4GnDItOMIcrgD4vLsd4ZMiKmye0EUYYyPPasfcjDa5Jj/i7kinChIHKEh3QA= X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The am64x supports a single VTM module which is located in the main domain with two associated temperature monitors located at different hot spots on the die. Signed-off-by: Bryan Brattlof --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 8 +++++ arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi | 33 +++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am64.dtsi | 4 +++ 3 files changed, 45 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index d6aa23681bbe5..a31a139127e35 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -1356,4 +1356,12 @@ elm0: ecc@25010000 { clocks = <&k3_clks 54 0>; clock-names = "fck"; }; + + vtm0: temperature-sensor@b00000 { + compatible = "ti,j7200-vtm"; + reg = <0x00 0xb00000 0x00 0x400>, + <0x00 0xb01000 0x00 0x400>; + power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi new file mode 100644 index 0000000000000..1819a6948b19d --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + main0_thermal: main0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + main0_crit: main0-crit { + temperature = <105000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main1_thermal: main1-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + main1_crit: main1-crit { + temperature = <105000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi index c858725133af4..a0170605d7b4e 100644 --- a/arch/arm64/boot/dts/ti/k3-am64.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi @@ -69,6 +69,7 @@ cbass_main: bus@f4000 { <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */ <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */ <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */ + <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */ <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */ <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */ <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */ @@ -105,6 +106,9 @@ cbass_mcu: bus@4000000 { ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */ }; }; + + #include "k3-am64-thermal.dtsi" + }; /* Now include the peripherals for each bus segments */ From patchwork Tue Oct 25 19:15:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019792 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66066FA3743 for ; Tue, 25 Oct 2022 19:15:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232332AbiJYTPo (ORCPT ); Tue, 25 Oct 2022 15:15:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232706AbiJYTPh (ORCPT ); Tue, 25 Oct 2022 15:15:37 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 94A207F24F; Tue, 25 Oct 2022 12:15:36 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFK7s112033; Tue, 25 Oct 2022 14:15:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725320; bh=YityQ/wuUXHsyeqfnkyK8ltNeRnXLIQbQj38R/cl/ME=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=r8mMcijtSRbl4ZPwW+G/l6/FJPD8mS1MIuByVqX5OGpvhebDfungSYfQMYpXyCdRt pAGTnzNaPIPsSd3GV55NmbSFX6q2iD7kSTmjvtlmPRw26HyDwT9OgxiUDot34q7UaV uMfHN8HChsbO2Q23WdoEtd0QhnXoH/Si/Zewgtic= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFKpS066003 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:20 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJND057000; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 08/11] arm64: dts: ti: k3-am62-wakeup: add VTM node Date: Tue, 25 Oct 2022 14:15:12 -0500 Message-ID: <20221025191515.9151-9-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3321; h=from:subject; bh=/6/erm8uGvFnwvcLO4BZMnh8Xxmwt3ii2KHozEpD0Qs=; b=owNCWmg5MUFZJlNZ5+cmKgAAZ3///vf/+/dz7p/3XeV7f3SvsR17ShdPm3pv1p7tvvdfv/+wARsY HZIaAAAGgA9R6g0B6gNAG1DJoAaAGgaAAAAGgAGj1AD01AaepoeU9TwodBoNA0AGjQPUNHpAHqaA0A NDQ/VB6gABppoBoDRoAaPSeo09QPUeoA9RoNDymTQByaZDTQaGmIaaaA0ZGjJkGmEaNAABkYmQwTJi AwIZMIaNNAAAaA0A0yNNAMHrT4a7aRqniCB7ZTJ9ojeKzkIhH6X8P2UQcnNS4ChrcmL5gFpFaCI42o 2nnEH0zFsXCgneELkXv+cOJBCHr0QNWSVYpglLNWVzNdji+6LHxgExQH2POsVREwfQnBfUgbE0zOwk Zgi3WXP04qmNu2AWT4ISwV6pblpKiwO2nyMcNpA3cDRHqm1k0tSj+aZyRJ07U9BlLO0Vmo1p6fLXrl EJAfRg5u1LrEfKYyeT5YciQ0wibvY9t0IIx1GSkHwjJLXLDxjpOc61A/p4TTHkY8GKeA1NA6a+WhZj cGJyjBEikiLjcRXgEeRIKIUsfzdCFCpzTglMgW/5W4x7hx7kYepI/F4HemPRgFM2BVb3GP+rkv0UAv LQ/hDYBTV4/F9XRapJ4klmszW3oDM0TUaR4XHAHC2H6iaYhgGgrQWZch/i7kinChIc/OTFQA== X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The am62x supports a single Voltage and Thermal Management (VTM) module located in the wakeup domain with two associated temperature monitors located in hot spots of the die. Signed-off-by: Bryan Brattlof --- arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi | 33 +++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 8 +++++ arch/arm64/boot/dts/ti/k3-am62.dtsi | 7 ++++- 3 files changed, 47 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi new file mode 100644 index 0000000000000..1819a6948b19d --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + main0_thermal: main0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + main0_crit: main0-crit { + temperature = <105000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main1_thermal: main1-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + main1_crit: main1-crit { + temperature = <105000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi index 4090134676cf6..3954a73a33f35 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi @@ -38,4 +38,12 @@ wkup_i2c0: i2c@2b200000 { clocks = <&k3_clks 107 4>; clock-names = "fck"; }; + + vtm0: temperature-sensor@b00000 { + compatible = "ti,j7200-vtm"; + reg = <0x00 0xb00000 0x00 0x400>, + <0x00 0xb01000 0x00 0x400>; + power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62.dtsi b/arch/arm64/boot/dts/ti/k3-am62.dtsi index 37fcbe7a3c336..1795f3ee534e0 100644 --- a/arch/arm64/boot/dts/ti/k3-am62.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62.dtsi @@ -80,6 +80,7 @@ cbass_main: bus@f0000 { <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>, /* Wakeup Domain Range */ + <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */ <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>; @@ -94,10 +95,14 @@ cbass_wakeup: bus@2b000000 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; - ranges = <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */ + ranges = <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */ + <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */ <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>; }; }; + + #include "k3-am62-thermal.dtsi" + }; /* Now include the peripherals for each bus segments */ From patchwork Tue Oct 25 19:15:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019786 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E58C0FA3742 for ; Tue, 25 Oct 2022 19:15:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232667AbiJYTPh (ORCPT ); Tue, 25 Oct 2022 15:15:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57712 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232334AbiJYTPd (ORCPT ); Tue, 25 Oct 2022 15:15:33 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B64197F0B2; Tue, 25 Oct 2022 12:15:32 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFKn3112029; Tue, 25 Oct 2022 14:15:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725320; bh=zrG9w02JnVRZZt0ciyWlc0+Fr/UocYsC+JZnx4gz+Fc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wCHuM6dP+cJnJcwXMZLRihVcowvvTixFQFo3QNzmKjlnecx7RHzaGj8wcxECu6+yL eSYZdNNgSbiExsJL6RNefTKP7qPBAlCh9wJ0kbo1HT/f0Hmfys9w+S4QvPkeOe2VPk 4UYjAKArx0RKpz7U5+XZIaQVZIo6VgtpoP/3LLio= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFKQQ082963 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:20 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJj6018069; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 09/11] arm64: dts: ti: k3-j721e-mcu-wakeup: add VTM node Date: Tue, 25 Oct 2022 14:15:13 -0500 Message-ID: <20221025191515.9151-10-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3842; h=from:subject; bh=vlkzNaHkJyVHTvJvk+O1jhmqXAYXIkCfkx3XmZoRK9Y=; b=owNCWmg5MUFZJlNZlGxQMQAAaf///n//2+Hs617vfv3e+1M/z/+n+wf22fe//uv/qTvz/26wARmY IeoHqDIGgNGgGgBoDT1NDNQAAA0AA0A0AaAAANAAAA0yNDQ9T1PUyGZNNRABoBkaMgDCADE0ADQ000 0AaA9QDENAHqeoAMJ6gNpAAGmTygDIA0GjQDHIaDJpp6RoAGgDQDIGTTRk0aDQNNAAAaNNGRhNBoDQ GjEDEMIaBgQDTQaACBN8LWywZ7xnkQZfgO+YtLOSfDAAwPfwQAI52A4vnP59xFU2kmjfdNBqsvgbA2 REkPleJZNk4kavDOdXZIpeg+Y0C1EqEREK70DSG6pH9Z20yNY44Lz22KX2nF32TMhMuOfGEDY5vbQh LQIpQDLgMeFEKrvNRLZMFSrcJK2rHxlPOv4HQSP3WA/IXIqpMF2CqbHWyxmffSO2dWRd3TZ+wCDcRC FtoumaD8F7ynSBrjrPEG0nEX3xZmjBPVJtTxDjphTCB+VTi3COGhwzKIt7dxkuxQRpUl9EC8AIS9hk KdR8EZ/gItGEfdGDUUeTCK9NYpIkwkNaCyJ9LA8aI9D+ZWx8jLq95SNovuKwUcu6s2XD1GRfxBs4AH bI6oYDnaAjC9cuD6gGBP2KRL05X5yYxJ06QCmVl64tvYLWlPk2IDAlJQ7SMor/F3JFOFCQlGxQMQ== X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The j721e supports a single Voltage and Thermal Management (VTM) module located in the wakeup domain with five associated temperature monitors located in various hot spots on the die. Signed-off-by: Bryan Brattlof --- .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 9 +++ arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi | 75 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721e.dtsi | 3 + 3 files changed, 87 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index df08724bbf1c5..9a09f66c51c01 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -418,4 +418,13 @@ mcu_mcan1: can@40568000 { interrupt-names = "int0", "int1"; bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; }; + + vtm0: temperature-sensor@42040000 { + compatible = "ti,j721e-vtm"; + reg = <0x00 0x42040000 0x00 0x350>, + <0x00 0x42050000 0x00 0x350>, + <0x00 0x43000300 0x00 0x10>; + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi new file mode 100644 index 0000000000000..79641927a9092 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + wkup_thermal: wkup-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + wkup_crit: wkup-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + mpu_thermal: mpu-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + mpu_crit: mpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + c7x_thermal: c7x-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 2>; + + trips { + c7x_crit: c7x-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 3>; + + trips { + gpu_crit: gpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + r5f_thermal: r5f-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 4>; + + trips { + r5f_crit: r5f-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index 0e23886c9fd1d..cfab10e2455c4 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -181,6 +181,9 @@ cbass_mcu_wakeup: bus@28380000 { <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; /* FSS OSPI1 data region 3*/ }; }; + + #include "k3-j721e-thermal.dtsi" + }; /* Now include the peripherals for each bus segments */ From patchwork Tue Oct 25 19:15:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019784 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECFC3FA3745 for ; Tue, 25 Oct 2022 19:15:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232656AbiJYTPg (ORCPT ); Tue, 25 Oct 2022 15:15:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232465AbiJYTPd (ORCPT ); Tue, 25 Oct 2022 15:15:33 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BE967B596; Tue, 25 Oct 2022 12:15:32 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFKN7096768; Tue, 25 Oct 2022 14:15:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725320; bh=Ppy3zj//WI1ACIOqsOM3ldBjuSRvYHp+YSUCh+3iEyY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Xm0OsgP1cHzp9dKZSbR2LQkM+DeEqltLgnv5HJyUms46MXWHVgrIJPzqIPJ4Xzbwr GI1xyXHO0d0ZAl5a5buLsTbH0eL/hGTPgBeuVgveEX3usyzGIC6M80VMhkgGCcHI1+ 6xG6l7Vl4vzuVFtA94eKrxpr0qo9BKAzfh5HnTZ0= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFKSl058289 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:20 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJT5007012; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 10/11] arm64: dts: ti: k3-j721s2-mcu-wakeup: add VTM node Date: Tue, 25 Oct 2022 14:15:14 -0500 Message-ID: <20221025191515.9151-11-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4419; h=from:subject; bh=yUbz1YnFlzwwEX5NAPRC/e00ihhrXaBsJBs9hFJUH8E=; b=owNCWmg5MUFZJlNZtaJemgAAZ3///r7v6/n/7/297//mv66fv+b/9/4be+v99f7Kt9xs/V2wARsY IeoNNGgMg0AAAAAAyaAAGjQ0NAAAAAA0ANAAAD1BoDQHqaM0I8Rih0NDQGgeo0B6QAaAB6gNAAaDQA GgPUDIAGgyPUBoGnqGm1AD1PUekAAAPUANCGjaTNTEaNBpoBkAA0YjQAGgGTQAADQYmTQDTEABk0AG mmmQZAxDIAAAAAKwaQNeeYDeJ5BlT9Ehdm/g0InmwHNxal0cyCJU369XSvuCFlipcGJWOelBnggD+b TM5sUKAP4ivmOUc7BjuAptuvLGNTlHrIhzJSWs9BHvVFcFmkn8RIDKFywutHqKDqUm2DT8gybu8dd+ yWwEwXUoQmHYMqhQC1zCD9PUm1lN6a2bOa4ymiPrRor3E5edH9SyZvUAPQwfD2qygsrzISFzoI4mAI YBGOcBQ6pBpGs4jMDW93mYPnRiJkYNNThapmHrw0ZlEtI4njz0oWYiPxgKQuV0vRQCWMO1L5dVFd1R AHiMNJqjqkF/+lcwQnCCPKgteKUu89zkhyJ7uyMbFNC/H52Pcs+LyDLTrCCkIaOBzheOFKfeDSHUIC VMB7MKgxcoBMIsbAHErBN9XbpBFiEXgHLzZw/iG04GwNCkFSJQckn/F3JFOFCQtaJemg== X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The j721s2 supports a single Voltage and Thermal Management (VTM) device located in the wakeup domain with seven associated temperature monitors located in various hot spots on the die. Signed-off-by: Bryan Brattlof --- .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 8 ++ arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi | 103 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 3 + 3 files changed, 114 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 4d1bfabd1313a..8287fd32c42f3 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -299,4 +299,12 @@ cpts@3d000 { ti,cpts-periodic-outputs = <2>; }; }; + + vtm0: temperature-sensor@42040000 { + compatible = "ti,j7200-vtm"; + reg = <0x0 0x42040000 0x0 0x350>, + <0x0 0x42050000 0x0 0x350>; + power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi new file mode 100644 index 0000000000000..c51009536756e --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + wkup0_thermal: wkup0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + wkup0_crit: wkup0-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + wkup1_thermal: wkup1-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + wkup1_crit: wkup1-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main0_thermal: main0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 2>; + + trips { + main0_crit: main0-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main1_thermal: main1-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 3>; + + trips { + main1_crit: main1-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main2_thermal: main2-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 4>; + + trips { + main2_crit: main2-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main3_thermal: main3-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 5>; + + trips { + main3_crit: main3-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main4_thermal: main4-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 6>; + + trips { + main4_crit: main4-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi index 7b930a85a29d6..33ea52e28b24f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi @@ -161,6 +161,9 @@ cbass_mcu_wakeup: bus@28380000 { }; }; + + #include "k3-j721s2-thermal.dtsi" + }; /* Now include peripherals from each bus segment */ From patchwork Tue Oct 25 19:15:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019789 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3378FFA3740 for ; Tue, 25 Oct 2022 19:15:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232728AbiJYTPk (ORCPT ); Tue, 25 Oct 2022 15:15:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231867AbiJYTPf (ORCPT ); Tue, 25 Oct 2022 15:15:35 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F07AA7F108; Tue, 25 Oct 2022 12:15:33 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFKWJ114098; Tue, 25 Oct 2022 14:15:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725320; bh=5ei+T2sIfAKZXLx4GUkSoCxdo3May+AmglUqcXsO3Q8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=aoMqh1Xhw1z5sQdCGcRXz6e1RvbAUnYqIRqMA9qbx6SOkbjLSqP9DAZFYjOYhLsIu B+vstrRZtI0TQ99PEMEQRDStQckk9+oRwL493vvnD2V8tUuma8QKdxxfXMQ7OvT5kI dNuKJQEkjUDnEE7WKK7dz5pSJXKFLHVyUZqpBgtk= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFKpT066003 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:20 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJ9J057005; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 11/11] arm64: dts: ti: k3-j7200-mcu-wakeup: add VTM node Date: Tue, 25 Oct 2022 14:15:15 -0500 Message-ID: <20221025191515.9151-12-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3069; h=from:subject; bh=/KShhWi5jQQedZMyH6niU354AAmxTCGEnVimVHPNn8c=; b=owNCWmg5MUFZJlNZEulUoAAAbf///r/p+6+xmna7X99r/cmvXe9/TZ7Xzm+v31z/5vxz7X6wARsw IeoBoDQADQ0DQaABkHqGQaA0eoNNA0YgA0ADT1DQ9Rk000D1AZMmgZA2p6no9UOEBppoyNNMjTQ00G mmQ0aaA0NDQ0AaepoMhkPUeoaaepoY1NqNABoAaAGgNNDTQyaCGh6gANGgNBpiDCDQGgBoaYQYJiaG TRoAAyDEZAwTIaYmQyGmmEyYgBgAOeSJUUfmgS9fK3APGGakpI38mDloqwEtwWZrqdaNsj1G0UBaD0 BVYTKpWKh5uuKExv1wS+97UU1EPE3Dj85hxpbu5V41pypZxbphgfyMYS9PNhBsMANNwPNUGw2J8V3h iJQmoa0WATmRBZEDkdgInuIH0riVFUAsaeKGI/Lvs4wz7VLKsdWIjoobtjSRDtgvW+mLSJVYx88uo6 fwu6ZeYsMiRRxir2nhC6A/39TTp5VnmsXbjPtSLw7+I2VO8bEYfSkumYC5bIMchagX8DZFFmuJ28h/ EYos3W1Se/TBKkWHDdZkhn+RozbPvKFi1cqBZMES9PyN0EZYkOymRsljb0rqO2cNGgtWA7mEKNq4cQ p0AbUwlMhahBcBKYI8SjLT4fOrlyeFa5C1xzhBJwQxBJ81VBtwaqElwEVsFFAYuQAxf8XckU4UJAS6 VSgA X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The j7200 supports a single Voltage and Thermal Management (VTM) device located in the wakeup domain with three associated temperature monitors located in various hot spots on the die. Signed-off-by: Bryan Brattlof --- .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 8 ++++ arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi | 47 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j7200.dtsi | 3 ++ 3 files changed, 58 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index e5be78a58682d..651d17dd20663 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -395,4 +395,12 @@ rng: rng@40910000 { status = "disabled"; /* Used by OP-TEE */ }; }; + + vtm0: temperature-sensor@42040000 { + compatible = "ti,j7200-vtm"; + reg = <0x00 0x42040000 0x00 0x350>, + <0x00 0x42050000 0x00 0x350>; + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi new file mode 100644 index 0000000000000..0bf52c93c3f9a --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + mcu_thermal: mcu-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + wkup_crit: wkup-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + mpu_thermal: mpu-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + mpu_crit: mpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main_thermal: main-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 2>; + + trips { + c7x_crit: c7x-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi index b6da0454cc5bd..9368a6e3d4a62 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi @@ -168,6 +168,9 @@ cbass_mcu_wakeup: bus@28380000 { <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; /* FSS OSPI1 data region 3 */ }; }; + + #include "k3-j7200-thermal.dtsi" + }; /* Now include the peripherals for each bus segments */