From patchwork Mon Oct 31 23:26:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13026499 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 564D4FA3747 for ; Mon, 31 Oct 2022 23:27:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229641AbiJaX1e (ORCPT ); Mon, 31 Oct 2022 19:27:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45346 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229746AbiJaX1a (ORCPT ); Mon, 31 Oct 2022 19:27:30 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2BC351115E; Mon, 31 Oct 2022 16:27:30 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRGEg108482; Mon, 31 Oct 2022 18:27:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667258836; bh=T7L44GLh1Vpy3fYEU2edI0jDVnA8qvZMddOrW4XRkQw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Q2mlQAQRS56AUpM7/MwyXVVMYxBCJJVHWtKFmXOxxWHo9Bg5QmEwXNaFBRKcpcjZ6 +ZlTKmk0XI5weist8ViEGpmSKqZh0Sz6j76aMmWqrHfRo61Mh1ymQISuMCvcI6uGWL Acds9UFKJirzfmxVaxMp+caGr2twba+F3/wJqCHo= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29VNRGap022965 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 31 Oct 2022 18:27:16 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Mon, 31 Oct 2022 18:27:15 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 31 Oct 2022 18:27:15 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRFl1124758; Mon, 31 Oct 2022 18:27:15 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v3 01/11] thermal: k3_j72xx_bandgap: simplify k3_thermal_get_temp() function Date: Mon, 31 Oct 2022 18:26:52 -0500 Message-ID: <20221031232702.10339-2-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221031232702.10339-1-bb@ti.com> References: <20221031232702.10339-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1018; h=from:subject; bh=g+YxgOMLXP3w1bq6vyZoRrUwJBsI9oCmt8mLlbeowlY=; b=owNCWmg5MUFZJlNZg+zNZwAAZH///v//+/mt7hnctdv7+j26Efwz+raf3f+b7mt491nR//awARsz Uh6jQABo0ZAZANBoGgDQZNGmmgA000AGjIaAAMgaGahpk0xHqM0ENDNR4mocCA000AaGTIGQA9TIGE ZDQDNT1AaB6gBieoBpoekaDEDQ9QaPUAaB6gwQCHqH6pkaGI0yHpPUBo0GjIZMQAAaGTQAGmgNGmmm mjQAaBkDJhBkZHpNAyHqDQADAhbQ2MIAlP+MX1lDm+Zh2lew/hkw0GNGTQZaCNugsdZWYZ13AQmfxV Oym3cAXJBPQyLupUz3nK/C2nZCULkWXehYkE3rloeC68BJQHnZe3l0mgxh+XaFTHm/CIDwP58zsWIH J8gtH4oYwQZqqyfQdoQhZjmKQL3Z2YBLcSOcqtg026S0b/E8lJ+09WbcxzxDmm/iSOYaeMWH0LQ+pt aqEDIvQJ2rJK5ySZoc24PCXRRq6MOlATZessdWc8KH59ipkqcBWb3ECW7SXHfopp2LBolYDDRXJlIV 4qglVIOEe/NmhmXeTaiArsAuh4YXu8PQv7JnLP9DZiCRAsD1iQS0vCLxQ14QoT1iNxPftY/Pq17xG8 TbpP6GAFQDcILd6IIRGkO9rWMijZpy9Nd4aWBux5DpiTcu/AIozFERaHEF1Of4u5IpwoSEH2ZrOA== X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The k3_thermal_get_temp() function can be simplified to return only the result of k3_bgp_read_temp() without needing the 'ret' variable Signed-off-by: Bryan Brattlof --- drivers/thermal/k3_j72xx_bandgap.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/thermal/k3_j72xx_bandgap.c b/drivers/thermal/k3_j72xx_bandgap.c index c073b1023bbe7..a9f99a190cb61 100644 --- a/drivers/thermal/k3_j72xx_bandgap.c +++ b/drivers/thermal/k3_j72xx_bandgap.c @@ -249,14 +249,7 @@ static inline int k3_bgp_read_temp(struct k3_thermal_data *devdata, /* Get temperature callback function for thermal zone */ static int k3_thermal_get_temp(struct thermal_zone_device *tz, int *temp) { - struct k3_thermal_data *data = tz->devdata; - int ret = 0; - - ret = k3_bgp_read_temp(data, temp); - if (ret) - return ret; - - return ret; + return k3_bgp_read_temp(tz->devdata, temp); } static const struct thermal_zone_device_ops k3_of_thermal_ops = { From patchwork Mon Oct 31 23:26:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13026497 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEB66FA3744 for ; Mon, 31 Oct 2022 23:27:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229882AbiJaX1e (ORCPT ); Mon, 31 Oct 2022 19:27:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45344 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229727AbiJaX1a (ORCPT ); Mon, 31 Oct 2022 19:27:30 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6CBF713DD3; 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Mon, 31 Oct 2022 18:27:15 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRFwN027828; Mon, 31 Oct 2022 18:27:15 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v3 02/11] thermal: k3_j72xx_bandgap: use bool for i2128 erratum flag Date: Mon, 31 Oct 2022 18:26:53 -0500 Message-ID: <20221031232702.10339-3-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221031232702.10339-1-bb@ti.com> References: <20221031232702.10339-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1769; h=from:subject; bh=CBnvYRL9huVrlmYgI1dWwQk4JHA1y8ajdopZHQJDTuQ=; b=owNCWmg5MUFZJlNZdxwcoAAAan///rfr/r/recf+u+n/WPlT1rP/fv5iWu6v37/f/fd1126wARsY HagGgyAAAA0DQ09QGgAPUAA0NAAAAAxDRoAAGhkaD1MJoximEaN6SHQHqA00GmgBpoAPQmQaaAAGgA AGIMQBoG1DJo9TRoep6T1DINMgAPU0AZDaghoZNNMjQ0YmgAGhpiZMmQ0DRoAABoGCYjEyYAEANGhp iAYIANAAAAEDqhBNpiA0AKKDB+cf4+8wD3JwJD0QWGso8PBIPo2h5QFdWKNKU0WZ6aq9ftAWy6ZVS2 0DyTGOZrJBBEATxcU/boPoaTXjd61zZhJGa9DXhCD1TVkGEZPTiQVsXHbKSJdbHT5UHbrr8peEEMZI mHiH7jc+VDGUTvmFAfzJO3NsPZUjoNJ/ChfcQkOMLs0yvBMEoZS01/NQeyFz2VNVCs3ocbQCbHJ8sI H02YnhO/oJhgsQ6rx6gPiNQbyiOZ7RZLA7emlpvqkc1L5rCDGXwJ/DvTyCmeFK8c2rnNRi2hLlTJpc KlC/2fmQwqFZ8HCiufTJPwkhF2fIeBncpc8aQRXPaKS93dREdQRm2kW0goQg7tBlBxgpiv2SGi8BUN iuPEg5DOMAIwza7jBG3DswIQDOKB0EErTMAdCTVZIKkMk41vHhL/i7kinChIO44OUA X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Some of TI's J721E SoCs require a software trimming method to report temperatures accurately. Currently we are using a few different data types to indicate when we should apply the erratum. Change the 'workaround_needed' variable's data type to a bool to align with how we are using this variable currently. Signed-off-by: Bryan Brattlof --- drivers/thermal/k3_j72xx_bandgap.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/thermal/k3_j72xx_bandgap.c b/drivers/thermal/k3_j72xx_bandgap.c index a9f99a190cb61..b9d20026771a5 100644 --- a/drivers/thermal/k3_j72xx_bandgap.c +++ b/drivers/thermal/k3_j72xx_bandgap.c @@ -340,7 +340,7 @@ static void print_look_up_table(struct device *dev, int *ref_table) } struct k3_j72xx_bandgap_data { - unsigned int has_errata_i2128; + const bool has_errata_i2128; }; static int k3_j72xx_bandgap_probe(struct platform_device *pdev) @@ -351,7 +351,7 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct k3_j72xx_bandgap *bgp; struct k3_thermal_data *data; - int workaround_needed = 0; + bool workaround_needed = false; const struct k3_j72xx_bandgap_data *driver_data; struct thermal_zone_device *ti_thermal; int *ref_table; @@ -522,11 +522,11 @@ static int k3_j72xx_bandgap_remove(struct platform_device *pdev) } static const struct k3_j72xx_bandgap_data k3_j72xx_bandgap_j721e_data = { - .has_errata_i2128 = 1, + .has_errata_i2128 = true, }; static const struct k3_j72xx_bandgap_data k3_j72xx_bandgap_j7200_data = { - .has_errata_i2128 = 0, + .has_errata_i2128 = false, }; static const struct of_device_id of_k3_j72xx_bandgap_match[] = { From patchwork Mon Oct 31 23:26:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13026502 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 959C9FA3741 for ; Mon, 31 Oct 2022 23:27:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229479AbiJaX1j (ORCPT ); Mon, 31 Oct 2022 19:27:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229695AbiJaX1c (ORCPT ); Mon, 31 Oct 2022 19:27:32 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FAF81115E; Mon, 31 Oct 2022 16:27:31 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRGIY108478; Mon, 31 Oct 2022 18:27:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667258836; bh=Bo6Z5yfHkk40T+6aJRLO+9cLsvzAhGwkopLqU34dgWU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=V6c8532lhTjWJvV2Vs8QsjdfwBRXnB705hg1i4AunCjYsJ0nWTezVMH+uI/aX0E8/ 38dir0XnL46rjFDXX49SHYlvyFlN/WYKrCfDwpmiQggWuE+H6RUOJF1YWdr5U9K7gJ b6rG1DiUoJ4GOw6uT+P0u1I6CjBAOHv7ST8hLrrk= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29VNRGSp022959 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 31 Oct 2022 18:27:16 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Mon, 31 Oct 2022 18:27:15 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 31 Oct 2022 18:27:15 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRFZ9080588; Mon, 31 Oct 2022 18:27:15 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v3 03/11] thermal: k3_j72xx_bandgap: remove fuse_base from structure Date: Mon, 31 Oct 2022 18:26:54 -0500 Message-ID: <20221031232702.10339-4-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221031232702.10339-1-bb@ti.com> References: <20221031232702.10339-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3769; h=from:subject; bh=81mhoBw/caDjW+fuWuwTWQ+hhm0caOGRtdC9Z4ZIV/c=; b=owNCWmg5MUFZJlNZlpKgmgAAY3////9/h63u2svf5V3z/93n3fwuf9Wln+/X1f/9+9n918+wARmx o4gAAAAD1MgAAANAAAAAGgAZAAaHqAMgNAHonqek009T1ANHqZNo1PSeoOgAaaBoxDIBo0DTQDIyBo BoyZAyNBkaGgZNNDBAGjTRpkNNMmhk00DQxMQAA71RsoPUGhtRoAB6gyAABoDTajQAaNGgGgAA0MgA 9QB6gAAaD1ANGgBpkeoCCJZkQdkZNCNR6sdwyjJKJ+GWZTRsXSc4bMfZBQNHSwFV2mGYE7TOBKwCJo nshNafFRljixu7RkckjiZD3b7OT8c8v8hjG1Ss6LhDkoYyvKSnjA9bPYNwk5TKfmX7HbcEGsOYt4DS KF0PmZULjiBc3gtMAnxUCxEdm8/XAM7s94ZVrqXR/cMUwmcksh82oRQm5lAc7r4vDBYDG7KxQUpQlX qdPHiKNcU24RyPfXhkGBu0xc4ik4lJCPiFWCMLihXSU+dShFWu5/veggzZc1tErv0yNXCpDqtBqhlF JTp5kJI8gMIHDoLMb4cQvwBqJVZJqB3icw12X2jljsDzStVnG5MPWSD8hKXELzKqtxgSALz6VQuzfy xXSqBfRJDvQIB5m+9BbIXouYRl3hzfsFpJepSmrlbBt/9xrAZyKrLLTf32g/xdyRThQkJaSoJo X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org 'fuse_base' is only needed during the initial probe function to provide data for a software trimming method for some of TI's devices affected by the i2128 erratum. The devices not affected will not use this region Remove fuse_base from the main k3_j72xx_bandgap structure Signed-off-by: Bryan Brattlof --- drivers/thermal/k3_j72xx_bandgap.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/thermal/k3_j72xx_bandgap.c b/drivers/thermal/k3_j72xx_bandgap.c index b9d20026771a5..395a73cb37425 100644 --- a/drivers/thermal/k3_j72xx_bandgap.c +++ b/drivers/thermal/k3_j72xx_bandgap.c @@ -177,7 +177,6 @@ struct k3_j72xx_bandgap { struct device *dev; void __iomem *base; void __iomem *cfg2_base; - void __iomem *fuse_base; struct k3_thermal_data *ts_data[K3_VTM_MAX_NUM_TS]; }; @@ -276,7 +275,7 @@ static int k3_j72xx_bandgap_temp_to_adc_code(int temp) } static void get_efuse_values(int id, struct k3_thermal_data *data, int *err, - struct k3_j72xx_bandgap *bgp) + void __iomem *fuse_base) { int i, tmp, pow; int ct_offsets[5][K3_VTM_CORRECTION_TEMP_CNT] = { @@ -298,16 +297,16 @@ static void get_efuse_values(int id, struct k3_thermal_data *data, int *err, /* Extract the offset value using bit-mask */ if (ct_offsets[id][i] == -1 && i == 1) { /* 25C offset Case of Sensor 2 split between 2 regs */ - tmp = (readl(bgp->fuse_base + 0x8) & 0xE0000000) >> (29); - tmp |= ((readl(bgp->fuse_base + 0xC) & 0x1F) << 3); + tmp = (readl(fuse_base + 0x8) & 0xE0000000) >> (29); + tmp |= ((readl(fuse_base + 0xC) & 0x1F) << 3); pow = tmp & 0x80; } else if (ct_offsets[id][i] == -1 && i == 2) { /* 125C Case of Sensor 3 split between 2 regs */ - tmp = (readl(bgp->fuse_base + 0x4) & 0xF8000000) >> (27); - tmp |= ((readl(bgp->fuse_base + 0x8) & 0xF) << 5); + tmp = (readl(fuse_base + 0x4) & 0xF8000000) >> (27); + tmp |= ((readl(fuse_base + 0x8) & 0xF) << 5); pow = tmp & 0x100; } else { - tmp = readl(bgp->fuse_base + ct_offsets[id][i]); + tmp = readl(fuse_base + ct_offsets[id][i]); tmp &= ct_bm[id][i]; tmp = tmp >> __ffs(ct_bm[id][i]); @@ -356,6 +355,7 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) struct thermal_zone_device *ti_thermal; int *ref_table; struct err_values err_vals; + void __iomem *fuse_base; const s64 golden_factors[] = { -490019999999999936, @@ -387,9 +387,9 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) return PTR_ERR(bgp->cfg2_base); res = platform_get_resource(pdev, IORESOURCE_MEM, 2); - bgp->fuse_base = devm_ioremap_resource(dev, res); - if (IS_ERR(bgp->fuse_base)) - return PTR_ERR(bgp->fuse_base); + fuse_base = devm_ioremap_resource(dev, res); + if (IS_ERR(fuse_base)) + return PTR_ERR(fuse_base); driver_data = of_device_get_match_data(dev); if (driver_data) @@ -428,7 +428,7 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) } /* Workaround not needed if bit30/bit31 is set even for J721e */ - if (workaround_needed && (readl(bgp->fuse_base + 0x0) & 0xc0000000) == 0xc0000000) + if (workaround_needed && (readl(fuse_base + 0x0) & 0xc0000000) == 0xc0000000) workaround_needed = false; dev_dbg(bgp->dev, "Work around %sneeded\n", @@ -452,7 +452,7 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) err_vals.refs[1] = PLUS30CREF; err_vals.refs[2] = PLUS125CREF; err_vals.refs[3] = PLUS150CREF; - get_efuse_values(id, &data[id], err_vals.errs, bgp); + get_efuse_values(id, &data[id], err_vals.errs, fuse_base); } if (id == 0 && workaround_needed) From patchwork Mon Oct 31 23:26:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13026492 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA9B3FA3744 for ; Mon, 31 Oct 2022 23:27:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229729AbiJaX1a (ORCPT ); Mon, 31 Oct 2022 19:27:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229695AbiJaX13 (ORCPT ); Mon, 31 Oct 2022 19:27:29 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 559C311C2E; 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Mon, 31 Oct 2022 18:27:15 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 31 Oct 2022 18:27:15 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRFG5037168; Mon, 31 Oct 2022 18:27:15 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v3 04/11] thermal: k3_j72xx_bandgap: map fuse_base only for erratum workaround Date: Mon, 31 Oct 2022 18:26:55 -0500 Message-ID: <20221031232702.10339-5-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221031232702.10339-1-bb@ti.com> References: <20221031232702.10339-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2554; h=from:subject; bh=UJw18bTWhZzEYgN7X9MypDXipXRn727Xr/6BWs3NM9w=; b=owNCWmg5MUFZJlNZSuIudgAAX////v7/x62sf+rzdf57/9XntRuiWP/D637nWx/+7v/f/3ewARtp B2pp6g9QNDQAAA0yAAAyAAANBpoAB6gBp6jQBppoAGgNNB6QPUZD1D0am1P1RA0BoAAeoMgAA0PUBo 0APSAAAaAep6jQDT1B6h6QA9QaAaNDaj9U0A9QHoh6mgcJk0Yh6mhiNAaMgMAjENAADQABgmmmCDI0 ZMmgA0NDRoDIYIaAAAAMGaia8rBlMEOALqBiPIKgGyULEuOaearQLypXww0EWkfx0CPBFtjbEt8zvP wYSK7fCJXBCJtEb2lUI36A+leBsqNuBTrVJAJs6ZcxaVuaQBLgX4oINdUKVre/0fLsMsU1aD3w9+Dn RrPkNlqE7Tv0Ke6FScOUgIMl1JpFbrzpQ/YcE3TTgmFHwksVo6+bjlJtBivVl9ZqI0MoYSz5NU39Ii JO+iythUIXkn1/3vsFR/aWbgxZnCJbkzyC1ZxWJJ5ttk/cA4NlGa2EoXGjUBiYPqajjKkmqEWeclSP 6A8Oat34fDMFGVCLvUgQqP+KcggslCG1LPsJgKNCTwWMntuYZitO1y8YxQWBcnSoQh2JwkmmS7bIzC PCFKy3UDBmHUm0VUzkkHEfPGz8GAQK6UATGN/4qAkB+zHV5qxkft/i7kinChIJXEXOwA== X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Some of TI's J721E SoCs require a software trimming procedure for the temperature monitors to function properly. To determine if a particular J721E is not affected by this erratum, both bits in the WKUP_SPARE_FUSE0 region must be set. Other SoCs, not affected by this erratum, will not need this region. Map the 'fuse_base' region only when the erratum fix is needed. Signed-off-by: Bryan Brattlof --- drivers/thermal/k3_j72xx_bandgap.c | 34 +++++++++++++++++++----------- 1 file changed, 22 insertions(+), 12 deletions(-) diff --git a/drivers/thermal/k3_j72xx_bandgap.c b/drivers/thermal/k3_j72xx_bandgap.c index 395a73cb37425..031ea1091909a 100644 --- a/drivers/thermal/k3_j72xx_bandgap.c +++ b/drivers/thermal/k3_j72xx_bandgap.c @@ -386,15 +386,32 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) if (IS_ERR(bgp->cfg2_base)) return PTR_ERR(bgp->cfg2_base); - res = platform_get_resource(pdev, IORESOURCE_MEM, 2); - fuse_base = devm_ioremap_resource(dev, res); - if (IS_ERR(fuse_base)) - return PTR_ERR(fuse_base); - driver_data = of_device_get_match_data(dev); if (driver_data) workaround_needed = driver_data->has_errata_i2128; + /* + * Some of TI's J721E SoCs require a software trimming procedure + * for the temperature monitors to function properly. To determine + * if this particular SoC is NOT affected, both bits in the + * WKUP_SPARE_FUSE0[31:30] will be set (0xC0000000) indicating + * when software trimming should NOT be applied. + * + * https://www.ti.com/lit/er/sprz455c/sprz455c.pdf + */ + if (workaround_needed) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 2); + fuse_base = devm_ioremap_resource(dev, res); + if (IS_ERR(fuse_base)) + return PTR_ERR(fuse_base); + + if ((readl(fuse_base) & 0xc0000000) == 0xc0000000) + workaround_needed = false; + } + + dev_dbg(bgp->dev, "Work around %sneeded\n", + workaround_needed ? "" : "not "); + pm_runtime_enable(dev); ret = pm_runtime_get_sync(dev); if (ret < 0) { @@ -427,13 +444,6 @@ static int k3_j72xx_bandgap_probe(struct platform_device *pdev) goto err_free_ref_table; } - /* Workaround not needed if bit30/bit31 is set even for J721e */ - if (workaround_needed && (readl(fuse_base + 0x0) & 0xc0000000) == 0xc0000000) - workaround_needed = false; - - dev_dbg(bgp->dev, "Work around %sneeded\n", - workaround_needed ? "" : "not "); - if (!workaround_needed) init_table(5, ref_table, golden_factors); else From patchwork Mon Oct 31 23:26:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13026496 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00B6FFA374C for ; Mon, 31 Oct 2022 23:27:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229841AbiJaX1d (ORCPT ); Mon, 31 Oct 2022 19:27:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45336 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229716AbiJaX1a (ORCPT ); Mon, 31 Oct 2022 19:27:30 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4BDF912AB5; Mon, 31 Oct 2022 16:27:28 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRGsb058538; Mon, 31 Oct 2022 18:27:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667258836; bh=LgTBdkwNzRTJ5B07mN+M8e2UjKFtWtJrOweJr0P5xmQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=cb4o8bYoK4NxStvBp3hk/Ibqmb8r0NMMmYClJk1qzzBgrlj+dTFmtBBumX3SKVDcq LBFbIY/qCaArbnLeEtgxR6kaBqmEktg1khnMsdDpiQo5ze63chZgwdHNxx1UbG71LG L5EnEjCF/s2zzQ3CTSjsmRfplajkUogjD1czqDw8= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29VNRGFV022968 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 31 Oct 2022 18:27:16 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Mon, 31 Oct 2022 18:27:16 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 31 Oct 2022 18:27:15 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRFJK037173; Mon, 31 Oct 2022 18:27:15 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof , Krzysztof Kozlowski Subject: [PATCH v3 05/11] dt-bindings: thermal: k3-j72xx: elaborate on binding description Date: Mon, 31 Oct 2022 18:26:56 -0500 Message-ID: <20221031232702.10339-6-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221031232702.10339-1-bb@ti.com> References: <20221031232702.10339-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1908; h=from:subject; bh=2owYngSVCIIHuMuf97DPY5J6wC+TRH6miDqFBbdv1FU=; b=owNCWmg5MUFZJlNZZSwGGwAAZH///r5tYyl/v/rPy3X3/6fet//2f35uO86z7r376nf/9dewARsZ SHpNBiAaMgA0GTIDQA00DJoDEeo0MgAAAABoaNGQA0ABoD1NNDJsmjSMg5AGg0BoNAAyNAGgADINNA GmmQNDR6QGnpBoNAYho0GammQaaGgYmnpNA0YaiGjamgxNGjTI0DQNNGRo0MQA0aaNMEGTEBkGgaAD JkAGQZDRoDIYQMI0AAAA3YToNBFAENlBuOmEkI+Cl5+FCCQ79ze3SCoMcMUGuTXYC1XJDa9JaImPrk mvlmHSAL6gFssU5EPur/VQV1gfRVq4s2pdD1KIvOx6C5slSxjJsmLAYoPbwafvuyZ8scw8ZuUG7e0r dylbcDnGEAEYXUzbjNNEooJnG67sXRphSHkQb6ciRGJA2qJJ2jdLM3LRKQMo2g/nZtHq1QsAShA5xU q04bJTh4cJILlrEJw1BJ8scyDJPvSOfdXrbt+2/4p0Pg8jLT1a/QhqZwzvox38gsEyu0wAKAzofaQI ZmuzhUDvlVJ42N8Nl2CbQ8ouyNzsYMcr8GZzAKHO+WJivjU6wvGSbeYCAgebQP9DAB1hBjtE1P8AQu XWiGADJ1vRiG02dgfvzV/yyDs/awvbdW5Kz7o05EgpSVAmC2wL4S7g0JtE/5WF/i7kinChIMpYDDY= X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Elaborate on the function of this device node as well as some of the properties this node uses. Signed-off-by: Bryan Brattlof Acked-by: Krzysztof Kozlowski --- .../bindings/thermal/ti,j72xx-thermal.yaml | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml index c74f124ebfc00..3bb870a26872f 100644 --- a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml @@ -9,6 +9,19 @@ title: Texas Instruments J72XX VTM (DTS) binding maintainers: - Keerthy +description: | + The TI K3 family of SoCs typically have a Voltage & Thermal + Management (VTM) device to control up to 8 temperature diode + sensors to measure silicon junction temperatures from different + hotspots of the chip as well as provide temperature, interrupt + and alerting information. + + The following polynomial equation can then be used to convert + value returned by this device into a temperature in Celsius + + Temp(C) = (-9.2627e-12) * x^4 + (6.0373e-08) * x^3 + \ + (-1.7058e-04) * x^2 + (3.2512e-01) * x + (-4.9003e+01) + properties: compatible: enum: @@ -19,7 +32,11 @@ properties: items: - description: VTM cfg1 register space - description: VTM cfg2 register space - - description: VTM efuse register space + - description: | + A software trimming method must be applied to some Jacinto + devices to function properly. This eFuse region provides + the information needed for these SoCs to report + temperatures accurately. power-domains: maxItems: 1 From patchwork Mon Oct 31 23:26:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13026493 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51E55FA3746 for ; Mon, 31 Oct 2022 23:27:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229761AbiJaX1b (ORCPT ); Mon, 31 Oct 2022 19:27:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229641AbiJaX13 (ORCPT ); Mon, 31 Oct 2022 19:27:29 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8275512095; Mon, 31 Oct 2022 16:27:28 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRGG3106686; Mon, 31 Oct 2022 18:27:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667258836; bh=i4FyJ9+wFGH1WYq6OT4ovHtAHbJIpIoaqp6lWcMTEDc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wCaW+X+GyUJ2OoHcny1AxrEn6PsUCDTkgD5FVBsukj2aZ7VZXLSmkYi+4YArwr/kp mxr56tFDE1tjZmXZtTmfo0bszvNFpmJxUkWcR3P+FbLHfiiWzogRflfyozd9XTbemf BZI1EJ5cYtfiMxPVgmOIq4eX4T6wqE/8r78QnQEo= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29VNRGtI023424 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 31 Oct 2022 18:27:16 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Mon, 31 Oct 2022 18:27:15 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 31 Oct 2022 18:27:15 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRFxw124774; Mon, 31 Oct 2022 18:27:15 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof , Krzysztof Kozlowski Subject: [PATCH v3 06/11] dt-bindings: thermal: k3-j72xx: conditionally require efuse reg range Date: Mon, 31 Oct 2022 18:26:57 -0500 Message-ID: <20221031232702.10339-7-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221031232702.10339-1-bb@ti.com> References: <20221031232702.10339-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1514; h=from:subject; bh=zQFnRZirEDAR1saQhH/S1yZ3qKsjNcR+QWeALNN71T8=; b=owNCWmg5MUFZJlNZyCid4gAAZP///77Pu6vu7Tf+fv/r/D7+evt/36yb+tr/+Hi76v9++vewARsw Iek0yNADQaNADRoAAANNABpo0aAANAA0AGjT1DRoGgDIaaAHpNDJmiGnqZNlDoDIDTQANNDIABoGjQ AMhoADENABpoYjaEyaA0A9Ro8o009QNNDQZAepoNAB00ZGmIAMjTRoANNMmQxGTRoNAABo0YEaZADQ MhhGgyA0aA0GmgA0aANDCAQJiF9O2uJBL8a+QfvAZ1vDkFEkEoX32/Q4iBAH1ln1APsDl1+makPF4e uBTsfk2Taqytr5XL/PBXS4vM1CWPNozgrH9O5YgpI9Q78rGwUnOHg116UTgBxBdjsg83WfprhWDFND j9d/x0A2fT5TXTCkhRNF8Z7oXdkYIkpqDA1PrHAjCJTSKpiQ5prsdOtX7w2OlKWPmmkkq0c/niZwJ6 3RHcU86v3EPi2BtfiiV2jFIB73hk/Vmp6TAKchd5hXooQWCRX9N9q+J1Rkcy5QsIg2IdrICbgUy0Op VYgoAZ2M7TSYwOIsYH7Wd6/0OR6PPZBdxQyZP+7VgV6NwVKREgritDLtpaXyVbEAS8j1gCFCKrXMyS It1BixIEx4qKoQkxNjIhyCCc0ciyK/ksoIiCjbY3yGd0DR+0ZiAgCzShcpL79w0aDDf4u5IpwoSGQU TvEA X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Only some of TI's J721E SoCs will need a eFuse register range mapped to determine if they're affected by TI's i2128 erratum. All other SoC will not need this eFuse range to function properly Update the bindings for the k3_j72xx_bandgap thermal driver so other devices will only need two register ranges Signed-off-by: Bryan Brattlof Reviewed-by: Krzysztof Kozlowski --- .../bindings/thermal/ti,j72xx-thermal.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml index 3bb870a26872f..0509c9cec224d 100644 --- a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml @@ -37,6 +37,7 @@ properties: devices to function properly. This eFuse region provides the information needed for these SoCs to report temperatures accurately. + minItems: 2 power-domains: maxItems: 1 @@ -44,6 +45,21 @@ properties: "#thermal-sensor-cells": const: 1 +allOf: + - if: + properties: + compatible: + contains: + const: ti,j721e-vtm + then: + properties: + reg: + minItems: 3 + else: + properties: + reg: + maxItems: 2 + required: - compatible - reg From patchwork Mon Oct 31 23:26:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13026500 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A2D2FA3741 for ; Mon, 31 Oct 2022 23:27:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229915AbiJaX1g (ORCPT ); Mon, 31 Oct 2022 19:27:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229779AbiJaX1b (ORCPT ); Mon, 31 Oct 2022 19:27:31 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF5CF1116F; Mon, 31 Oct 2022 16:27:30 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRGpt092617; Mon, 31 Oct 2022 18:27:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1667258836; bh=Le+bXLRPi2PorGOqYWdZ7TXZI7dPM2vRnsQn7M/5zyo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GOIBYdqr5m+M5T6f1wqZMP5mdOqKCZY6Hg89K0JuOkfPO0aYVaM5NyUXXCrpLEoNs 4mPHio4/Y3W8UwuaHZVyRw9BSMSHv3PGnLuZ5l649Ef8lxY1uz7zEb6yWiXI9MhFX5 Un7Q+ge5rl0PGlDmihSTuzaqyXUYE569RAoW4dbo= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29VNRGfL022969 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 31 Oct 2022 18:27:16 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Mon, 31 Oct 2022 18:27:16 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 31 Oct 2022 18:27:16 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRGPV027840; Mon, 31 Oct 2022 18:27:16 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v3 07/11] arm64: dts: ti: k3-am64-main: add VTM node Date: Mon, 31 Oct 2022 18:26:58 -0500 Message-ID: <20221031232702.10339-8-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221031232702.10339-1-bb@ti.com> References: <20221031232702.10339-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3215; h=from:subject; bh=xlJl/GZ0bAid8uJVN8dSqjl+Si5t64KdmpX6Ljuu5Vs=; b=owNCWmg5MUFZJlNZynwIaQAAdH////97T6//m8f3v/pzfMbv/n9/+b3X7luZ/d7sz5Ny5P8wARmY IepoAGhkNAAAA0Bo0NABoAGQAAGgepoA0AADTQA0ND1HqHqNGh5PVPUbU3qhlDQGjQGgDCaGINA0DT RppoaAaaaB6mIBoaNNBphA0aeoZA0ZDQDQDQyNB6jTRph0NPQTaIwhk0AaDQGNTCA00AMQ00BoBpoA aHpABiNAGTTQBoNGTQAAAw+6gG8DUhjxiHCAFEiBPECOGBQ4xckWCYWPCtyr8Ip6twIJPePeLxsWHB g5l1bd71KRhELKNKIRRyFvoCNhjruhaO5h102em/qxlh7evgmoiuQdD7C2hINuUHxzw1wYsfCWHHqj 9v9vNpwTRAs2mGv4MbKY76SXE3JW07ZS/VOXv/RArD/xNKHLVcAEkzwOXk3AOzOG5IT+mtlijwQwPi 7DEkOH7Ed4X04ENExdWLBMa+Y/OplX1IRVimlIODT5CFrjf0IIf5jBwNPEm9lh1LTcxu/wWMl59w2o BeFcQq+lp4slBQqVaHZHArcxHkKfIMA3YygrDOBFvsmb13HR+It99G1aUYvNE/aMY0XSHjcUUS2FJk YnfWCc59cqYSO8Ly75acIl4PZnzOtqz2FQFJuhKuPxIEYQGqoozqWFZTA2DEKD/F3JFOFCQynwIaQ= X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The am64x supports a single VTM module which is located in the main domain with two associated temperature monitors located at different hot spots on the die. Signed-off-by: Bryan Brattlof --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 8 +++++ arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi | 33 +++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am64.dtsi | 4 +++ 3 files changed, 45 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index d6aa23681bbe5..a31a139127e35 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -1356,4 +1356,12 @@ elm0: ecc@25010000 { clocks = <&k3_clks 54 0>; clock-names = "fck"; }; + + vtm0: temperature-sensor@b00000 { + compatible = "ti,j7200-vtm"; + reg = <0x00 0xb00000 0x00 0x400>, + <0x00 0xb01000 0x00 0x400>; + power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi new file mode 100644 index 0000000000000..1819a6948b19d --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am64-thermal.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + main0_thermal: main0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + main0_crit: main0-crit { + temperature = <105000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main1_thermal: main1-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + main1_crit: main1-crit { + temperature = <105000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi index c858725133af4..a0170605d7b4e 100644 --- a/arch/arm64/boot/dts/ti/k3-am64.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi @@ -69,6 +69,7 @@ cbass_main: bus@f4000 { <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */ <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */ <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */ + <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */ <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */ <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */ <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */ @@ -105,6 +106,9 @@ cbass_mcu: bus@4000000 { ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */ }; }; + + #include "k3-am64-thermal.dtsi" + }; /* Now include the peripherals for each bus segments */ From patchwork Mon Oct 31 23:26:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13026498 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90C96FA374D for ; Mon, 31 Oct 2022 23:27:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229865AbiJaX1d (ORCPT ); Mon, 31 Oct 2022 19:27:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229721AbiJaX1a (ORCPT ); Mon, 31 Oct 2022 19:27:30 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6CEF913F35; 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Mon, 31 Oct 2022 18:27:16 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 31 Oct 2022 18:27:16 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRGe4124787; Mon, 31 Oct 2022 18:27:16 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v3 08/11] arm64: dts: ti: k3-am62-wakeup: add VTM node Date: Mon, 31 Oct 2022 18:26:59 -0500 Message-ID: <20221031232702.10339-9-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221031232702.10339-1-bb@ti.com> References: <20221031232702.10339-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3321; h=from:subject; bh=/6/erm8uGvFnwvcLO4BZMnh8Xxmwt3ii2KHozEpD0Qs=; b=owNCWmg5MUFZJlNZX+HChwAAav///v75fn33/Leaf1923vff1z26V3+P334t7l47vHfx/m8wARsY IfqT1ADQGgAANBo0A00A0BoDQAANA0GmgNAAGgAPUaA0AGj1PUaPU9PQSHJoAAGhppoAAGgNqNDQB6 RoaGgAB6gNNBoxDQfqT1NNqMgAG1G1GgDQDQ9QeiGRkGgZBo00aDQGhkDCBoDCaAGJhMCNDTAIGhkA DQxMhppiMTQaAAAAgTcJc+Y4HFZMSFjg3bUJfqin4tA7rQrcDIBw0NpY6aAAX5Yt2JntvrpksIBVWS tPvO65pAxBR4K46lj6z6Gd2chd2pHSZVL8Cjkm01UdW5DQXsW62wBQTQG58Y4waj+QDIhW1TFOYEjH zAI5PdWyGNJnwL0zX9j+OhotGgpNEQZeWog2UZlpUVGnXIiOEkJCHgy021etWOXh0NqhFR/qOP42F7 qZw+5XGUvcdPK+KvUuP2QRzzavjnzgo5759SVzEtv81+QnWqg1NcsuWf2Gy1cvjDQN5qouhSO593Ka lUHxAeggpn15KTUJXeugy0KA9YjtesGgTQzE5n8y9glYH3ByTk/ZEA8/Cx4rNkBpYcHi2rsGZOyZBC RmyRdTeB+Eqv5pf5H9SDa6grcqE2OG/NMRFBMQGgMZQs8P7iUy1loNv+LuSKcKEgv8OFDg X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The am62x supports a single Voltage and Thermal Management (VTM) module located in the wakeup domain with two associated temperature monitors located in hot spots of the die. Signed-off-by: Bryan Brattlof --- arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi | 33 +++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 8 +++++ arch/arm64/boot/dts/ti/k3-am62.dtsi | 7 ++++- 3 files changed, 47 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi new file mode 100644 index 0000000000000..1819a6948b19d --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62-thermal.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + main0_thermal: main0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + main0_crit: main0-crit { + temperature = <105000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main1_thermal: main1-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + main1_crit: main1-crit { + temperature = <105000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi index 4090134676cf6..3954a73a33f35 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi @@ -38,4 +38,12 @@ wkup_i2c0: i2c@2b200000 { clocks = <&k3_clks 107 4>; clock-names = "fck"; }; + + vtm0: temperature-sensor@b00000 { + compatible = "ti,j7200-vtm"; + reg = <0x00 0xb00000 0x00 0x400>, + <0x00 0xb01000 0x00 0x400>; + power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62.dtsi b/arch/arm64/boot/dts/ti/k3-am62.dtsi index 37fcbe7a3c336..1795f3ee534e0 100644 --- a/arch/arm64/boot/dts/ti/k3-am62.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62.dtsi @@ -80,6 +80,7 @@ cbass_main: bus@f0000 { <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>, /* Wakeup Domain Range */ + <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */ <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>; @@ -94,10 +95,14 @@ cbass_wakeup: bus@2b000000 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; - ranges = <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */ + ranges = <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */ + <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */ <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>; }; }; + + #include "k3-am62-thermal.dtsi" + }; /* Now include the peripherals for each bus segments */ From patchwork Mon Oct 31 23:27:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13026503 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9751FA3748 for ; Mon, 31 Oct 2022 23:27:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229939AbiJaX1i (ORCPT ); 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Mon, 31 Oct 2022 18:27:16 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Mon, 31 Oct 2022 18:27:16 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 31 Oct 2022 18:27:16 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRGug037187; Mon, 31 Oct 2022 18:27:16 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v3 09/11] arm64: dts: ti: k3-j721e-mcu-wakeup: add VTM node Date: Mon, 31 Oct 2022 18:27:00 -0500 Message-ID: <20221031232702.10339-10-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221031232702.10339-1-bb@ti.com> References: <20221031232702.10339-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3842; h=from:subject; bh=vlkzNaHkJyVHTvJvk+O1jhmqXAYXIkCfkx3XmZoRK9Y=; b=owNCWmg5MUFZJlNZmNFxbgAAa3////9dv+8s237e+nV+/1fmz486/Sb7vfd53Wq/n7Fw//2wARlo HagANAAA0BiA00NAHqGgA0A000A0NDQA0DQyADQ9Q0MgyMho9RsmkxpNlDoaNDQAYmmmgDIaMmEaMI AGhiMjJkxNGTBMRiGCA0NGQBoyAAGjQ0yABwnqGjIMmgyZAaG1DQMmnqZNMhoGgAAAAaZA09JoaGTR oaAyaaaYTEGhkNAaAAAYDa+ByTgES8s4aKeTtqslzBcbaXHuh2hcQCmDIx1sVJiEXUJqg7Go9AQ3ol KEXQQSejEPqlOpIn0vyCVMeR+DDXZ/msc8r0JBp37A7TyahD1nd3SzJ7oNOWRhAvtnpsrEQNdkqbxI KlPuAgySySIWqhWilMigMhIsdkeWpwWEjCKmiIp4szhVxd5e+t2QCpuWBM9ikv/M39DmIzacWIyRRS ADD+f71okKvwBNxor26exrOq/JCeXDegLUt8RrESgCcW5hCrpqS+WBWnqPz/plbB/SiBRhBv6f8Ryi gA+KtBMHag6cZNolnOMBC7cfTYunsCa0W69RJORCg54fuLfKUqMImIbtk47HmeAwGVhmLARADM/X48 mXUi1gwyXraGwBL9zCkuv8uVzWkFtEitXJGhvEIYeKwWBBIBrGM7HGHqk/4u5IpwoSExouLcA= X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The j721e supports a single Voltage and Thermal Management (VTM) module located in the wakeup domain with five associated temperature monitors located in various hot spots on the die. Signed-off-by: Bryan Brattlof --- .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 9 +++ arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi | 75 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721e.dtsi | 3 + 3 files changed, 87 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index df08724bbf1c5..9a09f66c51c01 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -418,4 +418,13 @@ mcu_mcan1: can@40568000 { interrupt-names = "int0", "int1"; bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; }; + + vtm0: temperature-sensor@42040000 { + compatible = "ti,j721e-vtm"; + reg = <0x00 0x42040000 0x00 0x350>, + <0x00 0x42050000 0x00 0x350>, + <0x00 0x43000300 0x00 0x10>; + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi new file mode 100644 index 0000000000000..79641927a9092 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + wkup_thermal: wkup-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + wkup_crit: wkup-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + mpu_thermal: mpu-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + mpu_crit: mpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + c7x_thermal: c7x-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 2>; + + trips { + c7x_crit: c7x-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 3>; + + trips { + gpu_crit: gpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + r5f_thermal: r5f-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 4>; + + trips { + r5f_crit: r5f-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index 0e23886c9fd1d..cfab10e2455c4 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -181,6 +181,9 @@ cbass_mcu_wakeup: bus@28380000 { <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; /* FSS OSPI1 data region 3*/ }; }; + + #include "k3-j721e-thermal.dtsi" + }; /* Now include the peripherals for each bus segments */ From patchwork Mon Oct 31 23:27:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13026495 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B58BDFA3749 for ; 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Mon, 31 Oct 2022 18:27:16 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Mon, 31 Oct 2022 18:27:16 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 31 Oct 2022 18:27:16 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRGq5124795; Mon, 31 Oct 2022 18:27:16 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v3 10/11] arm64: dts: ti: k3-j721s2-mcu-wakeup: add VTM node Date: Mon, 31 Oct 2022 18:27:01 -0500 Message-ID: <20221031232702.10339-11-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221031232702.10339-1-bb@ti.com> References: <20221031232702.10339-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4419; h=from:subject; bh=yUbz1YnFlzwwEX5NAPRC/e00ihhrXaBsJBs9hFJUH8E=; b=owNCWmg5MUFZJlNZ3/T6mgAAbH////9/j7/33On/L+fr/H+r34/7y925r+L1Xe1b05L6wl+wARsx pA9DUaBoAAD1GgGgAAaBoMgNANA2o0APU0NNAAaAA9QaGjQepp6j0nqZHpMZQ5MjTTI0NAwjQGgBpo YgaBo0aYgAAYjJoPQQyGmmg9QYmhoeoPUNNA9IZADQDvVGT1ABiaBkaDQBpoaDTQ0yGg0BoAyDQyNB oxGJkAyBoBo00NAyA0Gh6g9NBw5rB2xzDf1GCEQhSKFYQaI6OX1YJJfGoFoM0y48mSGXuW5AvRlmPG JuX7oFVphS23T55AGijN6PwF5M+CTpEDZnFIN91hhu+OQv8pFyIeijSiVhUDNsWZx0wWocEDEBSOd2 ZU3G4SDfrQE807GMekLwDVY/0JOdlMEiyWAjl+2FbWtsyXv6xZDDcEbrqc6q192y5QGLMMDQI0R9tv GqCyOAxD/S0ScXEINVfwi4Psnu2EDZkG1B9r2pFiYL9PLUJgumrLy7nbZrGfoMVi1xeI0PsU90yZpD o78cZKlPyJRNGKZxRN7JuCtGHALFJpzZOerKfwjSmMXztMSlRDEFAw/4JRgIGoYdaOdEPFj9vysfQq jahASdwgANEEDyuwM5maVgCHa+oX+IL3mCTF5dJxUJXdAGKRQVg2sL9SAEqMz/F3JFOFCQ3/T6mg== X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The j721s2 supports a single Voltage and Thermal Management (VTM) device located in the wakeup domain with seven associated temperature monitors located in various hot spots on the die. Signed-off-by: Bryan Brattlof --- .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 8 ++ arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi | 103 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 3 + 3 files changed, 114 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 4d1bfabd1313a..8287fd32c42f3 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -299,4 +299,12 @@ cpts@3d000 { ti,cpts-periodic-outputs = <2>; }; }; + + vtm0: temperature-sensor@42040000 { + compatible = "ti,j7200-vtm"; + reg = <0x0 0x42040000 0x0 0x350>, + <0x0 0x42050000 0x0 0x350>; + power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi new file mode 100644 index 0000000000000..c51009536756e --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j721s2-thermal.dtsi @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + wkup0_thermal: wkup0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + wkup0_crit: wkup0-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + wkup1_thermal: wkup1-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + wkup1_crit: wkup1-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main0_thermal: main0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 2>; + + trips { + main0_crit: main0-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main1_thermal: main1-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 3>; + + trips { + main1_crit: main1-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main2_thermal: main2-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 4>; + + trips { + main2_crit: main2-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main3_thermal: main3-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 5>; + + trips { + main3_crit: main3-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main4_thermal: main4-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 6>; + + trips { + main4_crit: main4-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi index 7b930a85a29d6..33ea52e28b24f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi @@ -161,6 +161,9 @@ cbass_mcu_wakeup: bus@28380000 { }; }; + + #include "k3-j721s2-thermal.dtsi" + }; /* Now include peripherals from each bus segment */ From patchwork Mon Oct 31 23:27:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13026501 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EAA7FECAAA1 for ; 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Mon, 31 Oct 2022 18:27:16 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Mon, 31 Oct 2022 18:27:16 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 31 Oct 2022 18:27:16 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29VNRGrY037194; Mon, 31 Oct 2022 18:27:16 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v3 11/11] arm64: dts: ti: k3-j7200-mcu-wakeup: add VTM node Date: Mon, 31 Oct 2022 18:27:02 -0500 Message-ID: <20221031232702.10339-12-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221031232702.10339-1-bb@ti.com> References: <20221031232702.10339-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3069; h=from:subject; bh=/KShhWi5jQQedZMyH6niU354AAmxTCGEnVimVHPNn8c=; b=owNCWmg5MUFZJlNZDN/x1QAAYv///7/9Ui+/3zv/Uuf92M7f0LN/4e337H7P3m3ftZ3D1v+wARmY IeoAHpDygABo0AGgDJiBoGagDQNBkAAANBkABoBmpo9QNAPUDZJ5HqhkmhoMmg0GQNBtQ00BiaZDRo D1GgDIaGTQGmIxDRkHqZND1PSAA0ZHqDRpoDQ0AdNNpGjTTQBkaaZHqGTQ00yDIaaMgbUBkANNDIyA yGjIaaAMEDQaAGIYAgAAByRoUxFZAA0rHHjUmn5qTALR4sFsfUSF8xHyoa7On+8NBD6HuDBD47XqbB esQOqfo9AXupZ1V4NdSrbe/4EdAw3Z3nN3AS757lkBpIoNLKMcVmysXAL1hiFqEucunQOgzbn9KXlG imPFDysLwn130UqL4VyweQmPqgN6u9G5nAgBatoQrT+Jb/t+snCqkED8dlNBhqCWMztXb5tdvBBQgX 73Drq/jGfrcsDcU9Ww7BbdPXflH2nULFjzsWq29r2PanJ9BL4YAaX8/h+gsgln4MPnslQtdKZ7EWh6 RXqups4MDv6UKVzdbr5L6NqIaDdOJNpQSdRw7kudy1CsNNQeLVlUp1KrTrQi5S6PsilYRnuILBDh76 Fo33GwTPDR5sUpPYCRcNNck8DRFGbrTIU/L4zRiZnmpgGugRoAEDgQ5YM4H+LuSKcKEgGb/jqg X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The j7200 supports a single Voltage and Thermal Management (VTM) device located in the wakeup domain with three associated temperature monitors located in various hot spots on the die. Signed-off-by: Bryan Brattlof --- .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 8 ++++ arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi | 47 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j7200.dtsi | 3 ++ 3 files changed, 58 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index e5be78a58682d..651d17dd20663 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -395,4 +395,12 @@ rng: rng@40910000 { status = "disabled"; /* Used by OP-TEE */ }; }; + + vtm0: temperature-sensor@42040000 { + compatible = "ti,j7200-vtm"; + reg = <0x00 0x42040000 0x00 0x350>, + <0x00 0x42050000 0x00 0x350>; + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi new file mode 100644 index 0000000000000..0bf52c93c3f9a --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + mcu_thermal: mcu-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + wkup_crit: wkup-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + mpu_thermal: mpu-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + mpu_crit: mpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main_thermal: main-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 2>; + + trips { + c7x_crit: c7x-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi index b6da0454cc5bd..9368a6e3d4a62 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi @@ -168,6 +168,9 @@ cbass_mcu_wakeup: bus@28380000 { <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; /* FSS OSPI1 data region 3 */ }; }; + + #include "k3-j7200-thermal.dtsi" + }; /* Now include the peripherals for each bus segments */