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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?BRd2398ByVs7KsfOD1BBKprUXeFa?= =?utf-8?q?3/fLanq6RvW/pE6bZQbKublJXebOinK9skWDhDVWM8OyUg2RYnT9muRkhjbA19lai?= =?utf-8?q?iMIyvRtYcxTLITzJFx3vdOO6DPo9BgRND/lhJLRDcBaWV7lmh4FG6r7rtK2mwrFRI?= =?utf-8?q?MZWW92tTRSQzVaPD5pYzs2bm2qA4vCQjh5ReRNQ2tKaqEbh6oaFCSnb6lpHlw+ZKL?= =?utf-8?q?h0Ze/sqkO+JfnHSZQwPNpGCG7DTfAVkGDIh4UsPnMLG8z7k7sb9ME6zRxYRfj56tX?= =?utf-8?q?zZ4J+mbg8UyHvpF5YH9PXLPjK+pHIA+OIA7TsssP4oxNT/EsqbIbRNPyQ80dFVhIR?= =?utf-8?q?p5q5upB1sTkfigs9rxrr7RPiithrdKHAR6xfbXOwoDAoi/amWkeyOCrnslhX4OFRq?= =?utf-8?q?jdlzqzDLoNxM6UawnX8cwJTztubWksNlBfnzr+KmXhdA0bKpQwrO1dAplAk1YGjNF?= =?utf-8?q?cTtXKIA7F2ANFuMfb2iXIFDUaAQSzJefdNC5sqr2QOCUF6WLzBO/lOQBOkkTvBTAh?= =?utf-8?q?1fKy6nYeRKvAz/dQVUrrlu2sS7zszQ4Ks6GBhmRiE86BTr/AdJ/R+fvw6rtvIztSV?= =?utf-8?q?dF/MYAeAZKFI0Q6+P9hr0XpQ0cTF4RVp3eO79jqEZ7o+vBwRFZcAYugZ+pW9xkC5B?= =?utf-8?q?1hxN/gaX3C5AdG0xifC8pq0O/eSAtZAVhRgyDnW3zmG5SYBRe2eFNbmSeUMJtALDp?= =?utf-8?q?B+qIPG19zCW2JmrdrpEAhq5Y5RMpGeKyBe2JrtGzFfKFNn6OeMLQ6zftVZX9fyvpn?= =?utf-8?q?XZFAZ7a+f4Q9g9jERF48i1PdHhA0J5lCvNzkRnx/C4Z1y8dKLjxuf4m4KUuJMo4e8?= =?utf-8?q?ViewHc5wAnGRx97qpHwuCS1UbUqd+NxNaKLwfW0cOhotoqTiAT/YmHUtlvpAW+Knn?= =?utf-8?q?fzV/rc5Z4U9c/pWBA2DVnLut/JfILvb7rbUZZIzdpTkM9qYH3+re/YJzE1K9Al4LN?= =?utf-8?q?6x4nIFf4kq5l0SAka3WIJGeENz53n6JexHQ+nHrDemySEHkwdF+1uZ6qy1vn3EHHS?= =?utf-8?q?sIJQ5TKemJ4z0zgeihDnd3TuArLrC3RSvNZ+p+0wpJLsj7zDVpQgJrz5O19OckMQ8?= =?utf-8?q?1/0wA2tqPaXdLhYphB0+6l6LnSe09RTHAGDmCMsBDZbdJU/OiQI5Q0P1jS2xK823v?= =?utf-8?q?UM3SnH4u9c8O9lJQ253AGAJEzmF9+OBHTkBURvex67GDJ7zjR81jmooH51fVLI0QX?= =?utf-8?q?VIkXqCioaiVgKcpF1lbOmTdLlZ6wCvA6lDmZ4133IYrFS81Y5H7zdfzzkhFJJrVMH?= =?utf-8?q?O4a6h2scknysERqroTb+1YEFBhQeJoVWmZyrP0cCHBSEyC1ur2dyEtU4sYQFN4RFE?= =?utf-8?q?ScfeJNwpz2gfLETeBGxMBgZqMm/MFfgqrLsYRfi0pLHuN8yTMnqWMc+2nVH1pfUmA?= =?utf-8?q?a50geLN1k9p/jljNcMnVPnjpwWDCYbQ4R9pk0LE7R20k2lf9cfao9buylDR1ifEZw?= =?utf-8?q?IkyjtFAuK83bXYGYID27KKILuvbWG+9OKzwU1dJuujxPnEgbn6t+GfJZ2iOheJljf?= =?utf-8?q?w1iSU6K9xZMk?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1588a87b-915b-4e25-1e52-08dabe70187a X-MS-Exchange-CrossTenant-AuthSource: SJ0PR03MB6360.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2022 14:23:08.5117 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: o2VKVCJuZD6aol+imHZt1vcZtKfz/3DPLKPRYuRHN0jrlQCa9U3Ic2AT5ATNlumsIdoKkN372eEr2U01wqcu5A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR03MB6515 The "APIC register virtualization" Intel hardware feature applies to both MMIO or MSR APIC accesses depending on whether "virtualize x2APIC mode" is also available. As such also suggest MSR APIC accesses if both "APIC register virtualization" and "virtualize x2APIC mode" features are available. Fixes: 7f2e992b82 ('VMX/Viridian: suppress MSR-based APIC suggestion when having APIC-V') Signed-off-by: Roger Pau Monné --- xen/arch/x86/hvm/viridian/viridian.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/viridian/viridian.c b/xen/arch/x86/hvm/viridian/viridian.c index 25dca93e8b..c4fa0a8b32 100644 --- a/xen/arch/x86/hvm/viridian/viridian.c +++ b/xen/arch/x86/hvm/viridian/viridian.c @@ -197,7 +197,11 @@ void cpuid_viridian_leaves(const struct vcpu *v, uint32_t leaf, res->a = CPUID4A_RELAX_TIMER_INT; if ( viridian_feature_mask(d) & HVMPV_hcall_remote_tlb_flush ) res->a |= CPUID4A_HCALL_REMOTE_TLB_FLUSH; - if ( !cpu_has_vmx_apic_reg_virt ) + /* + * Suggest x2APIC mode by default, unless xAPIC registers are hardware + * virtualized and x2APIC ones aren't. + */ + if ( !cpu_has_vmx_apic_reg_virt || cpu_has_vmx_virtualize_x2apic_mode ) res->a |= CPUID4A_MSR_BASED_APIC; if ( viridian_feature_mask(d) & HVMPV_hcall_ipi ) res->a |= CPUID4A_SYNTHETIC_CLUSTER_IPI; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?/iWh7p8h6eS8tgMB0ffoeYmIBMh8?= =?utf-8?q?84CZg+oXCq1ibeFYXw2ZH5A5Vtv2Tcn9swpc/7WXABpf9SzRtUl25plWbH00nFQiZ?= =?utf-8?q?Sq1kS8YqZpVaK7yZZ28Hl19pnRuQk08wl355hw1Q6O9IUatw0IzPR9kWhvAgdkWJg?= =?utf-8?q?eVwtOCIaZhyEvN5ZmqXHDVRTw3iAZ9RG9OC6YO/wwerYt7oDrIkL9DjeTxNX115Gb?= =?utf-8?q?gIt9y4dYoDaCTFWY6apmTVdMokIkEF5Th7an5tTzoCq4dTsFNpOSZI70D/5HG290o?= =?utf-8?q?drR/AbJMW6yeLhZPpLJ1NyIURf0Uu7mtdFNTCINDKHWatoPM5Zb/Qk0P5rRj/caPN?= =?utf-8?q?hlcz45KYt3bZvYLwWRZwGjNybXAeZ3nxa5AaOqpRxY6ElCEn1H3x7g7nkciPqAcze?= =?utf-8?q?b0Nwu2ro2xb3UesFarJQtcbiVv1fw1nHG1AcP4SQidi1FBV0lS6kh9TK3Wp1PLJyz?= =?utf-8?q?/h9XzvIo1iT/R/7TDnmsh5B9FylhOaHcY8KvuU2R2tIfX1mmXohft0bKyJHM6BnGO?= =?utf-8?q?FyGaQaRm7Jwen88S4u7vfFFV2tf1lAhLCGjYyCZbV9rl+kQ8J6QnATEPZ69OxiGax?= =?utf-8?q?6bkBX/62J6Z3pbmr8dHMtYT3LPNWAixxJKzxt4Id3q1i5yJEvefEqk06zQtl4EACE?= =?utf-8?q?dyCWjIdXCDoUSZvbmJiGiioZMMX5+JujV29aXPJxP3DkxQKrcX87hyJtO+JQx5BDT?= =?utf-8?q?kt79lmh2FDbecnAMKR0XjRc81eGf1cMCsQy294PnaqvB2sVkDnLJfeWjz19/zNhGz?= =?utf-8?q?kEACe4DmmermxqfzXpuqh616O23HchyYmhYbfTXwxJqrF/kVlWP9zFrxkFHB/CPq1?= =?utf-8?q?MzEUdvSW1+FXAewlwIPQ8Zs2tgIygqHWQBJGgo+h2N+J/SyN3eScewMvBZvXlUxk8?= =?utf-8?q?d4d0+lq+44349uH+Fj1gBD8bmsxhBx4qJ2wXe2nu7S7mVVrTPucPy5k4J/RsBOe7/?= =?utf-8?q?56ol5OhyYAZ6XMB+ccEfyfWSHy37n+W9+YGHBApKFyUz6A94ubiy4Htivcu2aibas?= =?utf-8?q?zBqB0yqCSYGeBbT+FkpgF8Gj25krSYW0G4qcxtZJ7x19Ozh50gFSltekrD0lMtfAX?= =?utf-8?q?VwrbhiqUMHLNUEVrBV02rFUASW1hehbmzjOUwcjdaA1MhHgeJ5SoDfJt3UZgk3uUq?= =?utf-8?q?eVJFwmkRwCyNcJWb6J9BiWHb9WqMXLrot9JR4BluhSpckhCLRSgDx9tjPEqtpHGmn?= =?utf-8?q?2npFpwUehRVa09Za2n9Tmo0HRV97uriIVKWLyXP7Ofn0pHGqFqHd6dwco6fRprpAR?= =?utf-8?q?hfNWqJmNz1+/YUJlVWF8uDY4bHQr7+aL7+BPtilvwchktXsWH6vWNazNBqfAN2Z9t?= =?utf-8?q?s9i19zOLadZ7OL3B3nYcm9gLwfVK+C3Qzx1HQQRT9gwIDppX1m+EodHCUOOkXEYeJ?= =?utf-8?q?5sxqobWffeEWqPysfpf2rVfM6Jw2JM8sRSVgOFdVjkPhnN54Y5TtNOLoLsPxGt94t?= =?utf-8?q?fZ24C3hqpdP7IZURQRj5MX87slUsssSxg6mYBFqUKNDa5Sw0ZarkK6nUcPJdiqcmx?= =?utf-8?q?ABu0wtB009FL?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5d2831f5-099b-4035-1405-08dabe701b59 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR03MB6360.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2022 14:23:13.2189 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: btSEP/TdS6ViwvNQzy7T6T3qutnwb4vU2L0tdaJCDrMRqnyaaE5eeh7pkYVPIL5KbxdnN6m1A3N9NQ5a2CTaiQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR03MB6515 The current reporting of the hardware assisted APIC options is done by checking "virtualize APIC accesses" which is not very helpful, as that feature doesn't avoid a vmexit, instead it does provide some help in order to detect APIC MMIO accesses in vmexit processing. Repurpose the current reporting of xAPIC assistance to instead report such feature as present when there's support for "TPR shadow" and "APIC register virtualization" because in that case some xAPIC MMIO register accesses are handled directly by the hardware, without requiring a vmexit. For symetry also change assisted x2APIC reporting to require "virtualize x2APIC mode" and "APIC register virtualization", dropping the option to also be reported when "virtual interrupt delivery" is available. Presence of the "virtual interrupt delivery" feature will be reported using a different option. Signed-off-by: Roger Pau Monné --- I find the logic in vmx_vlapic_msr_changed() hard to follow, but I don't want to rewrite the function logic at this point. --- xen/arch/x86/hvm/viridian/viridian.c | 2 +- xen/arch/x86/hvm/vmx/vmcs.c | 8 ++++---- xen/arch/x86/hvm/vmx/vmx.c | 25 ++++++++++++++++++------- xen/arch/x86/traps.c | 4 +--- 4 files changed, 24 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/hvm/viridian/viridian.c b/xen/arch/x86/hvm/viridian/viridian.c index c4fa0a8b32..bafd8e90de 100644 --- a/xen/arch/x86/hvm/viridian/viridian.c +++ b/xen/arch/x86/hvm/viridian/viridian.c @@ -201,7 +201,7 @@ void cpuid_viridian_leaves(const struct vcpu *v, uint32_t leaf, * Suggest x2APIC mode by default, unless xAPIC registers are hardware * virtualized and x2APIC ones aren't. */ - if ( !cpu_has_vmx_apic_reg_virt || cpu_has_vmx_virtualize_x2apic_mode ) + if ( !has_assisted_xapic(d) || has_assisted_x2apic(d) ) res->a |= CPUID4A_MSR_BASED_APIC; if ( viridian_feature_mask(d) & HVMPV_hcall_ipi ) res->a |= CPUID4A_SYNTHETIC_CLUSTER_IPI; diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index a1aca1ec04..7bb96e1a8e 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -1136,7 +1136,7 @@ static int construct_vmcs(struct vcpu *v) if ( !has_assisted_xapic(d) ) v->arch.hvm.vmx.secondary_exec_control &= - ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES; + ~SECONDARY_EXEC_APIC_REGISTER_VIRT; if ( cpu_has_vmx_secondary_exec_control ) __vmwrite(SECONDARY_VM_EXEC_CONTROL, @@ -2156,10 +2156,10 @@ int __init vmx_vmcs_init(void) if ( !ret ) { /* Check whether hardware supports accelerated xapic and x2apic. */ - assisted_xapic_available = cpu_has_vmx_virtualize_apic_accesses; + assisted_xapic_available = cpu_has_vmx_tpr_shadow && + cpu_has_vmx_apic_reg_virt; assisted_x2apic_available = cpu_has_vmx_virtualize_x2apic_mode && - (cpu_has_vmx_apic_reg_virt || - cpu_has_vmx_virtual_intr_delivery); + cpu_has_vmx_apic_reg_virt; register_keyhandler('v', vmcs_dump, "dump VT-x VMCSs", 1); } diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index e624b415c9..bf0fe3355c 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -3405,25 +3405,29 @@ static void vmx_install_vlapic_mapping(struct vcpu *v) void vmx_vlapic_msr_changed(struct vcpu *v) { + bool virtualize_x2apic_mode = has_assisted_x2apic(v->domain) || + (cpu_has_vmx_virtualize_x2apic_mode && + cpu_has_vmx_virtual_intr_delivery); struct vlapic *vlapic = vcpu_vlapic(v); unsigned int msr; - if ( !has_assisted_xapic(v->domain) && - !has_assisted_x2apic(v->domain) ) + if ( !cpu_has_vmx_virtualize_apic_accesses && + !virtualize_x2apic_mode ) return; vmx_vmcs_enter(v); v->arch.hvm.vmx.secondary_exec_control &= ~(SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES | - SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE); + SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE | + SECONDARY_EXEC_APIC_REGISTER_VIRT); if ( !vlapic_hw_disabled(vlapic) && (vlapic_base_address(vlapic) == APIC_DEFAULT_PHYS_BASE) ) { - if ( has_assisted_x2apic(v->domain) && vlapic_x2apic_mode(vlapic) ) + if ( virtualize_x2apic_mode && vlapic_x2apic_mode(vlapic) ) { v->arch.hvm.vmx.secondary_exec_control |= SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE; - if ( cpu_has_vmx_apic_reg_virt ) + if ( has_assisted_x2apic(v->domain) ) { for ( msr = MSR_X2APIC_FIRST; msr <= MSR_X2APIC_LAST; msr++ ) @@ -3432,6 +3436,10 @@ void vmx_vlapic_msr_changed(struct vcpu *v) vmx_set_msr_intercept(v, MSR_X2APIC_PPR, VMX_MSR_R); vmx_set_msr_intercept(v, MSR_X2APIC_TMICT, VMX_MSR_R); vmx_set_msr_intercept(v, MSR_X2APIC_TMCCT, VMX_MSR_R); + + v->arch.hvm.vmx.secondary_exec_control |= + SECONDARY_EXEC_APIC_REGISTER_VIRT; + } if ( cpu_has_vmx_virtual_intr_delivery ) { @@ -3440,9 +3448,12 @@ void vmx_vlapic_msr_changed(struct vcpu *v) vmx_clear_msr_intercept(v, MSR_X2APIC_SELF, VMX_MSR_W); } } - else if ( has_assisted_xapic(v->domain) ) + else if ( vlapic_xapic_mode(vlapic) ) v->arch.hvm.vmx.secondary_exec_control |= - SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES; + (cpu_has_vmx_virtualize_apic_accesses ? + SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES : 0) | + (has_assisted_xapic(v->domain) ? + SECONDARY_EXEC_APIC_REGISTER_VIRT : 0); } if ( !(v->arch.hvm.vmx.secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) ) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 7207390118..5c0aabe8a3 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1124,8 +1124,7 @@ void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, if ( !is_hvm_domain(d) || subleaf != 0 ) break; - if ( cpu_has_vmx_apic_reg_virt && - has_assisted_xapic(d) ) + if ( has_assisted_xapic(d) ) res->a |= XEN_HVM_CPUID_APIC_ACCESS_VIRT; /* @@ -1135,7 +1134,6 @@ void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf, * vmx_vlapic_msr_changed()). */ if ( has_assisted_x2apic(d) && - cpu_has_vmx_apic_reg_virt && cpu_has_vmx_virtual_intr_delivery ) res->a |= XEN_HVM_CPUID_X2APIC_VIRT;