From patchwork Sun Nov 6 23:46:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033673 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC425D500 for ; Sun, 6 Nov 2022 23:46:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778412; x=1699314412; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hF7aOjqB6MekPgEgck3DysnpsehuCNY7mBILiSKV3V8=; b=gbjtXBmtMD0q8kCq22oBowwJHs/yGCQEPj2uV9zYEWzxhK0HXtV3T5KB 83fHru0telt7vMMIjVpRLWjrYJD0aDgeZ3cMO4DY/GeVBnT8cJy3+DbtK 1GXqvFP9pdFe8RGHmH10SQ/hkt6vf5JY95EEJw20ayS4DQ+pPcvF1qRN7 X38tOWbUF0hcxFO3tcPz06rc7iYK/X2cGxMHdXdrWChu5zJAED//Qzq4l WB2tuA0ara6UnKSAA/3G9znJI+l0iFLCh8+hSRkBeSkgbKePkbvbaPHvC yvK79z+S+bZ0+so25/OfdjhSRzbzkbq5KaVl2hPRI9C8Nh76v6605nsCJ w==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="337007902" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="337007902" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:46:52 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="880867099" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="880867099" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:46:51 -0800 Subject: [ndctl PATCH 01/15] ndctl/test: Move firmware-update.sh to the 'descructive' set From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:46:51 -0800 Message-ID: <166777841122.1238089.5858907027462618446.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The firmware update test attempts a system-suspend test which may break systems that have a broken driver, or otherwise are not prepared to support suspend. Link: https://github.com/pmem/ndctl/issues/221 Reported-by: Yi Zhang Signed-off-by: Dan Williams --- test/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/meson.build b/test/meson.build index 5953c286d13f..c31d8eac66c5 100644 --- a/test/meson.build +++ b/test/meson.build @@ -170,7 +170,6 @@ tests = [ [ 'btt-errors.sh', btt_errors, 'ndctl' ], [ 'hugetlb', hugetlb, 'ndctl' ], [ 'btt-pad-compat.sh', btt_pad_compat, 'ndctl' ], - [ 'firmware-update.sh', firmware_update, 'ndctl' ], [ 'ack-shutdown-count-set', ack_shutdown_count, 'ndctl' ], [ 'rescan-partitions.sh', rescan_partitions, 'ndctl' ], [ 'inject-smart.sh', inject_smart, 'ndctl' ], @@ -196,6 +195,7 @@ if get_option('destructive').enabled() mmap_test = find_program('mmap.sh') tests += [ + [ 'firmware-update.sh', firmware_update, 'ndctl' ], [ 'pmem-ns', pmem_ns, 'ndctl' ], [ 'sub-section.sh', sub_section, 'dax' ], [ 'dax-dev', dax_dev, 'dax' ], From patchwork Sun Nov 6 23:46:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033674 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B2D7FD500 for ; Sun, 6 Nov 2022 23:46:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778418; x=1699314418; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1m26oHecianIsW7mMpSdF2J3D9I0WaMck1/vbIPkuCQ=; b=EiBz5L+5CnzCKp3Be5kCGAp0+oVOhU0vg8rIao/LVNnTwjZIgtp0bESm HkFVguprB+IZeYTRok196rhOD4Ny/y9iw6PWMnUHIB1DV9hYTbXXr4qry FPaun/9nfdHwJHWbelCP/m17qb17jjOeyQlU3BA4JkAU9zd+nnrDnEYtr o+jykpc+bcrWHO11HtFK3WvS9IPST/WHhWe7fQIUpCuI1K0ULL0WXy50f 8WOMHtl9PIlpw/vl/ywB62DATB6pgTsXgBPgUw+adSple/BVF6JAD9GQT t06O6aPyyYs9BstTxSroPtQj6EOZWyzpHtD0PWATG6A7paXx0HZ7QaXw9 g==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="312052567" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="312052567" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:46:58 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="964951323" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="964951323" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:46:57 -0800 Subject: [ndctl PATCH 02/15] ndctl/test: Add kernel backtrace detection to some dax tests From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:46:57 -0800 Message-ID: <166777841716.1238089.7618196736080256393.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 It is useful to fail a test if it triggers a backtrace. Generalize the mechanism from test/cxl-topology.sh and add it to tests that want to validate clean kernel logs. Signed-off-by: Dan Williams Reviewed-by: Alison Schofield --- test/common | 10 ++++++++++ test/cxl-region-sysfs.sh | 4 +--- test/cxl-topology.sh | 5 +---- test/dax.sh | 2 ++ test/daxdev-errors.sh | 2 ++ test/multi-dax.sh | 2 ++ 6 files changed, 18 insertions(+), 7 deletions(-) diff --git a/test/common b/test/common index 65615cc09a3e..44cc352f6009 100644 --- a/test/common +++ b/test/common @@ -132,3 +132,13 @@ json2var() { sed -e "s/[{}\",]//g; s/\[//g; s/\]//g; s/:/=/g" } + +# check_dmesg +# $1: line number where this is called +check_dmesg() +{ + # validate no WARN or lockdep report during the run + log=$(journalctl -r -k --since "-$((SECONDS+1))s") + grep -q "Call Trace" <<< $log && err $1 + true +} diff --git a/test/cxl-region-sysfs.sh b/test/cxl-region-sysfs.sh index 63186b60dfec..e128406cd8c8 100644 --- a/test/cxl-region-sysfs.sh +++ b/test/cxl-region-sysfs.sh @@ -164,8 +164,6 @@ readarray -t endpoint < <($CXL free-dpa -t pmem ${mem[*]} | jq -r ".[] | .decoder.decoder") echo "$region released ${#endpoint[@]} targets: ${endpoint[@]}" -# validate no WARN or lockdep report during the run -log=$(journalctl -r -k --since "-$((SECONDS+1))s") -grep -q "Call Trace" <<< $log && err "$LINENO" +check_dmesg "$LINENO" modprobe -r cxl_test diff --git a/test/cxl-topology.sh b/test/cxl-topology.sh index f7e390d22680..1f15d29f0600 100644 --- a/test/cxl-topology.sh +++ b/test/cxl-topology.sh @@ -169,9 +169,6 @@ done # validate that the bus can be disabled without issue $CXL disable-bus $root -f - -# validate no WARN or lockdep report during the run -log=$(journalctl -r -k --since "-$((SECONDS+1))s") -grep -q "Call Trace" <<< $log && err "$LINENO" +check_dmesg "$LINENO" modprobe -r cxl_test diff --git a/test/dax.sh b/test/dax.sh index bb9848b10ecc..3ffbc8079eba 100755 --- a/test/dax.sh +++ b/test/dax.sh @@ -118,4 +118,6 @@ else run_xfs fi +check_dmesg "$LINENO" + exit 0 diff --git a/test/daxdev-errors.sh b/test/daxdev-errors.sh index 7f79718113d0..84ef93499acf 100755 --- a/test/daxdev-errors.sh +++ b/test/daxdev-errors.sh @@ -71,6 +71,8 @@ if read sector len < /sys/bus/platform/devices/nfit_test.0/$busdev/$region/badbl fi [ -n "$sector" ] && echo "fail: $LINENO" && exit 1 +check_dmesg "$LINENO" + _cleanup exit 0 diff --git a/test/multi-dax.sh b/test/multi-dax.sh index 04070adb18e4..d471e1c96b5e 100755 --- a/test/multi-dax.sh +++ b/test/multi-dax.sh @@ -28,6 +28,8 @@ chardev1=$(echo $json | jq ". | select(.mode == \"devdax\") | .daxregion.devices json=$($NDCTL create-namespace -b $NFIT_TEST_BUS0 -r $region -t pmem -m devdax -a $ALIGN_SIZE -s 16M) chardev2=$(echo $json | jq ". | select(.mode == \"devdax\") | .daxregion.devices[0].chardev") +check_dmesg "$LINENO" + _cleanup exit 0 From patchwork Sun Nov 6 23:47:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033675 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C921D500 for ; Sun, 6 Nov 2022 23:47:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778424; x=1699314424; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PmnMB0EJo7BqWBD1GuQkF9aVenGk+FT0gRp/npgZFcs=; b=drm0XIy7oAv7i1fk7Jdn12Ip1AIbToHLt+rMcL5nIQQR9fPbtuRI+dLH db3U6R8prJGeUMBGjKolgXANpMStFiifago44dsjJhM1iGhbKz/YpkylQ K3mFo/ilojexlMZDb37ctYf3vbZjJk7N/qrOitBJpvBBUehCx3UHH9OG2 TpfaCM76FNFqdU9psMoBRvRW2WtUOy0pSShd+0DVuL/DTixbBJG2bqykk qMPjzAxZvLJ5XoZzW50pcsojMsmEVSqNQlOI5TgBzM+Pwi3mRE71ClP/B Cp93leCVk9qvPEbTegzKC4RBkl9/JhbaYntpliov1ymiefTj1qygeZ/EC Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="374541045" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="374541045" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:03 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="964951346" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="964951346" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:03 -0800 Subject: [ndctl PATCH 03/15] ndctl/clang-format: Move minimum version to 6 From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:47:03 -0800 Message-ID: <166777842304.1238089.14893633815148907315.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Follow the kernel change that did the same: sed -i 's/^\(\s*\)#\(\S*\s\+\S*\) # Unknown to clang-format.*/\1\2/' .clang-format commit 96232c7d4f84 ("clang-format: Update to clang-format >= 6") Signed-off-by: Dan Williams --- .clang-format | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/.clang-format b/.clang-format index b6169e15097c..f372823c3248 100644 --- a/.clang-format +++ b/.clang-format @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 # -# clang-format configuration file. Intended for clang-format >= 4. +# clang-format configuration file. Intended for clang-format >= 6. # Copied from Linux's .clang-format # # For more information, see: @@ -13,7 +13,7 @@ AccessModifierOffset: -4 AlignAfterOpenBracket: Align AlignConsecutiveAssignments: false AlignConsecutiveDeclarations: false -#AlignEscapedNewlines: Left # Unknown to clang-format-4.0 +AlignEscapedNewlines: Left AlignOperands: true AlignTrailingComments: false AllowAllParametersOfDeclarationOnNextLine: false @@ -37,24 +37,24 @@ BraceWrapping: AfterObjCDeclaration: false AfterStruct: false AfterUnion: false - #AfterExternBlock: false # Unknown to clang-format-5.0 + AfterExternBlock: false BeforeCatch: false BeforeElse: false IndentBraces: false - #SplitEmptyFunction: true # Unknown to clang-format-4.0 - #SplitEmptyRecord: true # Unknown to clang-format-4.0 - #SplitEmptyNamespace: true # Unknown to clang-format-4.0 + SplitEmptyFunction: true + SplitEmptyRecord: true + SplitEmptyNamespace: true BreakBeforeBinaryOperators: None BreakBeforeBraces: Custom -#BreakBeforeInheritanceComma: false # Unknown to clang-format-4.0 +BreakBeforeInheritanceComma: false BreakBeforeTernaryOperators: false BreakConstructorInitializersBeforeComma: false -#BreakConstructorInitializers: BeforeComma # Unknown to clang-format-4.0 +BreakConstructorInitializers: BeforeComma BreakAfterJavaFieldAnnotations: false BreakStringLiterals: false ColumnLimit: 80 CommentPragmas: '^ IWYU pragma:' -#CompactNamespaces: false # Unknown to clang-format-4.0 +CompactNamespaces: false ConstructorInitializerAllOnOneLineOrOnePerLine: false ConstructorInitializerIndentWidth: 8 ContinuationIndentWidth: 8 @@ -62,7 +62,7 @@ Cpp11BracedListStyle: false DerivePointerAlignment: false DisableFormat: false ExperimentalAutoDetectBinPacking: false -#FixNamespaceComments: false # Unknown to clang-format-4.0 +FixNamespaceComments: false # Taken from: # while read -r sym; do @@ -118,13 +118,13 @@ ForEachMacros: - 'ndctl_region_foreach' - 'udev_list_entry_foreach' -#IncludeBlocks: Preserve # Unknown to clang-format-5.0 +IncludeBlocks: Preserve IncludeCategories: - Regex: '.*' Priority: 1 IncludeIsMainRegex: '(Test)?$' IndentCaseLabels: false -#IndentPPDirectives: None # Unknown to clang-format-5.0 +IndentPPDirectives: None IndentWidth: 8 IndentWrappedFunctionNames: false JavaScriptQuotes: Leave @@ -134,13 +134,13 @@ MacroBlockBegin: '' MacroBlockEnd: '' MaxEmptyLinesToKeep: 1 NamespaceIndentation: None -#ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0 +ObjCBinPackProtocolList: Auto ObjCBlockIndentWidth: 8 ObjCSpaceAfterProperty: true ObjCSpaceBeforeProtocolList: true # Taken from git's rules -#PenaltyBreakAssignment: 10 # Unknown to clang-format-4.0 +PenaltyBreakAssignment: 10 PenaltyBreakBeforeFirstCallParameter: 30 PenaltyBreakComment: 10 PenaltyBreakFirstLessLess: 0 @@ -151,14 +151,14 @@ PenaltyReturnTypeOnItsOwnLine: 60 PointerAlignment: Right ReflowComments: false SortIncludes: false -#SortUsingDeclarations: false # Unknown to clang-format-4.0 +SortUsingDeclarations: false SpaceAfterCStyleCast: false SpaceAfterTemplateKeyword: true SpaceBeforeAssignmentOperators: true -#SpaceBeforeCtorInitializerColon: true # Unknown to clang-format-5.0 -#SpaceBeforeInheritanceColon: true # Unknown to clang-format-5.0 +SpaceBeforeCtorInitializerColon: true +SpaceBeforeInheritanceColon: true SpaceBeforeParens: ControlStatements -#SpaceBeforeRangeBasedForLoopColon: true # Unknown to clang-format-5.0 +SpaceBeforeRangeBasedForLoopColon: true SpaceInEmptyParentheses: false SpacesBeforeTrailingComments: 1 SpacesInAngles: false From patchwork Sun Nov 6 23:47:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033676 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C978D500 for ; Sun, 6 Nov 2022 23:47:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778430; x=1699314430; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2gU+FCIDMTYBNsSr0cDrPz/tHZPBfxQbmub9NqW4knM=; b=d8Q+bYON2gtFctVKxxteikEOjk90UUSSMFWQkedjFCTOYVsrS4wcpUKf WAFDONfhKQuTNCnEXqMv3VrowTYhoBVqGmF+E0vJ+DjfrFiaj/Ib5q63w /szt1sqVH0oNLCLi5U95l5DxyLt+xCU5x51T5Odj9t9Z9vXVCzUeQccL6 HX4lEWc8HtRCy1V/bXlBeWDlus02bcxS6vNhCV8gcEVF3GcORVIzuDQBt RI77g0PAMPR3yEQgbdP7Cp09UgWKy3UPZOtcErCxkFAr5ohmwsuGCJnaw KnLILvikkWnvNHRoDy6ro0I9kihMynvHsj3282mg9dg58bzryqhES8g4m A==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="311422310" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="311422310" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:09 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="964951379" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="964951379" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:09 -0800 Subject: [ndctl PATCH 04/15] ndctl/clang-format: Fix space after for_each macros From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:47:08 -0800 Message-ID: <166777842874.1238089.4293045826403123016.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Copy the approach taken in the kernel via: commit 781121a7f6d1 ("clang-format: Fix space after for_each macros") Signed-off-by: Dan Williams --- .clang-format | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.clang-format b/.clang-format index f372823c3248..448b7e7211ae 100644 --- a/.clang-format +++ b/.clang-format @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 # -# clang-format configuration file. Intended for clang-format >= 6. +# clang-format configuration file. Intended for clang-format >= 11. # Copied from Linux's .clang-format # # For more information, see: @@ -157,7 +157,7 @@ SpaceAfterTemplateKeyword: true SpaceBeforeAssignmentOperators: true SpaceBeforeCtorInitializerColon: true SpaceBeforeInheritanceColon: true -SpaceBeforeParens: ControlStatements +SpaceBeforeParens: ControlStatementsExceptForEachMacros SpaceBeforeRangeBasedForLoopColon: true SpaceInEmptyParentheses: false SpacesBeforeTrailingComments: 1 From patchwork Sun Nov 6 23:47:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033677 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3032D500 for ; Sun, 6 Nov 2022 23:47:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778435; x=1699314435; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OSg3tRXeh2ljbNLBilzvesOZ52kfpIGevHWDmk6y0Dk=; b=VF0JfVNqQ9WWPHx03/9Yuo32/3GbRo9IKJ5K0/ZDkTwRo/9ZKDtTHRwH m99rRWip5YmPA0IirYXGNStITWr533zdKPhR/VA0zjzTfDQ5s2dknb9tq p/6Il2dA0ExD24Pe5EN7PHK3G5hOQQpcRtUN0uEQy/5VxK4ZqC1/cMOZ9 q8+TkcKtqcrGVmZ/ZNdqf7dgmS95iFLjnFGIrhBTwts4390EVHarKphrv O/kKvGM7tiMuZuBMPtdJrcqLuwxx+TO183D8tLdmGujkk5TJHwx1hIiH1 rp9rhUQVTN19iCEi8q39i5uCO5waR+9SiomP5CMV3/lRdDAsjbs3Qarqr g==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="372407778" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="372407778" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:15 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="964951400" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="964951400" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:14 -0800 Subject: [ndctl PATCH 05/15] cxl/list: Always attempt to collect child objects From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:47:14 -0800 Message-ID: <166777843446.1238089.2906418615142087799.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The evolution of the hierarchical listing left warts like the following: if (p->memdevs && !p->ports && !p->endpoints) { jchilddevs = json_object_new_array(); ...whereby it tried to avoid creating a container for child devices if another container deeper in the hierarchy might supersede the upper-level containers. I.e. if endpoints are included in the listing then there will be nothing to report at the bus level. The protection is unnnecessary because cond_add_put_array_suffix() already handles the case of dropping empty containers when a lower level container subsumes all the objects. Moreover, it's a broken check when adding objects at new levels of the topology. CXL devices attached to an RCH cause memdevs to appear directly beneath a bus object, and not an intervening port. So in preparation for that change, delete all the unnecessary special casing for "jchildobj" container creation. Reported-by: Vishal Verma Fixes: 41d6769393f4 ("cxl/list: Move enabled memdevs underneath their endpoint") Signed-off-by: Dan Williams --- cxl/filter.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/cxl/filter.c b/cxl/filter.c index 56c659965891..040e7deefb3e 100644 --- a/cxl/filter.c +++ b/cxl/filter.c @@ -971,7 +971,7 @@ walk_child_ports(struct cxl_port *parent_port, struct cxl_filter_params *p, continue; } - if (p->memdevs && !p->endpoints) { + if (p->memdevs) { jchilddevs = json_object_new_array(); if (!jchilddevs) { err(p, @@ -1151,7 +1151,7 @@ int cxl_filter_walk(struct cxl_ctx *ctx, struct cxl_filter_params *p) } } - if (p->memdevs && !p->ports && !p->endpoints) { + if (p->memdevs) { jchilddevs = json_object_new_array(); if (!jchilddevs) { err(p, @@ -1169,7 +1169,7 @@ int cxl_filter_walk(struct cxl_ctx *ctx, struct cxl_filter_params *p) continue; } } - if (p->regions && !p->decoders) { + if (p->regions) { jchildregions = json_object_new_array(); if (!jchildregions) { err(p, From patchwork Sun Nov 6 23:47:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033678 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47155D500 for ; Sun, 6 Nov 2022 23:47:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778441; x=1699314441; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/GWlhQQbKeBCJsRRb7NoP0PPinbVtX3YBlZOZiQkzsU=; b=H6yHtaTS4esv2N/N1J6D/TqNDmt2cJcIua4oogAVdSDdQmRxdwuLvNIo rtollx8xt+eiVQ1hA9mCvhvaQXKsivq598JXmQP1fQQiiNEcO3dQrtHHp DZTM2d/5i6NlVqFA3MQ8oF6lXeUIqJLBHZoE++vkZnI0+4CMnF68oOoA2 Drs0CHWE7MfZCjaDp3ihZN+bhBmbGAn0KF14hpRNxp2xOOAwdLLWMCOMl v4tKUmrkJFcBI7+uTbU0eN6keQwDNkWNNbm53jo1w/6Ya5cLnw6El6jlj 7RtiE8QhPNRFwTENIKI2M/saZoX3QWvzQW/D4pfAHdcGXBJEmIpDhssUP A==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="309002417" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="309002417" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:20 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="964951408" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="964951408" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:20 -0800 Subject: [ndctl PATCH 06/15] cxl/list: Skip emitting pmem_size when it is zero From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:47:20 -0800 Message-ID: <166777844020.1238089.5777920571190091563.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The typical case is that CXL devices are pure ram devices. Only emit capacity sizes when they are non-zero to avoid confusion around whether pmem is available via partitioning or not. Do the same for ram_size on the odd case that someone builds a pure pmem device. Signed-off-by: Dan Williams --- cxl/json.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/cxl/json.c b/cxl/json.c index 63c17519aba1..1b1669ab021d 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -305,7 +305,7 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, { const char *devname = cxl_memdev_get_devname(memdev); struct json_object *jdev, *jobj; - unsigned long long serial; + unsigned long long serial, size; int numa_node; jdev = json_object_new_object(); @@ -316,13 +316,19 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, if (jobj) json_object_object_add(jdev, "memdev", jobj); - jobj = util_json_object_size(cxl_memdev_get_pmem_size(memdev), flags); - if (jobj) - json_object_object_add(jdev, "pmem_size", jobj); + size = cxl_memdev_get_pmem_size(memdev); + if (size) { + jobj = util_json_object_size(size, flags); + if (jobj) + json_object_object_add(jdev, "pmem_size", jobj); + } - jobj = util_json_object_size(cxl_memdev_get_ram_size(memdev), flags); - if (jobj) - json_object_object_add(jdev, "ram_size", jobj); + size = cxl_memdev_get_ram_size(memdev); + if (size) { + jobj = util_json_object_size(size, flags); + if (jobj) + json_object_object_add(jdev, "ram_size", jobj); + } if (flags & UTIL_JSON_HEALTH) { jobj = util_cxl_memdev_health_to_json(memdev, flags); From patchwork Sun Nov 6 23:47:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033679 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D265D500 for ; Sun, 6 Nov 2022 23:47:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778447; x=1699314447; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Oo+YDC2MaJSBfiBtU5WPJPPsRqc63yK4zGMMsoyeCMg=; b=g7ppoROFebjvyvNtsaHyoYsj4krvajAByu62jpx150PFphW/RpmLqZRN zW4ICgDfQ5KI3Vi8k65mFjxEBWfzTkHt/TSELYooYee+Onv+qZZ1JKCch wIGk9MB/RonebAb2OrJwtta6a3/EYiXx/A+uB+obJp0aKxr9gbG8/+scU EF3FbU+z3ZEJF/Kbhy8pvbNNiPSYvFfc802uAOHscqfa9+KQgsthysX8/ 7Ccmj0jYD5iOpl9/y979EcxWACeLuCsTcfaHdUV8IzPNx72z6AJPPrMNr NI5PkZCLSVlmhYUU3hyKwQ5dlnnmWx1QwQ12QQGZg0qAjazSHe4gTJ1cn w==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="290680116" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="290680116" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:26 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="964951421" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="964951421" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:26 -0800 Subject: [ndctl PATCH 07/15] cxl/filter: Return json-c topology From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:47:25 -0800 Message-ID: <166777844585.1238089.453902924006914638.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In preparation for cxl_filter_walk() to be used to collect and publish cxl objects for other utilities, return the resulting json_object directly. Move the responsibility of freeing and optionally printing the object to the caller. Signed-off-by: Dan Williams --- cxl/filter.c | 30 ++++++------------------------ cxl/filter.h | 22 +++++++++++++++++++++- cxl/list.c | 7 ++++++- 3 files changed, 33 insertions(+), 26 deletions(-) diff --git a/cxl/filter.c b/cxl/filter.c index 040e7deefb3e..8499450ded01 100644 --- a/cxl/filter.c +++ b/cxl/filter.c @@ -672,23 +672,6 @@ util_cxl_decoder_filter_by_region(struct cxl_decoder *decoder, return decoder; } -static unsigned long params_to_flags(struct cxl_filter_params *param) -{ - unsigned long flags = 0; - - if (param->idle) - flags |= UTIL_JSON_IDLE; - if (param->human) - flags |= UTIL_JSON_HUMAN; - if (param->health) - flags |= UTIL_JSON_HEALTH; - if (param->targets) - flags |= UTIL_JSON_TARGETS; - if (param->partition) - flags |= UTIL_JSON_PARTITION; - return flags; -} - static void splice_array(struct cxl_filter_params *p, struct json_object *jobjs, struct json_object *platform, const char *container_name, bool do_container) @@ -1027,11 +1010,12 @@ walk_children: } } -int cxl_filter_walk(struct cxl_ctx *ctx, struct cxl_filter_params *p) +struct json_object *cxl_filter_walk(struct cxl_ctx *ctx, + struct cxl_filter_params *p) { struct json_object *jdevs = NULL, *jbuses = NULL, *jports = NULL; struct json_object *jplatform = json_object_new_array(); - unsigned long flags = params_to_flags(p); + unsigned long flags = cxl_filter_to_flags(p); struct json_object *jportdecoders = NULL; struct json_object *jbusdecoders = NULL; struct json_object *jepdecoders = NULL; @@ -1044,7 +1028,7 @@ int cxl_filter_walk(struct cxl_ctx *ctx, struct cxl_filter_params *p) if (!jplatform) { dbg(p, "platform object allocation failure\n"); - return -ENOMEM; + return NULL; } janondevs = json_object_new_array(); @@ -1232,9 +1216,7 @@ walk_children: top_level_objs > 1); splice_array(p, jregions, jplatform, "regions", top_level_objs > 1); - util_display_json_array(stdout, jplatform, flags); - - return 0; + return jplatform; err: json_object_put(janondevs); json_object_put(jbuses); @@ -1246,5 +1228,5 @@ err: json_object_put(jepdecoders); json_object_put(jregions); json_object_put(jplatform); - return -ENOMEM; + return NULL; } diff --git a/cxl/filter.h b/cxl/filter.h index 256df49c3d0c..2bda6ddd77ca 100644 --- a/cxl/filter.h +++ b/cxl/filter.h @@ -5,6 +5,7 @@ #include #include +#include struct cxl_filter_params { const char *memdev_filter; @@ -59,6 +60,25 @@ struct cxl_dport *util_cxl_dport_filter_by_memdev(struct cxl_dport *dport, const char *serial); struct cxl_decoder *util_cxl_decoder_filter(struct cxl_decoder *decoder, const char *__ident); -int cxl_filter_walk(struct cxl_ctx *ctx, struct cxl_filter_params *param); +struct json_object *cxl_filter_walk(struct cxl_ctx *ctx, + struct cxl_filter_params *param); + +static inline unsigned long cxl_filter_to_flags(struct cxl_filter_params *param) +{ + unsigned long flags = 0; + + if (param->idle) + flags |= UTIL_JSON_IDLE; + if (param->human) + flags |= UTIL_JSON_HUMAN; + if (param->health) + flags |= UTIL_JSON_HEALTH; + if (param->targets) + flags |= UTIL_JSON_TARGETS; + if (param->partition) + flags |= UTIL_JSON_PARTITION; + return flags; +} + bool cxl_filter_has(const char *needle, const char *__filter); #endif /* _CXL_UTIL_FILTER_H_ */ diff --git a/cxl/list.c b/cxl/list.c index 8c48fbbaaec3..2026de2b548b 100644 --- a/cxl/list.c +++ b/cxl/list.c @@ -72,6 +72,7 @@ int cmd_list(int argc, const char **argv, struct cxl_ctx *ctx) "cxl list []", NULL }; + struct json_object *jtopology; int i; argc = parse_options(argc, argv, options, u, 0); @@ -140,5 +141,9 @@ int cmd_list(int argc, const char **argv, struct cxl_ctx *ctx) param.endpoints = true; dbg(¶m, "walk topology\n"); - return cxl_filter_walk(ctx, ¶m); + jtopology = cxl_filter_walk(ctx, ¶m); + if (!jtopology) + return -ENOMEM; + util_display_json_array(stdout, jtopology, cxl_filter_to_flags(¶m)); + return 0; } From patchwork Sun Nov 6 23:47:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033680 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD9C1D500 for ; Sun, 6 Nov 2022 23:47:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778452; 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06 Nov 2022 15:47:32 -0800 Subject: [ndctl PATCH 08/15] cxl/list: Record cxl objects in json objects From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:47:31 -0800 Message-ID: <166777845158.1238089.3583136384580175866.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In preparation for reusing 'cxl list' object selection in other utilities, like 'cxl create-region', record the associated cxl object in the json object. For example, enable 'cxl create-region -d decoderX.Y' to lookup the memdevs that result from 'cxl list -M -d decoderX.Y'. This sets up future design decisions for code that wants to walk the topology. It can either open-code its own object walk, or get the json-c representation of a query and use that. Unless the use case knows exactly the object it wants it is likely more powerful to specify a cxl_filter_walk() query and then walk the topology result. Signed-off-by: Dan Williams --- cxl/json.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/cxl/json.c b/cxl/json.c index 1b1669ab021d..9264f5fcb21e 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -365,6 +365,8 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, if (jobj) json_object_object_add(jdev, "partition_info", jobj); } + + json_object_set_userdata(jdev, memdev, NULL); return jdev; } @@ -416,6 +418,7 @@ void util_cxl_dports_append_json(struct json_object *jport, json_object_object_add(jdport, "id", jobj); json_object_array_add(jdports, jdport); + json_object_set_userdata(jdport, dport, NULL); } json_object_object_add(jport, "dports", jdports); @@ -439,6 +442,7 @@ struct json_object *util_cxl_bus_to_json(struct cxl_bus *bus, if (jobj) json_object_object_add(jbus, "provider", jobj); + json_object_set_userdata(jbus, bus, NULL); return jbus; } @@ -563,6 +567,7 @@ struct json_object *util_cxl_decoder_to_json(struct cxl_decoder *decoder, jobj); } + json_object_set_userdata(jdecoder, decoder, NULL); return jdecoder; } @@ -621,6 +626,7 @@ void util_cxl_mappings_append_json(struct json_object *jregion, json_object_object_add(jmapping, "decoder", jobj); json_object_array_add(jmappings, jmapping); + json_object_set_userdata(jmapping, mapping, NULL); } json_object_object_add(jregion, "mappings", jmappings); @@ -686,6 +692,7 @@ struct json_object *util_cxl_region_to_json(struct cxl_region *region, util_cxl_mappings_append_json(jregion, region, flags); + json_object_set_userdata(jregion, region, NULL); return jregion; } @@ -751,6 +758,7 @@ void util_cxl_targets_append_json(struct json_object *jdecoder, json_object_object_add(jtarget, "id", jobj); json_object_array_add(jtargets, jtarget); + json_object_set_userdata(jtarget, target, NULL); } json_object_object_add(jdecoder, "targets", jtargets); @@ -785,6 +793,7 @@ static struct json_object *__util_cxl_port_to_json(struct cxl_port *port, json_object_object_add(jport, "state", jobj); } + json_object_set_userdata(jport, port, NULL); return jport; } From patchwork Sun Nov 6 23:47:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033681 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E582D500 for ; Sun, 6 Nov 2022 23:47:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778459; x=1699314459; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NJHZn6/cXtZFPw8koUObH+vbAw1TMznWvoJVYXV7BeE=; b=V6uvxHqxpVFh3ZBnPIg1m2yOSqRcV1fj0ntDo4VRwJbsw28k+VFbdjum 5wkz1xGNZ5/FfZuDOicSJfNSyoSRP2m7dSBaki9Ikvmo20Uu1mlHHgMxO n6bTMGQrjqqsCrQ4ZvNQWxoCoZPxllKdNZ8jWQqqCKrmHQ0as1YX0wz/j AY7u6OTo1Nmo1+JHy1x0p9gGNh8kFM5SEDfmZBEpbW2WWcBkFvy3cF0JF FGf0D342V89/4obse6tfM/mxxkdCTALQyr3pNs6qjVDB4jaGcQuFNihE0 nmoPDycCuiXgDfyVnBH6JNoXGD0E3YaRi26wiHo4HwzpHzZNNSCSCMc5y Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="337007957" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="337007957" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:38 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="704674769" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="704674769" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:37 -0800 Subject: [ndctl PATCH 09/15] cxl/region: Make ways an integer argument From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:47:37 -0800 Message-ID: <166777845733.1238089.4849744927692588680.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Since --ways does not take a unit value like --size, just make it an integer argument directly and skip the hand coded conversion. Signed-off-by: Dan Williams --- cxl/region.c | 41 +++++++++++++++++++---------------------- 1 file changed, 19 insertions(+), 22 deletions(-) diff --git a/cxl/region.c b/cxl/region.c index 334fcc291de7..494da5139c05 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -21,21 +21,23 @@ static struct region_params { const char *bus; const char *size; - const char *ways; const char *granularity; const char *type; const char *root_decoder; const char *region; + int ways; bool memdevs; bool force; bool human; bool debug; -} param; +} param = { + .ways = INT_MAX, +}; struct parsed_params { u64 size; u64 ep_min_size; - unsigned int ways; + int ways; unsigned int granularity; const char **targets; int num_targets; @@ -63,9 +65,8 @@ OPT_BOOLEAN(0, "debug", ¶m.debug, "turn on debug") OPT_STRING('s', "size", ¶m.size, \ "size in bytes or with a K/M/G etc. suffix", \ "total size desired for the resulting region."), \ -OPT_STRING('w', "ways", ¶m.ways, \ - "number of interleave ways", \ - "number of memdevs participating in the regions interleave set"), \ +OPT_INTEGER('w', "ways", ¶m.ways, \ + "number of memdevs participating in the regions interleave set"), \ OPT_STRING('g', "granularity", \ ¶m.granularity, "interleave granularity", \ "granularity of the interleave set"), \ @@ -126,15 +127,11 @@ static int parse_create_options(int argc, const char **argv, } } - if (param.ways) { - unsigned long ways = strtoul(param.ways, NULL, 0); - - if (ways == ULONG_MAX || (int)ways <= 0) { - log_err(&rl, "Invalid interleave ways: %s\n", - param.ways); - return -EINVAL; - } - p->ways = ways; + if (param.ways <= 0) { + log_err(&rl, "Invalid interleave ways: %d\n", param.ways); + return -EINVAL; + } else if (param.ways < INT_MAX) { + p->ways = param.ways; } else if (argc) { p->ways = argc; } else { @@ -155,13 +152,13 @@ static int parse_create_options(int argc, const char **argv, } - if (argc > (int)p->ways) { + if (argc > p->ways) { for (i = p->ways; i < argc; i++) log_err(&rl, "extra argument: %s\n", p->targets[i]); return -EINVAL; } - if (argc < (int)p->ways) { + if (argc < p->ways) { log_err(&rl, "too few target arguments (%d) for interleave ways (%u)\n", argc, p->ways); @@ -253,7 +250,7 @@ static bool validate_memdev(struct cxl_memdev *memdev, const char *target, static int validate_config_memdevs(struct cxl_ctx *ctx, struct parsed_params *p) { - unsigned int i, matched = 0; + int i, matched = 0; for (i = 0; i < p->ways; i++) { struct cxl_memdev *memdev; @@ -393,7 +390,8 @@ static int cxl_region_determine_granularity(struct cxl_region *region, struct parsed_params *p) { const char *devname = cxl_region_get_devname(region); - unsigned int granularity, ways; + unsigned int granularity; + int ways; /* Default granularity will be the root decoder's granularity */ granularity = cxl_decoder_get_interleave_granularity(p->root_decoder); @@ -408,7 +406,7 @@ static int cxl_region_determine_granularity(struct cxl_region *region, return granularity; ways = cxl_decoder_get_interleave_ways(p->root_decoder); - if (ways == 0 || ways == UINT_MAX) { + if (ways == 0 || ways == -1) { log_err(&rl, "%s: unable to determine root decoder ways\n", devname); return -ENXIO; @@ -436,12 +434,11 @@ static int create_region(struct cxl_ctx *ctx, int *count, { unsigned long flags = UTIL_JSON_TARGETS; struct json_object *jregion; - unsigned int i, granularity; struct cxl_region *region; + int i, rc, granularity; u64 size, max_extent; const char *devname; uuid_t uuid; - int rc; rc = create_region_validate_config(ctx, p); if (rc) From patchwork Sun Nov 6 23:47:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033682 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A891FD500 for ; Sun, 6 Nov 2022 23:47:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778464; x=1699314464; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wH0kGeai/cpvOxG0zFKnev7rIw6TBDR69wboanX1i7Q=; b=GgvHS5cJmQ4i8zhlh9zWXHzmYoyQDquubXfGURgIJejUbqvzjoMR0+lq 4PcATOUfW0pWrPJ8/u/bCci6uzzXUVScWkASHCxHUprj05jl0i68ehk0m cqn2f8uLC4426/aGG/J8J3MDe4zAcykBaL/8Ar077x3U29r1GAvqQLHCk 9TvWL5ccGcAb33EaKGIKqzKk1YK56GUlei4L+GBMIWA5buOPY1GYtoaCo Lh2NndkT9rqJl3/9/xpSWyZF3uU91/jigy7OlpfDJD0hVPL4dW9BDpi8m XZbjpBALk9aLTBV6WY4yrVRpIAsty96GZ7u3fECzJ3Xoo7yDq1w1lKsYF w==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="307916112" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="307916112" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:44 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="704674795" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="704674795" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:43 -0800 Subject: [ndctl PATCH 10/15] cxl/region: Make granularity an integer argument From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:47:43 -0800 Message-ID: <166777846318.1238089.17514328437318093896.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Since --granularity does not take a unit value like --size, just make it an integer argument directly and skip the hand coded conversion. Signed-off-by: Dan Williams --- cxl/region.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/cxl/region.c b/cxl/region.c index 494da5139c05..c6d7d1a973a8 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -21,24 +21,25 @@ static struct region_params { const char *bus; const char *size; - const char *granularity; const char *type; const char *root_decoder; const char *region; int ways; + int granularity; bool memdevs; bool force; bool human; bool debug; } param = { .ways = INT_MAX, + .granularity = INT_MAX, }; struct parsed_params { u64 size; u64 ep_min_size; int ways; - unsigned int granularity; + int granularity; const char **targets; int num_targets; struct cxl_decoder *root_decoder; @@ -67,9 +68,8 @@ OPT_STRING('s', "size", ¶m.size, \ "total size desired for the resulting region."), \ OPT_INTEGER('w', "ways", ¶m.ways, \ "number of memdevs participating in the regions interleave set"), \ -OPT_STRING('g', "granularity", \ - ¶m.granularity, "interleave granularity", \ - "granularity of the interleave set"), \ +OPT_INTEGER('g', "granularity", ¶m.granularity, \ + "granularity of the interleave set"), \ OPT_STRING('t', "type", ¶m.type, \ "region type", "region type - 'pmem' or 'ram'"), \ OPT_BOOLEAN('m', "memdevs", ¶m.memdevs, \ @@ -140,18 +140,15 @@ static int parse_create_options(int argc, const char **argv, return -EINVAL; } - if (param.granularity) { - unsigned long granularity = strtoul(param.granularity, NULL, 0); - - if (granularity == ULONG_MAX || (int)granularity <= 0) { - log_err(&rl, "Invalid interleave granularity: %s\n", + if (param.granularity < INT_MAX) { + if (param.granularity <= 0) { + log_err(&rl, "Invalid interleave granularity: %d\n", param.granularity); return -EINVAL; } - p->granularity = granularity; + p->granularity = param.granularity; } - if (argc > p->ways) { for (i = p->ways; i < argc; i++) log_err(&rl, "extra argument: %s\n", p->targets[i]); @@ -390,12 +387,11 @@ static int cxl_region_determine_granularity(struct cxl_region *region, struct parsed_params *p) { const char *devname = cxl_region_get_devname(region); - unsigned int granularity; - int ways; + int granularity, ways; /* Default granularity will be the root decoder's granularity */ granularity = cxl_decoder_get_interleave_granularity(p->root_decoder); - if (granularity == 0 || granularity == UINT_MAX) { + if (granularity == 0 || granularity == -1) { log_err(&rl, "%s: unable to determine root decoder granularity\n", devname); return -ENXIO; From patchwork Sun Nov 6 23:47:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033683 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AFD5DD500 for ; Sun, 6 Nov 2022 23:47:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778470; x=1699314470; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bzZr4dL1F6gT/wTf5l6v9YpZdVcDaTSmB6t+YqArAUo=; b=h3uPAYYA2i1ro2l6mQznoPqZj065AkjYQsSWztd3X5LJ13O2OAA08f7F ktG6p5UqMyXFXp1IKD/ZOL+cpKcQS4GQuzzsgzHvzxillmve5+I+ARSnn 5yf/hf3GAmPBk6dWh0JRD4S+85zmCp14/hd9nSTpO6Mkofd3YF7DZBZNE uAg5bgaiCpWgByi6U72ofE81T8TcweIQYLJcjhsthHMXDfAPAp9M1OoPL ImFVirNaiN67UqGnKQtz4iX4P6v0O62G8xV4LsFL+3MQdA2cBV/bB63e2 /19zk38ldkYChOk7FIcJqvuv3Z92GKefaE4YUVbB7mOpPFK1uns+lF9aX g==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="374541117" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="374541117" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:50 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="704674824" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="704674824" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:49 -0800 Subject: [ndctl PATCH 11/15] cxl/region: Use cxl_filter_walk() to gather create-region targets From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:47:49 -0800 Message-ID: <166777846906.1238089.13466320510516058152.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The core of 'cxl list' knows, among other things, how to filter memdevs by their connectivity to a root decoder, enabled status, and how to identify memdevs by name, id, serial number. Use the fact that the json-c object array returned by cxl_filter_walk() also includes the corresponding libcxl objects to populate and validate the memdev target list for 'cxl create-region'. With this in place a default set of memdev targets can be derived from the specified root decoder, and the connectivity is validated by the same logic that prepares the hierarchical json topology. The argument list becomes as tolerant of different id formats as 'cxl list'. For example "mem9" and "9" are equivalent. Comma separated lists are also allowed, e.g. "mem9,mem10". However the sorting of memdevs by filter position falls back to the 'cxl list' order in that case. In other words: arg order region position mem9 mem10 => [0]: mem9 [1]: mem10 mem10 mem9 => [0]: mem10 [1]: mem9 mem9,mem10 => [0]: mem9 [1]: mem10 mem10,mem9 => [0]: mem9 [1]: mem10 Note that 'cxl list' order groups memdevs by port, later this will need to augmented with a sort implementation that orders memdevs by a topology compatible decode order. Signed-off-by: Dan Williams --- cxl/region.c | 274 +++++++++++++++++++++++++++++++++++++--------------------- 1 file changed, 175 insertions(+), 99 deletions(-) diff --git a/cxl/region.c b/cxl/region.c index c6d7d1a973a8..e47709754447 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -40,8 +40,10 @@ struct parsed_params { u64 ep_min_size; int ways; int granularity; - const char **targets; - int num_targets; + struct json_object *memdevs; + int num_memdevs; + int argc; + const char **argv; struct cxl_decoder *root_decoder; enum cxl_decoder_mode mode; }; @@ -99,16 +101,148 @@ static const struct option destroy_options[] = { OPT_END(), }; -static int parse_create_options(int argc, const char **argv, - struct parsed_params *p) +/* + * Convert an array of strings into a single comma-separated-value + * string that can be passed as a single 'filter' string to + * cxl_filter_walk() + */ +static const char *to_csv(int count, const char **strings) { + ssize_t len = count + 1, cursor = 0; + char *csv; int i; + if (!count) + return NULL; + + for (i = 0; i < count; i++) + len += strlen(strings[i]); + csv = calloc(1, len); + if (!csv) + return NULL; + for (i = 0; i < count; i++) { + cursor += snprintf(csv + cursor, len - cursor, "%s%s", + strings[i], i + 1 < count ? "," : ""); + if (cursor >= len) { + csv[len] = 0; + break; + } + } + return csv; +} + +static struct sort_context { + int count; + const char **sort; +} sort_context; + +static int memdev_filter_pos(struct json_object *jobj, int count, const char **sort) +{ + struct cxl_memdev *memdev = json_object_get_userdata(jobj); + int pos; + + for (pos = 0; pos < count; pos++) + if (util_cxl_memdev_filter(memdev, sort[pos], NULL)) + return pos; + return count; +} + +static int memdev_sort(const void *a, const void *b) +{ + int a_pos, b_pos, count = sort_context.count; + const char **sort = sort_context.sort; + struct json_object **a_obj, **b_obj; + + a_obj = (struct json_object **) a; + b_obj = (struct json_object **) b; + + a_pos = memdev_filter_pos(*a_obj, count, sort); + b_pos = memdev_filter_pos(*b_obj, count, sort); + + return a_pos - b_pos; +} + +static struct json_object *collect_memdevs(struct cxl_ctx *ctx, + const char *decoder, int count, + const char **mems) +{ + const char *csv = to_csv(count, mems); + struct cxl_filter_params filter_params = { + .decoder_filter = decoder, + .memdevs = true, + .memdev_filter = csv, + }; + struct json_object *jmemdevs; + + jmemdevs = cxl_filter_walk(ctx, &filter_params); + + if (!jmemdevs) { + log_err(&rl, "failed to retrieve memdevs\n"); + goto out; + } + + if (json_object_array_length(jmemdevs) == 0) { + log_err(&rl, + "no active memdevs found: decoder: %s filter: %s\n", + decoder, csv ? csv : "none"); + json_object_put(jmemdevs); + jmemdevs = NULL; + goto out; + } + + sort_context = (struct sort_context){ + .count = count, + .sort = mems, + }; + json_object_array_sort(jmemdevs, memdev_sort); + +out: + free((void *)csv); + return jmemdevs; +} + +static bool validate_ways(struct parsed_params *p, int count) +{ + /* + * Validate interleave ways against targets found in the topology. If + * the targets were specified, then non-default param.ways must equal + * that number of targets. + */ + if (p->ways > p->num_memdevs || (count && p->ways != p->num_memdevs)) { + log_err(&rl, + "Interleave ways %d is %s than number of memdevs %s: %d\n", + p->ways, p->ways > p->num_memdevs ? "greater" : "less", + count ? "specified" : "found", p->num_memdevs); + return false; + } + return true; +} + +static int parse_create_options(struct cxl_ctx *ctx, int count, + const char **mems, struct parsed_params *p) +{ if (!param.root_decoder) { log_err(&rl, "no root decoder specified\n"); return -EINVAL; } + /* + * For all practical purposes, -m is the default target type, but + * hold off on actively making that decision until a second target + * option is available. + */ + if (!param.memdevs) { + log_err(&rl, + "must specify option for target object types (-m)\n"); + return -EINVAL; + } + + /* Collect the valid memdevs relative to the given root decoder */ + p->memdevs = collect_memdevs(ctx, param.root_decoder, count, mems); + if (!p->memdevs) + return -ENXIO; + p->num_memdevs = json_object_array_length(p->memdevs); + if (param.type) { p->mode = cxl_decoder_mode_from_ident(param.type); if (p->mode == CXL_DECODER_MODE_NONE) { @@ -132,8 +266,12 @@ static int parse_create_options(int argc, const char **argv, return -EINVAL; } else if (param.ways < INT_MAX) { p->ways = param.ways; - } else if (argc) { - p->ways = argc; + if (!validate_ways(p, count)) + return -EINVAL; + } else if (count) { + p->ways = count; + if (!validate_ways(p, count)) + return -EINVAL; } else { log_err(&rl, "couldn't determine interleave ways from options or arguments\n"); @@ -149,19 +287,6 @@ static int parse_create_options(int argc, const char **argv, p->granularity = param.granularity; } - if (argc > p->ways) { - for (i = p->ways; i < argc; i++) - log_err(&rl, "extra argument: %s\n", p->targets[i]); - return -EINVAL; - } - - if (argc < p->ways) { - log_err(&rl, - "too few target arguments (%d) for interleave ways (%u)\n", - argc, p->ways); - return -EINVAL; - } - if (p->size && p->ways) { if (p->size % p->ways) { log_err(&rl, @@ -171,17 +296,6 @@ static int parse_create_options(int argc, const char **argv, } } - /* - * For all practical purposes, -m is the default target type, but - * hold off on actively making that decision until a second target - * option is available. - */ - if (!param.memdevs) { - log_err(&rl, - "must specify option for target object types (-m)\n"); - return -EINVAL; - } - return 0; } @@ -196,8 +310,8 @@ static int parse_region_options(int argc, const char **argv, }; argc = parse_options(argc, argv, options, u, 0); - p->targets = argv; - p->num_targets = argc; + p->argc = argc; + p->argv = argv; if (param.debug) { cxl_set_log_priority(ctx, LOG_DEBUG); @@ -207,62 +321,27 @@ static int parse_region_options(int argc, const char **argv, switch(action) { case ACTION_CREATE: - return parse_create_options(argc, argv, p); + return parse_create_options(ctx, argc, argv, p); default: return 0; } } -/** - * validate_memdev() - match memdev with the target provided, - * and determine its size contribution - * @memdev: cxl_memdev being tested for a match against the named target - * @target: target memdev - * @p: params structure - * - * This is called for each memdev in the system, and only returns 'true' if - * the memdev name matches the target argument being tested. Additionally, - * it sets an ep_min_size attribute that always contains the size of the - * smallest target in the provided list. This is used during the automatic - * size determination later, to ensure that all targets contribute equally - * to the region in case of unevenly sized memdevs. - */ -static bool validate_memdev(struct cxl_memdev *memdev, const char *target, - struct parsed_params *p) +static void collect_minsize(struct cxl_ctx *ctx, struct parsed_params *p) { - const char *devname = cxl_memdev_get_devname(memdev); - u64 size; - - if (strcmp(devname, target) != 0) - return false; - - size = cxl_memdev_get_pmem_size(memdev); - if (!p->ep_min_size) - p->ep_min_size = size; - else - p->ep_min_size = min(p->ep_min_size, size); - - return true; -} - -static int validate_config_memdevs(struct cxl_ctx *ctx, struct parsed_params *p) -{ - int i, matched = 0; + int i; for (i = 0; i < p->ways; i++) { - struct cxl_memdev *memdev; + struct json_object *jobj = + json_object_array_get_idx(p->memdevs, i); + struct cxl_memdev *memdev = json_object_get_userdata(jobj); + u64 size = cxl_memdev_get_pmem_size(memdev); - cxl_memdev_foreach(ctx, memdev) - if (validate_memdev(memdev, p->targets[i], p)) - matched++; + if (!p->ep_min_size) + p->ep_min_size = size; + else + p->ep_min_size = min(p->ep_min_size, size); } - if (matched != p->ways) { - log_err(&rl, - "one or more memdevs not found in CXL topology\n"); - return -ENXIO; - } - - return 0; } static int validate_decoder(struct cxl_decoder *decoder, @@ -330,26 +409,18 @@ found: if (rc) return rc; - return validate_config_memdevs(ctx, p); + collect_minsize(ctx, p); + return 0; } -static struct cxl_decoder * -cxl_memdev_target_find_decoder(struct cxl_ctx *ctx, const char *memdev_name) +static struct cxl_decoder *cxl_memdev_find_decoder(struct cxl_memdev *memdev) { - struct cxl_endpoint *ep = NULL; + const char *memdev_name = cxl_memdev_get_devname(memdev); struct cxl_decoder *decoder; - struct cxl_memdev *memdev; + struct cxl_endpoint *ep; struct cxl_port *port; - cxl_memdev_foreach(ctx, memdev) { - const char *devname = cxl_memdev_get_devname(memdev); - - if (strcmp(devname, memdev_name) != 0) - continue; - - ep = cxl_memdev_get_endpoint(memdev); - } - + ep = cxl_memdev_get_endpoint(memdev); if (!ep) { log_err(&rl, "could not get an endpoint for %s\n", memdev_name); @@ -488,9 +559,12 @@ static int create_region(struct cxl_ctx *ctx, int *count, try(cxl_region, set_size, region, size); for (i = 0; i < p->ways; i++) { - struct cxl_decoder *ep_decoder = NULL; + struct cxl_decoder *ep_decoder; + struct json_object *jobj = + json_object_array_get_idx(p->memdevs, i); + struct cxl_memdev *memdev = json_object_get_userdata(jobj); - ep_decoder = cxl_memdev_target_find_decoder(ctx, p->targets[i]); + ep_decoder = cxl_memdev_find_decoder(memdev); if (!ep_decoder) { rc = -ENXIO; goto err_delete; @@ -508,7 +582,7 @@ static int create_region(struct cxl_ctx *ctx, int *count, rc = cxl_region_set_target(region, i, ep_decoder); if (rc) { log_err(&rl, "%s: failed to set target%d to %s\n", - devname, i, p->targets[i]); + devname, i, cxl_memdev_get_devname(memdev)); goto err_delete; } } @@ -630,8 +704,8 @@ static int decoder_region_action(struct parsed_params *p, cxl_region_foreach_safe (decoder, region, _r) { int i, match = 0; - for (i = 0; i < p->num_targets; i++) { - if (util_cxl_region_filter(region, p->targets[i])) { + for (i = 0; i < p->argc; i++) { + if (util_cxl_region_filter(region, p->argv[i])) { match = 1; break; } @@ -664,8 +738,10 @@ static int region_action(int argc, const char **argv, struct cxl_ctx *ctx, if (rc) return rc; - if (action == ACTION_CREATE) - return create_region(ctx, count, p); + if (action == ACTION_CREATE) { + rc = create_region(ctx, count, p); + json_object_put(p->memdevs); + } cxl_bus_foreach(ctx, bus) { struct cxl_decoder *decoder; From patchwork Sun Nov 6 23:47:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033684 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95323D500 for ; Sun, 6 Nov 2022 23:47:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778476; x=1699314476; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ELT0+xvIisPQWkCqrQz9cMzSAP++RyuBgUCuYPEldoc=; b=RiN5tjFXP93olACSUO8BF9D9oS+2Q07VZecX7cj3aj/EoMgwM+gmGT7n weM8/irK0hxClFayFky1fnc+G+zh/8ltBm8FOWem/96/jv+O8/bKXJ50g eGQJhXmG2YXcUuO9+UT8HCnI0hgfGX7D4axTdHsGoEgJIXN2iVq3P75K8 4QqW/D11eKX9sTWuhBABmzvC4p96TtJDScC/CzXKuvR+pORzdA2No28gj 81puhYvqoNwQI+yjmQFefUpxUizbTxD/IEX7oQZnn5qO/vam0beqDhR9K Gi5v5ganESNTjTvs3pt/7+clxqvvuuc7Wg0PGcb3hKyGARgVmTUF+LtvI A==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="307916125" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="307916125" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:56 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="704674844" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="704674844" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:47:55 -0800 Subject: [ndctl PATCH 12/15] cxl/region: Trim region size by max available extent From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:47:55 -0800 Message-ID: <166777847500.1238089.17251605673776696142.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 When a size is not specified, limit the size to either the available DPA capacity, or the max available extent in the root decoder, whichever is smaller. Signed-off-by: Dan Williams --- cxl/region.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/cxl/region.c b/cxl/region.c index e47709754447..aa0735194fa1 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -502,6 +502,7 @@ static int create_region(struct cxl_ctx *ctx, int *count, unsigned long flags = UTIL_JSON_TARGETS; struct json_object *jregion; struct cxl_region *region; + bool default_size = true; int i, rc, granularity; u64 size, max_extent; const char *devname; @@ -513,6 +514,7 @@ static int create_region(struct cxl_ctx *ctx, int *count, if (p->size) { size = p->size; + default_size = false; } else if (p->ep_min_size) { size = p->ep_min_size * p->ways; } else { @@ -525,13 +527,16 @@ static int create_region(struct cxl_ctx *ctx, int *count, cxl_decoder_get_devname(p->root_decoder)); return -EINVAL; } - if (size > max_extent) { + if (!default_size && size > max_extent) { log_err(&rl, "%s: region size %#lx exceeds max available space\n", cxl_decoder_get_devname(p->root_decoder), size); return -ENOSPC; } + if (size > max_extent) + size = ALIGN_DOWN(max_extent, SZ_256M * p->ways); + if (p->mode == CXL_DECODER_MODE_PMEM) { region = cxl_decoder_create_pmem_region(p->root_decoder); if (!region) { From patchwork Sun Nov 6 23:48:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033685 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F1C0D500 for ; Sun, 6 Nov 2022 23:48:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778482; x=1699314482; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=m3Y9wevBdrZle9FG1ih1WNj+BAi/g7XVzrgCeUPT/HA=; b=FXf3u24vuFIsFGzbCTLJtCRWQoWXpsuxsJdLEiqKiKPtxDFwYeXaLBoQ K7qV7FQc7ByztvTUF07WMy9iLlFCFWMHclnW9pQZGjoldJsFrU39MCVKp RRbbynYX7d3niOSpkwW41yt4BhBQOOuJaTzuuUmAUa2b+3B21Cvopmfkc PQph7K5GlW6gQVeXTE4t8qAR1lbxpZEoQpk4IUZWtqzaxLfi8Jt/Ydv5n R5xZM9QyPHq9Yi6yh8+A5nDM0hFpJ8Eg9WxG5dyZHHogWgn4gZJPmBWQK EOhyFgLZMyqiyNRRGmB29XhEi7BTw7uqWMdXwIPvAopgj6UW0ZBReySLp g==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="290680165" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="290680165" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:48:02 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="704674867" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="704674867" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:48:01 -0800 Subject: [ndctl PATCH 13/15] cxl/region: Default to memdev mode for create with no arguments From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:48:01 -0800 Message-ID: <166777848122.1238089.2150948506074701593.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Allow for: cxl create-region -d decoderX.Y ...to assume (-m -w $(count of memdevs beneath decoderX.Y)) Signed-off-by: Dan Williams --- cxl/region.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/cxl/region.c b/cxl/region.c index aa0735194fa1..c0cf4ab350da 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -227,10 +227,13 @@ static int parse_create_options(struct cxl_ctx *ctx, int count, } /* - * For all practical purposes, -m is the default target type, but - * hold off on actively making that decision until a second target - * option is available. + * For all practical purposes, -m is the default target type, but hold + * off on actively making that decision until a second target option is + * available. Unless there are no arguments then just assume memdevs. */ + if (!count) + param.memdevs = true; + if (!param.memdevs) { log_err(&rl, "must specify option for target object types (-m)\n"); @@ -272,11 +275,8 @@ static int parse_create_options(struct cxl_ctx *ctx, int count, p->ways = count; if (!validate_ways(p, count)) return -EINVAL; - } else { - log_err(&rl, - "couldn't determine interleave ways from options or arguments\n"); - return -EINVAL; - } + } else + p->ways = p->num_memdevs; if (param.granularity < INT_MAX) { if (param.granularity <= 0) { From patchwork Sun Nov 6 23:48:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033686 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C0C6D500 for ; Sun, 6 Nov 2022 23:48:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778488; x=1699314488; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uHF4kHUiDLdEGXoKPH1GQDDdXLqRw/iHWnfJ4FfHogc=; b=MUQDUbLji3eTXezOmWT8qZAs+A1LKQ9MwfWrhgKw8X+OdQ39C4/RC6ou A86akgChiQpM2MK667FUNVYJFnSzmSKodhzv2uzcPHLdES4bl7OUhBbp+ 012FQtTDTnYwl1aTZrIl3hYwjFMR/yUcpSQizMG431D1xXMn2WQJAea/A /t8IGqLzbYbKL260CLru69hKrnqtPJPh+HtICbQjb4/n6QLvuzy1wQYJw WyU2ICW9ESMTqmBFyurLz3pRiKVj/ch0cgIbLo+eRwa7K3nU6SWcTyS3F /hZtvwrreS9hof1ZO/fy8d8UBXG4bwfTvYhRBA1IdZ891xx5dUo2QOKKM g==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="312052653" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="312052653" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:48:08 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="880867230" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="880867230" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:48:07 -0800 Subject: [ndctl PATCH 14/15] cxl/test: Extend cxl-topology.sh for a single root-port host-bridge From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:48:07 -0800 Message-ID: <166777848711.1238089.14027431355477472365.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 A recent extension of cxl_test adds 2 memory devices attached through a switch to a single ported host-bridge to reproduce a bug report. Reported-by: Jonathan Cameron Link: http://lore.kernel.org/r/20221010172057.00001559@huawei.com Signed-off-by: Dan Williams Tested-by: Alison Schofield --- test/cxl-topology.sh | 48 +++++++++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 19 deletions(-) diff --git a/test/cxl-topology.sh b/test/cxl-topology.sh index 1f15d29f0600..f1e0a2b01e98 100644 --- a/test/cxl-topology.sh +++ b/test/cxl-topology.sh @@ -29,27 +29,30 @@ count=$(jq "length" <<< $json) root=$(jq -r ".[] | .bus" <<< $json) -# validate 2 host bridges under a root port +# validate 2 or 3 host bridges under a root port port_sort="sort_by(.port | .[4:] | tonumber)" json=$($CXL list -b cxl_test -BP) count=$(jq ".[] | .[\"ports:$root\"] | length" <<< $json) -((count == 2)) || err "$LINENO" +((count == 2)) || ((count == 3)) || err "$LINENO" +bridges=$count bridge[0]=$(jq -r ".[] | .[\"ports:$root\"] | $port_sort | .[0].port" <<< $json) bridge[1]=$(jq -r ".[] | .[\"ports:$root\"] | $port_sort | .[1].port" <<< $json) +((bridges > 2)) && bridge[2]=$(jq -r ".[] | .[\"ports:$root\"] | $port_sort | .[2].port" <<< $json) +# validate root ports per host bridge +check_host_bridge() +{ + json=$($CXL list -b cxl_test -T -p $1) + count=$(jq ".[] | .dports | length" <<< $json) + ((count == $2)) || err "$3" +} -# validate 2 root ports per host bridge -json=$($CXL list -b cxl_test -T -p ${bridge[0]}) -count=$(jq ".[] | .dports | length" <<< $json) -((count == 2)) || err "$LINENO" - -json=$($CXL list -b cxl_test -T -p ${bridge[1]}) -count=$(jq ".[] | .dports | length" <<< $json) -((count == 2)) || err "$LINENO" +check_host_bridge ${bridge[0]} 2 $LINENO +check_host_bridge ${bridge[1]} 2 $LINENO +((bridges > 2)) && check_host_bridge ${bridge[2]} 1 $LINENO - -# validate 2 switches per-root port +# validate 2 switches per root-port json=$($CXL list -b cxl_test -P -p ${bridge[0]}) count=$(jq ".[] | .[\"ports:${bridge[0]}\"] | length" <<< $json) ((count == 2)) || err "$LINENO" @@ -65,9 +68,9 @@ switch[2]=$(jq -r ".[] | .[\"ports:${bridge[1]}\"] | $port_sort | .[0].host" <<< switch[3]=$(jq -r ".[] | .[\"ports:${bridge[1]}\"] | $port_sort | .[1].host" <<< $json) -# validate the expected properties of the 4 root decoders -# use the size of the first decoder to determine the cxl_test version / -# properties +# validate the expected properties of the 4 or 5 root decoders +# use the size of the first decoder to determine the +# cxl_test version / properties json=$($CXL list -b cxl_test -D -d root) port_id=${root:4} port_id_len=${#port_id} @@ -103,12 +106,19 @@ count=$(jq "[ $decoder_sort | .[3] | select(.nr_targets == 2) ] | length" <<< $json) ((count == 1)) || err "$LINENO" +if [ $bridges -eq 3 ]; then + count=$(jq "[ $decoder_sort | .[4] | + select(.pmem_capable == true) | + select(.size == $decoder_base_size) | + select(.nr_targets == 1) ] | length" <<< $json) + ((count == 1)) || err "$LINENO" +fi -# check that all 8 cxl_test memdevs are enabled by default and have a +# check that all 8 or 10 cxl_test memdevs are enabled by default and have a # pmem size of 256M, or 1G json=$($CXL list -b cxl_test -M) count=$(jq "map(select(.pmem_size == $pmem_size)) | length" <<< $json) -((count == 8)) || err "$LINENO" +((bridges == 2 && count == 8 || bridges == 3 && count == 10)) || err "$LINENO" # check that switch ports disappear after all of their memdevs have been @@ -151,8 +161,8 @@ do done -# validate host bridge tear down -for b in ${bridge[@]} +# validate host bridge tear down for the first 2 bridges +for b in ${bridge[0]} ${bridge[1]} do $CXL disable-port $b -f json=$($CXL list -M -i -p $b) From patchwork Sun Nov 6 23:48:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13033687 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60FD6D500 for ; Sun, 6 Nov 2022 23:48:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667778494; x=1699314494; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8AHlCZAR1McgpgfxK/9LNp0DWH0p6txm/uMu7blTXsw=; b=b2xnqa7LPo8w82tEonhAwKedIto9K+Z+OjVu0TcHauCoPN2Jc03N7ukw yoLVoR6xrAjVxZO3PHBPil+A53bB5b/fJrMyIZLHhph4aZJffTqWs1h8/ d4kdUJbl/Q5todE/5ULfjQotJbN2omLHHOecXTLPTSOq39hETPMUN9gpO wmHP78BcE5ZOjxHuUAWGaVyFM4EO9n7qFSJk+bDKY9cNlXdzYdGcFMWn5 3t1Z98iUpv7+1EYczA531460u0ZQ5eyBYrJEj+/3ytfV9WrK6FZAgpNia jtPpYFDw3XPqhpvHKG1obtTb2DOD8IlD0Ycu1zEez7y1VXNu63oJsk0+E g==; X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="337007999" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="337007999" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:48:13 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10523"; a="880867238" X-IronPort-AV: E=Sophos;i="5.96,143,1665471600"; d="scan'208";a="880867238" Received: from durgasin-mobl.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.212.240.219]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Nov 2022 15:48:13 -0800 Subject: [ndctl PATCH 15/15] cxl/test: Test single-port host-bridge region creation From: Dan Williams To: vishal.l.verma@intel.com Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Date: Sun, 06 Nov 2022 15:48:13 -0800 Message-ID: <166777849300.1238089.2412172532718881380.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> References: <166777840496.1238089.5601286140872803173.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The original port decoder programming algorithm in the kernel failed to acommodate the corner case of a passthrough port connected to a fan-out port. Use the 5th cxl_test decoder to regression test this scenario. Reported-by: Bobo WL Reported-by: Jonathan Cameron Link: http://lore.kernel.org/r/20221010172057.00001559@huawei.com Signed-off-by: Dan Williams Tested-by: Alison Schofield --- test/cxl-create-region.sh | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/test/cxl-create-region.sh b/test/cxl-create-region.sh index 82aad3a7285a..47aed44848ab 100644 --- a/test/cxl-create-region.sh +++ b/test/cxl-create-region.sh @@ -110,6 +110,34 @@ create_subregions() done } +create_single() +{ + # the 5th cxl_test decoder is expected to target a single-port + # host-bridge. Older cxl_test implementations may not define it, + # so skip the test in that case. + decoder=$($CXL list -b cxl_test -D -d root | + jq -r ".[4] | + select(.pmem_capable == true) | + select(.nr_targets == 1) | + .decoder") + + if [[ ! $decoder ]]; then + echo "no single-port host-bridge decoder found, skipping" + return + fi + + region=$($CXL create-region -d "$decoder" | jq -r ".region") + if [[ ! $region ]]; then + echo "failed to create single-port host-bridge region" + err "$LINENO" + fi + + destroy_regions "$region" +} + +# test region creation on devices behind a single-port host-bridge +create_single + # test reading labels directly through cxl-cli readarray -t mems < <("$CXL" list -b cxl_test -M | jq -r '.[].memdev')