From patchwork Wed Nov 9 00:56:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 13037017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31DBAC43219 for ; Wed, 9 Nov 2022 00:56:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229989AbiKIA4o (ORCPT ); Tue, 8 Nov 2022 19:56:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229995AbiKIA4j (ORCPT ); Tue, 8 Nov 2022 19:56:39 -0500 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09216657E4; Tue, 8 Nov 2022 16:56:38 -0800 (PST) Received: by mail-wr1-x42b.google.com with SMTP id j15so23545098wrq.3; Tue, 08 Nov 2022 16:56:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=7fTAhiVVxrQpabu/VwldyEMjHFg35hTidaLAfmWyILs=; b=ltKPNbDkcoBF9CoEybhxzda6g14YIAaFtjWpGmKTFx6btvvsfHce2ZyLfLv6U4uO8e NyC/vzlFec2xZEQCZCEEbqZSDgBJJLDNvmoTA4qrphn4oK6iVHW561Zc2l90FQahakV2 I0zIh7r/K0uutn0AKOlwcWK8RAEWzVF50Q8gxjvvyMXCAbfir3M/OJKMV3UssPkcSF4w UhT0bNQUaSAjWVjsVLWJ91hJVKpjieg3IKjaqBD9r17LlLIwhBrbiQsSZnb3Z82F9Kiy ZyGYAkTxrO5NwjkkN7XMwcAQrDN2Uwhd1eHWkJyhVLk9VWbEH9AeQjk+PYhbA/MgPd6y RnSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=7fTAhiVVxrQpabu/VwldyEMjHFg35hTidaLAfmWyILs=; b=2TkpZWZca5Ln857sklSYbe4ljVGNGNwSPrM+lJJkl6ATSQ5w7N04ZkcHhjgSwxjaoZ NOjTHqZQPgix1zM3HxysTM+ATD1wXrW81AoSmEOticzH2wvjT+rcMcNr1k170bfozqCZ X8PiZArCMOiSyOih+nurDK0Aw2VmG7Sf7xR7uSiBnsvdhAOAwFnluWeFLKm9ORHpbeNh /Gfs5twkGYRDzqUX/QICLe4klubtYl4hvHEsQaFUR9efwXsdqP6gEYrhnM1+9DX2ydgh ZBTXiNTrTkzsNOuV8VBO7VqAPBKM4xq44mnBNPEJYFx3/RalReHPcPMW4Y3WodPWjEt6 NlhQ== X-Gm-Message-State: ANoB5pm+l0ezJ295fOpnWUu4zY/NOn9HXBW4E9CBshDH6R3hKAkBDccQ 0VyQvYnFRjav7H5yq0p1Zl0= X-Google-Smtp-Source: AA0mqf63/8Ai37dHoH3Ly3mVPXe2aUflPnIghx200bdBRun0aFLppTePp+v/5LgDzz8FhIYbfdw59w== X-Received: by 2002:a05:6000:705:b0:23d:7ee7:67ed with SMTP id bs5-20020a056000070500b0023d7ee767edmr13163342wrb.352.1667955396377; Tue, 08 Nov 2022 16:56:36 -0800 (PST) Received: from localhost.localdomain (93-42-71-18.ip85.fastwebnet.it. [93.42.71.18]) by smtp.googlemail.com with ESMTPSA id z14-20020adff74e000000b0022cdb687bf9sm14130285wrp.0.2022.11.08.16.56.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Nov 2022 16:56:35 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 1/5] clk: qcom: krait-cc: fix wrong parent order for secondary mux Date: Wed, 9 Nov 2022 01:56:27 +0100 Message-Id: <20221109005631.3189-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The secondary mux parent order is swapped. This currently doesn't cause problems as the secondary mux is used for idle clk and as a safe clk source while reprogramming the hfpll. Each mux have 2 or more output but he always have a safe source to switch while reprogramming the connected pll. We use a clk notifier to switch to the correct parent before clk core can apply the correct rate. The parent to switch is hardcoded in the mux struct. For the secondary mux the safe source to use is the qsb parent as it's the only fixed clk as the acpus_aux is a pll that can source from pxo or from pll8. The hardcoded safe parent for the secondary mux is set to index 0 that in the secondary mux map is set to 2. But the index 0 is actually acpu_aux in the parent list. Fix the swapped parents to correctly handle idle frequency and output a sane clk_summary report. Signed-off-by: Christian Marangi --- drivers/clk/qcom/krait-cc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index cfd961d5cc45..c2a261cfeb6a 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -116,8 +116,8 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, int ret; struct krait_mux_clk *mux; static const char *sec_mux_list[] = { - "acpu_aux", "qsb", + "acpu_aux", }; struct clk_init_data init = { .parent_names = sec_mux_list, From patchwork Wed Nov 9 00:56:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 13037015 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02501C43217 for ; Wed, 9 Nov 2022 00:56:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229992AbiKIA4r (ORCPT ); Tue, 8 Nov 2022 19:56:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229978AbiKIA4j (ORCPT ); Tue, 8 Nov 2022 19:56:39 -0500 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 060BF627C9; Tue, 8 Nov 2022 16:56:39 -0800 (PST) Received: by mail-wr1-x42f.google.com with SMTP id j15so23545134wrq.3; Tue, 08 Nov 2022 16:56:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vb5gpABVn01LzpmtL4kWa1L/Tu5YX24/NkCX3qOrieg=; b=i9ZhUFUHgiBRSBtCiod+bre3frI5LjE8Nt+xlMbMGtA1IMGvfsBOfv5dIBJeaW3c+h i27DNMxKwxq7rSEZfbR9pAB8jLklAmnIQZOqzaANE8Plf5Dp6ALI4TYlgMjbNpA6ZGbO yRda1YqoQgd9BqH2bmJxCbhkC5ogAD9pFOwIhHW63hJOW5qbUHhf8vXLA1gY3eJB4VI+ rOckQpTKZRGRNZCZ032yXXLP7i7pF6F2NcV6U+AbDTxPoE7wxOB9xJ9CTvgR3Tzc3Drh UL4KMaj1Q/WeukfWehBVawpheyQbUKzM8EJwwVdN6cMbew9x9mMGwIet9ZRX7Az0GQEA Zyeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vb5gpABVn01LzpmtL4kWa1L/Tu5YX24/NkCX3qOrieg=; b=ORwOGHgWrGVQQkuss8xJsQJS9m3rtxXmBY7fxt2bkmod+rcfIMjG4klK61XzH4wxtk fzHbBnzaZgd5/PPGE/1P+j5/8vc6rQo1Scevm6TYaClLRY8BTr/6C65Ozi4M88ikz1YY OcZZrsw+MbC+xGLRedQJckW3iRLgTQQNJTVMPnZwzPv/GKwCvbJpHzPJAEqf4RFfEH5X A4yeUG88ceErkloillY5plKA89HZ0qJAVZDIqaKk5ugmmpMitWQE1l/lgR5swNBpg/nK jwY8SHPLhfzShcn8+b0iZwaX93xHQpPtvlEZZjKs3Wm+FKbFlZAMjM+rq57AoiWrmcQ4 IZ0Q== X-Gm-Message-State: ANoB5pmyleoLTxVqbj5m1f6nfP3LKGuy2IzwWYJzwDLBhBAwB484p1xS WXa9ZOPlz7z1N+rniWyPhFU= X-Google-Smtp-Source: AA0mqf4xBmbi68GzNNSOnmZniPp4snxp3vJ00b4b9jVqqUNSCWh7t3WtJ9Q4qhjd31lOhT3D412mBA== X-Received: by 2002:a05:6000:50a:b0:240:5bfa:c71b with SMTP id a10-20020a056000050a00b002405bfac71bmr10341370wrf.513.1667955397443; Tue, 08 Nov 2022 16:56:37 -0800 (PST) Received: from localhost.localdomain (93-42-71-18.ip85.fastwebnet.it. [93.42.71.18]) by smtp.googlemail.com with ESMTPSA id z14-20020adff74e000000b0022cdb687bf9sm14130285wrp.0.2022.11.08.16.56.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Nov 2022 16:56:37 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 2/5] clk: qcom: krait-cc: also enable secondary mux and div clk Date: Wed, 9 Nov 2022 01:56:28 +0100 Message-Id: <20221109005631.3189-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221109005631.3189-1-ansuelsmth@gmail.com> References: <20221109005631.3189-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org clk-krait ignore any rate change if clk is not flagged as enabled. Correctly enable the secondary mux and div clk to correctly change rate instead of silently ignoring the request. Signed-off-by: Christian Marangi --- drivers/clk/qcom/krait-cc.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index c2a261cfeb6a..0e497e69e3e3 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -80,6 +80,7 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) }; const char *p_names[1]; struct clk *clk; + int cpu; div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); if (!div) @@ -103,6 +104,17 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) } clk = devm_clk_register(dev, &div->hw); + if (IS_ERR(clk)) + goto err; + + /* clk-krait ignore any rate change if mux is not flagged as enabled */ + if (id < 0) + for_each_online_cpu(cpu) + clk_prepare_enable(div->hw.clk); + else + clk_prepare_enable(div->hw.clk); + +err: kfree(p_names[0]); kfree(init.name); @@ -113,7 +125,7 @@ static int krait_add_sec_mux(struct device *dev, int id, const char *s, unsigned int offset, bool unique_aux) { - int ret; + int cpu, ret; struct krait_mux_clk *mux; static const char *sec_mux_list[] = { "qsb", @@ -165,6 +177,13 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, if (ret) goto unique_aux; + /* clk-krait ignore any rate change if mux is not flagged as enabled */ + if (id < 0) + for_each_online_cpu(cpu) + clk_prepare_enable(mux->hw.clk); + else + clk_prepare_enable(mux->hw.clk); + unique_aux: if (unique_aux) kfree(sec_mux_list[0]); From patchwork Wed Nov 9 00:56:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 13037014 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8049C4332F for ; Wed, 9 Nov 2022 00:56:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229969AbiKIA4q (ORCPT ); Tue, 8 Nov 2022 19:56:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229903AbiKIA4l (ORCPT ); Tue, 8 Nov 2022 19:56:41 -0500 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F056E64A04; Tue, 8 Nov 2022 16:56:39 -0800 (PST) Received: by mail-wr1-x435.google.com with SMTP id k8so23583661wrh.1; Tue, 08 Nov 2022 16:56:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nKH2DEqi/WyS0Gp7MHojWp9fGOlGca/3PwJ9fijM8Dk=; b=pTtMClNH8jy20JOf4U/hfeOySzhvVCYDFNWrt2iskys97oOlDpSL3jS0Ij1MEDp1Dq AFYLsQS0MFjkAEibTgI50uBBv4G3P2dPtQduu+c5cgfeyAs/uSpXJtT0VRYXdUuYc0T+ TiOecp5zEu9sLpRW3tSmkfJj+YLo+YQKkvaPRj1lduQNs2fX5WEhpXSQ9FGCzIrKT4Wn UUEs7jOvBIuguOIfMnpExhacVwrWfFYpJazWlXXA1witjKlDIANDZOOK6/ZZCprolgoK eUpxCB4Iv1pOSVQV8qFw9Q++bZWbPuZ9tGZo9VQEV28OVT6M17ewYza2SKkpGP+ky1nb 4YFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nKH2DEqi/WyS0Gp7MHojWp9fGOlGca/3PwJ9fijM8Dk=; b=ztbgS+dx2K82xZj77nKbgPEK0RNiSW2/0CTCZxYayY8M8Xto4ebuzeU9TDsnt6hjlO VOFcutxjY1u0A+kvNeWp7M3qkl8TlvFzbfccyBsCbfNEfehv8SUC7/Q2JLPH+HIxOBwN GVagQ+Kj1HqIuf9eadYknzMGN7YfPd8v+fRUAfMZRp98dQ9JEEa1YPuirIi6fGcRY6Ge UQn05Mq/k1BxvX64QB9qfKcCDUPGdGQV34wpg8fPudY85jQPjhGvecXt7OvM5zszfiHC 4ywXzlSgmKPm8sXFXf2PRAgLz3BQWMnZbpp3FQesBFojQjZ5jSXgnbXbHIUPo6Y6lQXS e/fA== X-Gm-Message-State: ACrzQf0m5Hlzpm6pVfZA2/6gji8lHyiiNE6x8RN/MDT1M7LGkxdhsf0y ig9pkKhUWC+mEPEZ7LGLCEI= X-Google-Smtp-Source: AMsMyM6k9UPkLTa5uXTirLIQ9nXX6p7qlwmo8BsCDVd7veXcPJbWZrB4nVdvyyuQflKCmNI8bdLU6w== X-Received: by 2002:a5d:6da1:0:b0:231:c189:e077 with SMTP id u1-20020a5d6da1000000b00231c189e077mr37567746wrs.114.1667955398428; Tue, 08 Nov 2022 16:56:38 -0800 (PST) Received: from localhost.localdomain (93-42-71-18.ip85.fastwebnet.it. [93.42.71.18]) by smtp.googlemail.com with ESMTPSA id z14-20020adff74e000000b0022cdb687bf9sm14130285wrp.0.2022.11.08.16.56.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Nov 2022 16:56:38 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 3/5] clk: qcom: krait-cc: handle secondary mux sourcing out of acpu_aux Date: Wed, 9 Nov 2022 01:56:29 +0100 Message-Id: <20221109005631.3189-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221109005631.3189-1-ansuelsmth@gmail.com> References: <20221109005631.3189-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Some bootloader may leave the system in an even more undefined state with the secondary mux of L2 or other cores sourcing out of the acpu_aux parent. This results in the clk set to the PXO rate or a PLL8 rate. The current logic to reset the mux and set them to a defined state only handle if the mux are configured to source out of QSB. Change this and force a new and defined state if the current clk is lower than the aux rate. This way we can handle any wrong configuration where the mux is sourcing out of QSB (rate 225MHz, currently set to a virtual rate of 1), PXO rate (rate 25MHz) or PLL8 (needs to be configured to run at 384Mhz). Signed-off-by: Christian Marangi --- drivers/clk/qcom/krait-cc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 0e497e69e3e3..17bf39076830 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -383,8 +383,8 @@ static int krait_cc_probe(struct platform_device *pdev) */ cur_rate = clk_get_rate(l2_pri_mux_clk); aux_rate = 384000000; - if (cur_rate == 1) { - pr_info("L2 @ QSB rate. Forcing new rate.\n"); + if (cur_rate < aux_rate) { + pr_info("L2 @ Undefined rate. Forcing new rate.\n"); cur_rate = aux_rate; } clk_set_rate(l2_pri_mux_clk, aux_rate); @@ -394,8 +394,8 @@ static int krait_cc_probe(struct platform_device *pdev) for_each_possible_cpu(cpu) { clk = clks[cpu]; cur_rate = clk_get_rate(clk); - if (cur_rate == 1) { - pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu); + if (cur_rate < aux_rate) { + pr_info("CPU%d @ Undefined rate. Forcing new rate.\n", cpu); cur_rate = aux_rate; } From patchwork Wed Nov 9 00:56:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 13037016 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13158C4332F for ; Wed, 9 Nov 2022 00:56:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229982AbiKIA4s (ORCPT ); Tue, 8 Nov 2022 19:56:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229986AbiKIA4m (ORCPT ); Tue, 8 Nov 2022 19:56:42 -0500 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FA5464A1C; Tue, 8 Nov 2022 16:56:41 -0800 (PST) Received: by mail-wr1-x434.google.com with SMTP id a14so23549467wru.5; Tue, 08 Nov 2022 16:56:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tVPpA4RQ1p5rJwkA8HPIAk7M05A9PwrvQZVEWuO/aN8=; b=LpBTxYKGGEkY4KPUVSgUl3YGPHhh6K2hrA0NYFqjeo3rzBX08iF6yoAVHqh9RaULR+ C0FUFFfxTyRj92YxXPqkOTHdMWj4npoRmz7DRsWqwDXHwIwzfU03DtZoma9+GUBX2dBo nbucMiSk9eDcvGyBeMsjHm/tO315kVdV+ycvNMZZ4a+IEI5BeMj75xtkP3mrKKbR5vsQ B3fLY1klTMNCMBy1ByzcB5DcgIE4Fbi96ULGBhvbQ0qevgJn7Xl91cVzHWYbIucVMCbl Ga/D6W6yS7aZYsDrTNOQgvysbA+AaZ/xzeYCHpP6oUgmBnnh9emKfB7MAJih9aI2nAQ4 ouTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tVPpA4RQ1p5rJwkA8HPIAk7M05A9PwrvQZVEWuO/aN8=; b=0gADtuPPVlzUnfp/0XSuIZxwKWwic5JbA+wbGrHAkLS114tUDBcR1xfOBJYn9cJtLY WWarOtnDmfG9ekwjYQwkJdLatKCivtRrwyIAc1sjXJjEctjbfZWTrQPOlJz/vfSmrE2d 52hew3qcI8XAnrlUaFP+de4Zl3fiXcEVX5qla7QMVxLrg9r7t/VrHyXa1cz2rk/kk5Gj g/xnDjVO8VJkNsewnDaGfaRHyYsUu1RyexW8C4IgGA4T44iY4SFoB0ZI+3TC0PIUa1t8 9dVuUSGh9xstt2OKdDd27nl2FCQO6Ixencj3DMV2mBtYeOVmz9o4aw412jfAQh0hObBy 9lew== X-Gm-Message-State: ACrzQf2TLqAhswe9Wa87HJiTS/69rIHXYGfnLF3NMC3jo3hDX1udDxoe zUaiFpqLsGDjGxHstMtzRo8= X-Google-Smtp-Source: AMsMyM6xJdMvO29Lnwp70VAea376C+BQwWParPutGWTDFol758rPA5aqVLbTZaR625aCkQ1kAG7pJQ== X-Received: by 2002:a5d:4644:0:b0:236:cb94:4c6c with SMTP id j4-20020a5d4644000000b00236cb944c6cmr32553798wrs.544.1667955399563; Tue, 08 Nov 2022 16:56:39 -0800 (PST) Received: from localhost.localdomain (93-42-71-18.ip85.fastwebnet.it. [93.42.71.18]) by smtp.googlemail.com with ESMTPSA id z14-20020adff74e000000b0022cdb687bf9sm14130285wrp.0.2022.11.08.16.56.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Nov 2022 16:56:39 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 4/5] clk: qcom: krait-cc: convert to devm_clk_hw_register Date: Wed, 9 Nov 2022 01:56:30 +0100 Message-Id: <20221109005631.3189-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221109005631.3189-1-ansuelsmth@gmail.com> References: <20221109005631.3189-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org clk_register is now deprecated. Convert the driver to devm_clk_hw_register. Signed-off-by: Christian Marangi --- drivers/clk/qcom/krait-cc.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 17bf39076830..63322cb38aa8 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -79,8 +79,7 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) .flags = CLK_SET_RATE_PARENT, }; const char *p_names[1]; - struct clk *clk; - int cpu; + int cpu, ret; div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); if (!div) @@ -103,8 +102,8 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) return -ENOMEM; } - clk = devm_clk_register(dev, &div->hw); - if (IS_ERR(clk)) + ret = devm_clk_hw_register(dev, &div->hw); + if (ret) goto err; /* clk-krait ignore any rate change if mux is not flagged as enabled */ @@ -118,7 +117,7 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) kfree(p_names[0]); kfree(init.name); - return PTR_ERR_OR_ZERO(clk); + return ret; } static int @@ -137,7 +136,6 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, .ops = &krait_mux_clk_ops, .flags = CLK_SET_RATE_PARENT, }; - struct clk *clk; mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); if (!mux) @@ -166,14 +164,16 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, if (unique_aux) { sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); if (!sec_mux_list[0]) { - clk = ERR_PTR(-ENOMEM); + ret = -ENOMEM; goto err_aux; } } - clk = devm_clk_register(dev, &mux->hw); + ret = devm_clk_hw_register(dev, &mux->hw); + if (ret) + goto unique_aux; - ret = krait_notifier_register(dev, clk, mux); + ret = krait_notifier_register(dev, mux->hw.clk, mux); if (ret) goto unique_aux; @@ -189,7 +189,7 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, kfree(sec_mux_list[0]); err_aux: kfree(init.name); - return PTR_ERR_OR_ZERO(clk); + return ret; } static struct clk * @@ -241,11 +241,18 @@ krait_add_pri_mux(struct device *dev, int id, const char *s, goto err_p2; } - clk = devm_clk_register(dev, &mux->hw); + ret = devm_clk_hw_register(dev, &mux->hw); + if (ret) { + clk = ERR_PTR(ret); + goto err_p3; + } + + clk = mux->hw.clk; ret = krait_notifier_register(dev, clk, mux); if (ret) - goto err_p3; + clk = ERR_PTR(ret); + err_p3: kfree(p_names[2]); err_p2: From patchwork Wed Nov 9 00:56:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 13037018 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA1BFC4321E for ; Wed, 9 Nov 2022 00:56:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229995AbiKIA4t (ORCPT ); Tue, 8 Nov 2022 19:56:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230002AbiKIA4o (ORCPT ); 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[93.42.71.18]) by smtp.googlemail.com with ESMTPSA id z14-20020adff74e000000b0022cdb687bf9sm14130285wrp.0.2022.11.08.16.56.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Nov 2022 16:56:40 -0800 (PST) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH 5/5] clk: qcom: krait-cc: convert to parent_data API Date: Wed, 9 Nov 2022 01:56:31 +0100 Message-Id: <20221109005631.3189-5-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221109005631.3189-1-ansuelsmth@gmail.com> References: <20221109005631.3189-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Modernize the krait-cc driver to parent-data API and refactor to drop any use of parent_names. From Documentation all the required clocks should be declared in DTS so fw_name can be correctly used to get the parents for all the muxes. .name is also declared to save compatibility with old DT. While at it also drop some hardcoded index and introduce an enum to make index values more clear. Signed-off-by: Christian Marangi --- drivers/clk/qcom/krait-cc.c | 202 ++++++++++++++++++++---------------- 1 file changed, 112 insertions(+), 90 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 63322cb38aa8..0a15da568156 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -15,6 +15,16 @@ #include "clk-krait.h" +enum { + cpu0_mux = 0, + cpu1_mux, + cpu2_mux, + cpu3_mux, + l2_mux, + + clks_max, +}; + static unsigned int sec_mux_map[] = { 2, 0, @@ -69,21 +79,23 @@ static int krait_notifier_register(struct device *dev, struct clk *clk, return ret; } -static int +static struct clk_hw * krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) { struct krait_div2_clk *div; + static struct clk_parent_data p_data[1]; struct clk_init_data init = { - .num_parents = 1, + .num_parents = ARRAY_SIZE(p_data), .ops = &krait_div2_clk_ops, .flags = CLK_SET_RATE_PARENT, }; - const char *p_names[1]; + struct clk_hw *clk; + char *parent_name; int cpu, ret; div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); if (!div) - return -ENOMEM; + return ERR_PTR(-ENOMEM); div->width = 2; div->shift = 6; @@ -93,18 +105,25 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s); if (!init.name) - return -ENOMEM; + return ERR_PTR(-ENOMEM); - init.parent_names = p_names; - p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); - if (!p_names[0]) { - kfree(init.name); - return -ENOMEM; + init.parent_data = p_data; + parent_name = kasprintf(GFP_KERNEL, "hfpll%s", s); + if (!parent_name) { + clk = ERR_PTR(-ENOMEM); + goto err_parent_name; } + p_data[0].fw_name = parent_name; + p_data[0].name = parent_name; + ret = devm_clk_hw_register(dev, &div->hw); - if (ret) - goto err; + if (ret) { + clk = ERR_PTR(ret); + goto err_clk; + } + + clk = &div->hw; /* clk-krait ignore any rate change if mux is not flagged as enabled */ if (id < 0) @@ -113,33 +132,36 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) else clk_prepare_enable(div->hw.clk); -err: - kfree(p_names[0]); +err_clk: + kfree(parent_name); +err_parent_name: kfree(init.name); - return ret; + return clk; } -static int +static struct clk_hw * krait_add_sec_mux(struct device *dev, int id, const char *s, unsigned int offset, bool unique_aux) { int cpu, ret; struct krait_mux_clk *mux; - static const char *sec_mux_list[] = { - "qsb", - "acpu_aux", + static struct clk_parent_data sec_mux_list[2] = { + { .name = "qsb", .fw_name = "qsb" }, + {}, }; struct clk_init_data init = { - .parent_names = sec_mux_list, + .parent_data = sec_mux_list, .num_parents = ARRAY_SIZE(sec_mux_list), .ops = &krait_mux_clk_ops, .flags = CLK_SET_RATE_PARENT, }; + struct clk_hw *clk; + char *parent_name; mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); if (!mux) - return -ENOMEM; + return ERR_PTR(-ENOMEM); mux->offset = offset; mux->lpl = id >= 0; @@ -159,23 +181,33 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); if (!init.name) - return -ENOMEM; + return ERR_PTR(-ENOMEM); if (unique_aux) { - sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); - if (!sec_mux_list[0]) { - ret = -ENOMEM; + parent_name = kasprintf(GFP_KERNEL, "acpu%s_aux", s); + if (!parent_name) { + clk = ERR_PTR(-ENOMEM); goto err_aux; } + sec_mux_list[1].fw_name = parent_name; + sec_mux_list[1].name = parent_name; + } else { + sec_mux_list[1].name = "apu_aux"; } ret = devm_clk_hw_register(dev, &mux->hw); - if (ret) - goto unique_aux; + if (ret) { + clk = ERR_PTR(ret); + goto err_clk; + } + + clk = &mux->hw; ret = krait_notifier_register(dev, mux->hw.clk, mux); - if (ret) - goto unique_aux; + if (ret) { + clk = ERR_PTR(ret); + goto err_clk; + } /* clk-krait ignore any rate change if mux is not flagged as enabled */ if (id < 0) @@ -184,28 +216,29 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, else clk_prepare_enable(mux->hw.clk); -unique_aux: +err_clk: if (unique_aux) - kfree(sec_mux_list[0]); + kfree(parent_name); err_aux: kfree(init.name); - return ret; + return clk; } -static struct clk * -krait_add_pri_mux(struct device *dev, int id, const char *s, - unsigned int offset) +static struct clk_hw * +krait_add_pri_mux(struct device *dev, struct clk_hw *hfpll_div, struct clk_hw *sec_mux, + int id, const char *s, unsigned int offset) { int ret; struct krait_mux_clk *mux; - const char *p_names[3]; + static struct clk_parent_data p_data[3]; struct clk_init_data init = { - .parent_names = p_names, - .num_parents = ARRAY_SIZE(p_names), + .parent_data = p_data, + .num_parents = ARRAY_SIZE(p_data), .ops = &krait_mux_clk_ops, .flags = CLK_SET_RATE_PARENT, }; - struct clk *clk; + struct clk_hw *clk; + char *hfpll_name; mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); if (!mux) @@ -223,55 +256,44 @@ krait_add_pri_mux(struct device *dev, int id, const char *s, if (!init.name) return ERR_PTR(-ENOMEM); - p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); - if (!p_names[0]) { + hfpll_name = kasprintf(GFP_KERNEL, "hfpll%s", s); + if (!hfpll_name) { clk = ERR_PTR(-ENOMEM); - goto err_p0; + goto err_hfpll; } - p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s); - if (!p_names[1]) { - clk = ERR_PTR(-ENOMEM); - goto err_p1; - } + p_data[0].fw_name = hfpll_name; + p_data[0].name = hfpll_name; - p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); - if (!p_names[2]) { - clk = ERR_PTR(-ENOMEM); - goto err_p2; - } + p_data[1].hw = hfpll_div; + p_data[2].hw = sec_mux; ret = devm_clk_hw_register(dev, &mux->hw); if (ret) { clk = ERR_PTR(ret); - goto err_p3; + goto err_clk; } - clk = mux->hw.clk; + clk = &mux->hw; - ret = krait_notifier_register(dev, clk, mux); + ret = krait_notifier_register(dev, mux->hw.clk, mux); if (ret) clk = ERR_PTR(ret); -err_p3: - kfree(p_names[2]); -err_p2: - kfree(p_names[1]); -err_p1: - kfree(p_names[0]); -err_p0: +err_clk: + kfree(hfpll_name); +err_hfpll: kfree(init.name); return clk; } /* id < 0 for L2, otherwise id == physical CPU number */ -static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) +static struct clk_hw *krait_add_clks(struct device *dev, int id, bool unique_aux) { - int ret; + struct clk_hw *hfpll_div, *sec_mux, *pri_mux; unsigned int offset; void *p = NULL; const char *s; - struct clk *clk; if (id >= 0) { offset = 0x4501 + (0x1000 * id); @@ -283,22 +305,23 @@ static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) s = "_l2"; } - ret = krait_add_div(dev, id, s, offset); - if (ret) { - clk = ERR_PTR(ret); + hfpll_div = krait_add_div(dev, id, s, offset); + if (IS_ERR(hfpll_div)) { + pri_mux = hfpll_div; goto err; } - ret = krait_add_sec_mux(dev, id, s, offset, unique_aux); - if (ret) { - clk = ERR_PTR(ret); + sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux); + if (IS_ERR(sec_mux)) { + pri_mux = sec_mux; goto err; } - clk = krait_add_pri_mux(dev, id, s, offset); + pri_mux = krait_add_pri_mux(dev, hfpll_div, sec_mux, id, s, offset); + err: kfree(p); - return clk; + return pri_mux; } static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data) @@ -306,7 +329,7 @@ static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data) unsigned int idx = clkspec->args[0]; struct clk **clks = data; - if (idx >= 5) { + if (idx >= clks_max) { pr_err("%s: invalid clock index %d\n", __func__, idx); return ERR_PTR(-EINVAL); } @@ -327,9 +350,8 @@ static int krait_cc_probe(struct platform_device *pdev) const struct of_device_id *id; unsigned long cur_rate, aux_rate; int cpu; - struct clk *clk; - struct clk **clks; - struct clk *l2_pri_mux_clk; + struct clk_hw *mux, *l2_pri_mux; + struct clk *clk, **clks; id = of_match_device(krait_cc_match_table, dev); if (!id) @@ -348,21 +370,21 @@ static int krait_cc_probe(struct platform_device *pdev) } /* Krait configurations have at most 4 CPUs and one L2 */ - clks = devm_kcalloc(dev, 5, sizeof(*clks), GFP_KERNEL); + clks = devm_kcalloc(dev, clks_max, sizeof(*clks), GFP_KERNEL); if (!clks) return -ENOMEM; for_each_possible_cpu(cpu) { - clk = krait_add_clks(dev, cpu, id->data); + mux = krait_add_clks(dev, cpu, id->data); if (IS_ERR(clk)) return PTR_ERR(clk); - clks[cpu] = clk; + clks[cpu] = mux->clk; } - l2_pri_mux_clk = krait_add_clks(dev, -1, id->data); - if (IS_ERR(l2_pri_mux_clk)) - return PTR_ERR(l2_pri_mux_clk); - clks[4] = l2_pri_mux_clk; + l2_pri_mux = krait_add_clks(dev, -1, id->data); + if (IS_ERR(l2_pri_mux)) + return PTR_ERR(l2_pri_mux); + clks[l2_mux] = l2_pri_mux->clk; /* * We don't want the CPU or L2 clocks to be turned off at late init @@ -372,7 +394,7 @@ static int krait_cc_probe(struct platform_device *pdev) * they take over. */ for_each_online_cpu(cpu) { - clk_prepare_enable(l2_pri_mux_clk); + clk_prepare_enable(clks[l2_mux]); WARN(clk_prepare_enable(clks[cpu]), "Unable to turn on CPU%d clock", cpu); } @@ -388,16 +410,16 @@ static int krait_cc_probe(struct platform_device *pdev) * two different rates to force a HFPLL reinit under all * circumstances. */ - cur_rate = clk_get_rate(l2_pri_mux_clk); + cur_rate = clk_get_rate(clks[l2_mux]); aux_rate = 384000000; if (cur_rate < aux_rate) { pr_info("L2 @ Undefined rate. Forcing new rate.\n"); cur_rate = aux_rate; } - clk_set_rate(l2_pri_mux_clk, aux_rate); - clk_set_rate(l2_pri_mux_clk, 2); - clk_set_rate(l2_pri_mux_clk, cur_rate); - pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000); + clk_set_rate(clks[l2_mux], aux_rate); + clk_set_rate(clks[l2_mux], 2); + clk_set_rate(clks[l2_mux], cur_rate); + pr_info("L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000); for_each_possible_cpu(cpu) { clk = clks[cpu]; cur_rate = clk_get_rate(clk);