From patchwork Wed Nov 9 11:15:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 13037413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 566B0C4332F for ; Wed, 9 Nov 2022 11:20:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 42E9910E5A0; Wed, 9 Nov 2022 11:20:24 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 058FC10E5A0 for ; Wed, 9 Nov 2022 11:20:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667992821; x=1699528821; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=wsVFKpE5z+PcGlAdSM+pnjqwj3ECEUy30/TSnrFgz0M=; b=DJDj32KAVcrffwrvoE9QSiLZiNeMZ4FJ60drt+07SSffDQ4Qi66XFPdr d5gCRnGL8JC3/ZiOor6kxHSvIMjXrXXxTpIT9QnLofDO43B2XCvqR0ezi P+k8pp0STzECBRIVyd1b+r/zweB2fwhMrpzty7LmpIslSoodpWXjdVLB3 xr5+PzNPFclMXuYSZ6WBOqtj78zmaEe0Rh63ddW0iydL6FuaEZ+PTN23C Dz69VMKItCyw9zZG0ZAEyLRGMW02FmHWvl+Oh9LWTT1p6fiwChm3gccQa gcxdBZHRnB9jKcVL1Ub4KVN5o23oHl+TOtr7d2/BV1UmWLoMIqiAXO0Su g==; X-IronPort-AV: E=McAfee;i="6500,9779,10525"; a="312113865" X-IronPort-AV: E=Sophos;i="5.96,150,1665471600"; d="scan'208";a="312113865" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 03:20:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10525"; a="725942716" X-IronPort-AV: E=Sophos;i="5.96,150,1665471600"; d="scan'208";a="725942716" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by FMSMGA003.fm.intel.com with ESMTP; 09 Nov 2022 03:20:18 -0800 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Wed, 9 Nov 2022 16:45:27 +0530 Message-Id: <20221109111529.27476-1-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/3] drm/i915/pps: Add get_pps_idx() hook as part of pps_get_register() cleanup X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Simplified pps_get_register() which use get_pps_idx() hook to derive the pps instance and get_pps_idx() will be initialized at pps_init(). v1: Initial version. Got r-b from Jani. v2: Corrected unintentional change around memset() call. [Jani] Cc: Jani Nikula Cc: Ville Syrjälä Cc: Uma Shankar Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_pps.c | 14 +++++++++----- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index c6abaaa46e17..87163ef32983 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1698,6 +1698,7 @@ struct intel_dp { u8 (*preemph_max)(struct intel_dp *intel_dp); u8 (*voltage_max)(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); + int (*get_pps_idx)(struct intel_dp *intel_dp); /* Displayport compliance testing */ struct intel_dp_compliance compliance; diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c index 22f5e08d396b..3949fb449353 100644 --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -366,11 +366,8 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp, int pps_idx = 0; memset(regs, 0, sizeof(*regs)); - - if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) - pps_idx = bxt_power_sequencer_idx(intel_dp); - else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) - pps_idx = vlv_power_sequencer_pipe(intel_dp); + if (intel_dp->get_pps_idx) + pps_idx = intel_dp->get_pps_idx(intel_dp); regs->pp_ctrl = PP_CONTROL(pps_idx); regs->pp_stat = PP_STATUS(pps_idx); @@ -1433,6 +1430,13 @@ void intel_pps_init(struct intel_dp *intel_dp) intel_dp->pps.initializing = true; INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work); + if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) + intel_dp->get_pps_idx = bxt_power_sequencer_idx; + else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) + intel_dp->get_pps_idx = vlv_power_sequencer_pipe; + else + intel_dp->get_pps_idx = NULL; + pps_init_timestamps(intel_dp); with_intel_pps_lock(intel_dp, wakeref) { From patchwork Wed Nov 9 11:15:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 13037414 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1A7B7C4332F for ; Wed, 9 Nov 2022 11:20:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 670B510E5A1; Wed, 9 Nov 2022 11:20:30 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id D7FF410E5A1 for ; Wed, 9 Nov 2022 11:20:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667992825; x=1699528825; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ral9yS5d1yxPP3g/z/xC08CocyNwwfH76G71tQRgq+Y=; b=UO5ScXRYLIq8TSNpEKrRBAwg5f+tUsb1AYp4QCFfamZf6EezR0n23e6D EPthrpPWMfQ5hId09za8YO2E+zSXpRRfr2czkx9v4xbR6OnsTHNUYGMjv rTqDyDr6eEGNU4Bw9Exk56xxfh3+o8+QFRx4Q79/QKeyKusFiJt6CN9c9 vPUlwnkoeg+NqpvaQUAuXpVjAol75VtKKm6buzT7+9mScuncdvQkIiODa 8qcqLJtmEGkstjANG4tq6n7p+KO60Kyyjy5YtQzCu9+C05xOPEcRfXMBX D4yGZd7TM2/GJMlhYIjPXKUj5Gr1f+K8Qx+JWaLSVmeOPFy1MrdOSGf/F A==; X-IronPort-AV: E=McAfee;i="6500,9779,10525"; a="309663735" X-IronPort-AV: E=Sophos;i="5.96,150,1665471600"; d="scan'208,223";a="309663735" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 03:20:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10525"; a="725942731" X-IronPort-AV: E=Sophos;i="5.96,150,1665471600"; d="scan'208,223";a="725942731" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by FMSMGA003.fm.intel.com with ESMTP; 09 Nov 2022 03:20:23 -0800 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Wed, 9 Nov 2022 16:45:28 +0530 Message-Id: <20221109111529.27476-2-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20221109111529.27476-1-animesh.manna@intel.com> References: <20221109111529.27476-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/3] drm/i915/pps: Enable 2nd pps for dual EDP scenario X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From display gen12 onwards to support dual EDP two instances of pps added. Currently backlight controller and pps instance can be mapped together for a specific panel. Currently dual PPS support is broken. This patch fixes it and enables for display 12+. v1: Iniital revision. v2: Called intel_bios_panel_init w/o PNPID before intel_pps_init. [Jani] v3: Set pps_id to -1 for pnpid type of panel which will be used by bxt_power_sequencer_idx() to set 2nd pps instance as default for 2nd EDP panel. [Jani] v4: Early return for PANEL_TYPE_FALLBACK. [Jani] v5: Removed additional pps_id variable and reused backlight controller. [Jani] Cc: Jani Nikula Cc: Ville Syrjälä Cc: Uma Shankar Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_bios.c | 9 ++++++++- drivers/gpu/drm/i915/display/intel_bios.h | 2 +- drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++++--- drivers/gpu/drm/i915/display/intel_pps.c | 12 +++++++++++- 4 files changed, 27 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index c2987f2c2b2e..1c1eea061fbb 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -3183,7 +3183,7 @@ void intel_bios_init(struct drm_i915_private *i915) kfree(oprom_vbt); } -void intel_bios_init_panel(struct drm_i915_private *i915, +bool intel_bios_init_panel(struct drm_i915_private *i915, struct intel_panel *panel, const struct intel_bios_encoder_data *devdata, const struct edid *edid) @@ -3192,6 +3192,11 @@ void intel_bios_init_panel(struct drm_i915_private *i915, panel->vbt.panel_type = get_panel_type(i915, devdata, edid); + if (panel->vbt.panel_type == PANEL_TYPE_FALLBACK && !edid) { + panel->vbt.backlight.controller = -1; + return true; + } + parse_panel_options(i915, panel); parse_generic_dtd(i915, panel); parse_lfp_data(i915, panel); @@ -3203,6 +3208,8 @@ void intel_bios_init_panel(struct drm_i915_private *i915, parse_psr(i915, panel); parse_mipi_config(i915, panel); parse_mipi_sequence(i915, panel); + + return false; } /** diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h index e375405a7828..f8ef0274f3ee 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.h +++ b/drivers/gpu/drm/i915/display/intel_bios.h @@ -232,7 +232,7 @@ struct mipi_pps_data { } __packed; void intel_bios_init(struct drm_i915_private *dev_priv); -void intel_bios_init_panel(struct drm_i915_private *dev_priv, +bool intel_bios_init_panel(struct drm_i915_private *dev_priv, struct intel_panel *panel, const struct intel_bios_encoder_data *devdata, const struct edid *edid); diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 7400d6b4c587..78cf3a77f026 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -5235,6 +5235,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; bool has_dpcd; struct edid *edid; + bool retry; if (!intel_dp_is_edp(intel_dp)) return true; @@ -5254,6 +5255,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, return false; } + retry = intel_bios_init_panel(dev_priv, &intel_connector->panel, + encoder->devdata, NULL); + intel_pps_init(intel_dp); /* Cache DPCD and EDID for edp. */ @@ -5288,9 +5292,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, edid = ERR_PTR(-ENOENT); } intel_connector->edid = edid; - - intel_bios_init_panel(dev_priv, &intel_connector->panel, - encoder->devdata, IS_ERR(edid) ? NULL : edid); + if (retry) + intel_bios_init_panel(dev_priv, &intel_connector->panel, + encoder->devdata, IS_ERR(edid) ? NULL : edid); intel_panel_add_edid_fixed_modes(intel_connector, true); diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c index 3949fb449353..5738af154bd2 100644 --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -219,6 +219,16 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp) /* We should never land here with regular DP ports */ drm_WARN_ON(&dev_priv->drm, !intel_dp_is_edp(intel_dp)); + if (backlight_controller == -1) { + /* + * Use 2nd PPS instance as default for 2nd EDP panel. + */ + if (connector->encoder->port == PORT_A) + return 0; + else + return 1; + } + if (!intel_dp->pps.pps_reset) return backlight_controller; @@ -1430,7 +1440,7 @@ void intel_pps_init(struct intel_dp *intel_dp) intel_dp->pps.initializing = true; INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work); - if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) + if (IS_GEMINILAKE(i915) || IS_BROXTON(i915) || DISPLAY_VER(i915) >= 12) intel_dp->get_pps_idx = bxt_power_sequencer_idx; else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) intel_dp->get_pps_idx = vlv_power_sequencer_pipe; From patchwork Wed Nov 9 11:15:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 13037415 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CF24C433FE for ; Wed, 9 Nov 2022 11:20:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A759110E59C; Wed, 9 Nov 2022 11:20:36 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 159F710E5A1 for ; Wed, 9 Nov 2022 11:20:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667992828; x=1699528828; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5mgmr9mSm8g3eGGA8PM5qb9Qxv4pKwX3bI+fVdlFkkw=; b=jHtD7qT6pbY2CoDgMdqPi1ek8Qwp87XCVVDKof4VIRHfKYpC3+vqp6bI Lx6E0KXe7TlpEurjOZ6KWxsJvFe2B5V3n+qirI58JfQYXoXWspvgVZeSS cVPPl75lI5YwBcqCo1X8BCcYs+sj1jPBcC7pDMKYUlA9pBWsg2xboSWKs YMrA/Ma20nfVetSkLtcWFam7G4HwiHg9QT3hKm4cJXgZg755ZDSJHEMMQ 528Eoxx6M5vMtPWtMWR7RScpLGw4e3kXVOHe5HCbr/U/32/ySV9RSZWZ/ NLpOJzH05NOKPbg9KwH7lVSk7be1iScTm/sLB8jQRnWPFe/2zCR8NdFfu A==; X-IronPort-AV: E=McAfee;i="6500,9779,10525"; a="309663743" X-IronPort-AV: E=Sophos;i="5.96,150,1665471600"; d="scan'208";a="309663743" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 03:20:27 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10525"; a="725942746" X-IronPort-AV: E=Sophos;i="5.96,150,1665471600"; d="scan'208";a="725942746" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by FMSMGA003.fm.intel.com with ESMTP; 09 Nov 2022 03:20:26 -0800 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Wed, 9 Nov 2022 16:45:29 +0530 Message-Id: <20221109111529.27476-3-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20221109111529.27476-1-animesh.manna@intel.com> References: <20221109111529.27476-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/3] drm/i915/edp: Fix warning as vdd went down without driver knowledge X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Kernel warning triggered as vdd went down after certain time during aux transfer in connector init sequence. To solve the kernel warning adjust power domain and vdd wakeref count. Currently issue seen on ADL so add the above adjustment part of ADL platform check, if needed will extend for future platform. Cc: Jani Nikula Cc: Ville Syrjälä Cc: Uma Shankar Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_pps.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c index 5738af154bd2..ebc03c8f73c5 100644 --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -597,8 +597,15 @@ bool intel_pps_vdd_on_unlocked(struct intel_dp *intel_dp) cancel_delayed_work(&intel_dp->pps.panel_vdd_work); intel_dp->pps.want_panel_vdd = true; - if (edp_have_panel_vdd(intel_dp)) + if (edp_have_panel_vdd(intel_dp)) { return need_to_disable; + } else { + if ((IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) && + intel_dp->pps.vdd_wakeref) + intel_display_power_put(dev_priv, + intel_aux_power_domain(dig_port), + fetch_and_zero(&intel_dp->pps.vdd_wakeref)); + } drm_WARN_ON(&dev_priv->drm, intel_dp->pps.vdd_wakeref); intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv,