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X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Dp-intfs provide the pixel data to edptx and dptx. To support edptx and dptx, we need to add dp-intf0 and dp-intf1 nodes. Dp-intf0 is for edptx and dp-intf1 is for dptx. Signed-off-by: Bo-Chen Chen Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 2edfc21ece56..c380738d10cb 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -2094,6 +2094,17 @@ mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0x4000 0x1000>; }; + dp_intf0: dp-intf@1c015000 { + compatible = "mediatek,mt8195-dp-intf"; + reg = <0 0x1c015000 0 0x1000>; + interrupts = ; + clocks = <&vdosys0 CLK_VDO0_DP_INTF0>, + <&vdosys0 CLK_VDO0_DP_INTF0_DP_INTF>, + <&apmixedsys CLK_APMIXED_TVDPLL1>; + clock-names = "engine", "pixel", "pll"; + status = "disabled"; + }; + mutex: mutex@1c016000 { compatible = "mediatek,mt8195-disp-mutex"; reg = <0 0x1c016000 0 0x1000>; @@ -2182,5 +2193,17 @@ clock-names = "apb", "smi", "gals"; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; }; + + dp_intf1: dp-intf@1c113000 { + compatible = "mediatek,mt8195-dp-intf"; + reg = <0 0x1c113000 0 0x1000>; + interrupts = ; + power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; + clocks = <&vdosys1 CLK_VDO1_DP_INTF0_MM>, + <&vdosys1 CLK_VDO1_DPINTF>, + <&apmixedsys CLK_APMIXED_TVDPLL2>; + clock-names = "engine", "pixel", "pll"; + status = "disabled"; + }; }; }; From patchwork Thu Nov 10 06:37:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 13038375 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D81DC433FE for ; Thu, 10 Nov 2022 07:18:12 +0000 (UTC) DKIM-Signature: v=1; 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Thu, 10 Nov 2022 00:17:53 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 10 Nov 2022 14:37:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 10 Nov 2022 14:37:18 +0800 From: Bo-Chen Chen To: , , CC: , , , , , , Bo-Chen Chen Subject: [PATCH v4 2/4] arm64: dts: mt8195: Add edptx and dptx nodes Date: Thu, 10 Nov 2022 14:37:14 +0800 Message-ID: <20221110063716.25677-3-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221110063716.25677-1-rex-bc.chen@mediatek.com> References: <20221110063716.25677-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221109_231757_249420_8B2289F3 X-CRM114-Status: GOOD ( 11.12 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org In MT8195, we use edptx as the internal display interface and use dptx as the external display interface. Therefore, we need to add these nodes to support the internal display and the external display. - Add dp calibration data in the efuse node. - Add edptx and dptx nodes for MT8195. Signed-off-by: Bo-Chen Chen Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index c380738d10cb..7acbef5a4517 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1244,6 +1244,9 @@ reg = <0x189 0x2>; bits = <7 5>; }; + dp_calibration: dp-data@1ac { + reg = <0x1ac 0x10>; + }; }; u3phy2: t-phy@11c40000 { @@ -2205,5 +2208,27 @@ clock-names = "engine", "pixel", "pll"; status = "disabled"; }; + + edp_tx: edp-tx@1c500000 { + compatible = "mediatek,mt8195-edp-tx"; + reg = <0 0x1c500000 0 0x8000>; + nvmem-cells = <&dp_calibration>; + nvmem-cell-names = "dp_calibration_data"; + power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>; + interrupts = ; + max-linkrate-mhz = <8100>; + status = "disabled"; + }; + + dp_tx: dp-tx@1c600000 { + compatible = "mediatek,mt8195-dp-tx"; + reg = <0 0x1c600000 0 0x8000>; + nvmem-cells = <&dp_calibration>; + nvmem-cell-names = "dp_calibration_data"; + power-domains = <&spm MT8195_POWER_DOMAIN_DP_TX>; + interrupts = ; + max-linkrate-mhz = <8100>; + status = "disabled"; + }; }; }; From patchwork Thu Nov 10 06:37:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 13038388 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93E78C43219 for ; Thu, 10 Nov 2022 07:38:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Thu, 10 Nov 2022 14:37:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 10 Nov 2022 14:37:18 +0800 From: Bo-Chen Chen To: , , CC: , , , , , , Bo-Chen Chen Subject: [PATCH v4 3/4] arm64: dts: mediatek: cherry: Add dp-intf ports Date: Thu, 10 Nov 2022 14:37:15 +0800 Message-ID: <20221110063716.25677-4-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221110063716.25677-1-rex-bc.chen@mediatek.com> References: <20221110063716.25677-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221109_233759_939558_99D6DCFB X-CRM114-Status: UNSURE ( 8.58 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Dp-intfs provide the pixel data to edptx and dptx. To support edptx and dptx, we need to add dp-intf0 and dp-intf1 ports. Signed-off-by: Bo-Chen Chen Reviewed-by: AngeloGioacchino Del Regno --- .../arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 9b62e161db26..303dc32c64dc 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -120,6 +120,24 @@ }; }; +&dp_intf0 { + status = "okay"; + + port { + dp_intf0_out: endpoint { + }; + }; +}; + +&dp_intf1 { + status = "okay"; + + port { + dp_intf1_out: endpoint { + }; + }; +}; + &i2c0 { status = "okay"; From patchwork Thu Nov 10 06:37:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 13038339 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6C234C4332F for ; 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Wed, 09 Nov 2022 23:37:52 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 10 Nov 2022 14:37:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 10 Nov 2022 14:37:18 +0800 From: Bo-Chen Chen To: , , CC: , , , , , , Bo-Chen Chen Subject: [PATCH v4 4/4] arm64: dts: mediatek: cherry: Add edptx and dptx support Date: Thu, 10 Nov 2022 14:37:16 +0800 Message-ID: <20221110063716.25677-5-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221110063716.25677-1-rex-bc.chen@mediatek.com> References: <20221110063716.25677-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221109_223804_319069_FB25F55B X-CRM114-Status: GOOD ( 10.76 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org In cherry projects, we use edptx as the internal display interface and use dptx as the external display interface. To support this, we need to add more properties. - Add pinctrls for edptx and dptx. - Add ports for edptx and dptx. The port connections for the internal and external display: dp-intf0 -> edptx -> panel dp-intf1 -> dptx The edptx endpoint is kept empty for now, as the panel addition will come in a later commit. Signed-off-by: Bo-Chen Chen Reviewed-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 303dc32c64dc..560103e29017 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -125,6 +125,7 @@ port { dp_intf0_out: endpoint { + remote-endpoint = <&edp_in>; }; }; }; @@ -134,6 +135,59 @@ port { dp_intf1_out: endpoint { + remote-endpoint = <&dptx_in>; + }; + }; +}; + +&edp_tx { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&edptx_pins_default>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + edp_in: endpoint { + remote-endpoint = <&dp_intf0_out>; + }; + }; + + port@1 { + reg = <1>; + edp_out: endpoint { + data-lanes = <0 1 2 3>; + }; + }; + }; +}; + +&dp_tx { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&dptx_pin>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dptx_in: endpoint { + remote-endpoint = <&dp_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + dptx_out: endpoint { + data-lanes = <0 1 2 3>; + }; }; }; }; @@ -497,6 +551,20 @@ }; }; + edptx_pins_default: edptx-default-pins { + pins-cmd-dat { + pinmux = ; + bias-pull-up; + }; + }; + + dptx_pin: dptx-default-pins { + pins-cmd-dat { + pinmux = ; + bias-pull-up; + }; + }; + i2c0_pins: i2c0-default-pins { pins-bus { pinmux = ,