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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org SPI devices use the spi_device_id for module autoloading even on systems using device tree. Add the spi_device_id entry to enable autoloading for the 3.5inch RPi Display (rpi-lcd-35). Signed-off-by: Carlo Caione --- drivers/gpu/drm/tiny/ili9486.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/tiny/ili9486.c b/drivers/gpu/drm/tiny/ili9486.c index 1bb847466b10..bd37dfe8dd05 100644 --- a/drivers/gpu/drm/tiny/ili9486.c +++ b/drivers/gpu/drm/tiny/ili9486.c @@ -183,6 +183,7 @@ MODULE_DEVICE_TABLE(of, ili9486_of_match); static const struct spi_device_id ili9486_id[] = { { "ili9486", 0 }, + { "rpi-lcd-35", 0 }, { } }; MODULE_DEVICE_TABLE(spi, ili9486_id); From patchwork Thu Nov 17 08:47:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carlo Caione X-Patchwork-Id: 13046337 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 557DAC4332F for ; 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Thu, 17 Nov 2022 00:47:53 -0800 (PST) From: Carlo Caione Date: Thu, 17 Nov 2022 09:47:40 +0100 Subject: [PATCH 2/3] drm/tiny: ili9486: Do not assume 8-bit only SPI controllers MIME-Version: 1.0 Message-Id: <20221116-s905x_spi_ili9486-v1-2-630401cb62d5@baylibre.com> References: <20221116-s905x_spi_ili9486-v1-0-630401cb62d5@baylibre.com> In-Reply-To: <20221116-s905x_spi_ili9486-v1-0-630401cb62d5@baylibre.com> To: Kamlesh Gurudasani , Mark Brown , Neil Armstrong , Jerome Brunet , David Airlie , Martin Blumenstingl , Kevin Hilman , Daniel Vetter Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, dri-devel@lists.freedesktop.org, Carlo Caione X-Mailer: b4 0.10.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221117_004801_182111_CDB82001 X-CRM114-Status: GOOD ( 17.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The ILI9486 driver is wrongly assuming that the SPI panel is interfaced only with 8-bit SPI controllers and consequently that the pixel data passed by the MIPI DBI subsystem are already swapped before being sent over SPI using 8 bits-per-word. This is not always true for all the SPI controllers. Make the command function more general to not only support 8-bit only SPI controllers and support sending un-swapped data over SPI using 16 bits-per-word when dealing with pixel data. Signed-off-by: Carlo Caione --- drivers/gpu/drm/tiny/ili9486.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/tiny/ili9486.c b/drivers/gpu/drm/tiny/ili9486.c index bd37dfe8dd05..4d80a413338f 100644 --- a/drivers/gpu/drm/tiny/ili9486.c +++ b/drivers/gpu/drm/tiny/ili9486.c @@ -43,6 +43,7 @@ static int waveshare_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par, size_t num) { struct spi_device *spi = mipi->spi; + unsigned int bpw = 8; void *data = par; u32 speed_hz; int i, ret; @@ -56,8 +57,6 @@ static int waveshare_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par, * The displays are Raspberry Pi HATs and connected to the 8-bit only * SPI controller, so 16-bit command and parameters need byte swapping * before being transferred as 8-bit on the big endian SPI bus. - * Pixel data bytes have already been swapped before this function is - * called. */ buf[0] = cpu_to_be16(*cmd); gpiod_set_value_cansleep(mipi->dc, 0); @@ -71,12 +70,18 @@ static int waveshare_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par, for (i = 0; i < num; i++) buf[i] = cpu_to_be16(par[i]); num *= 2; - speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num); data = buf; } + /* + * Check whether pixel data bytes needs to be swapped or not + */ + if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !mipi->swap_bytes) + bpw = 16; + gpiod_set_value_cansleep(mipi->dc, 1); - ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, data, num); + speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num); + ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, data, num); free: kfree(buf); From patchwork Thu Nov 17 08:47:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carlo Caione X-Patchwork-Id: 13046334 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E59AC4332F for ; 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Thu, 17 Nov 2022 00:47:54 -0800 (PST) From: Carlo Caione Date: Thu, 17 Nov 2022 09:47:41 +0100 Subject: [PATCH 3/3] spi: meson-spicc: Lower CS between bursts MIME-Version: 1.0 Message-Id: <20221116-s905x_spi_ili9486-v1-3-630401cb62d5@baylibre.com> References: <20221116-s905x_spi_ili9486-v1-0-630401cb62d5@baylibre.com> In-Reply-To: <20221116-s905x_spi_ili9486-v1-0-630401cb62d5@baylibre.com> To: Kamlesh Gurudasani , Mark Brown , Neil Armstrong , Jerome Brunet , David Airlie , Martin Blumenstingl , Kevin Hilman , Daniel Vetter Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, dri-devel@lists.freedesktop.org, Carlo Caione X-Mailer: b4 0.10.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221117_004758_699568_330D7A00 X-CRM114-Status: GOOD ( 12.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On some hardware (reproduced on S905X) when a large payload is transmitted over SPI in bursts at the end of each burst, the clock line briefly fluctuates creating spurious clock transitions that are being recognised by the connected device as a genuine pulses, creating an offset in the data being transmitted. Lower the GPIO CS between bursts to avoid the clock being interpreted as valid. Signed-off-by: Carlo Caione --- drivers/spi/spi-meson-spicc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/spi/spi-meson-spicc.c b/drivers/spi/spi-meson-spicc.c index d47f2623a60f..af8d74b53519 100644 --- a/drivers/spi/spi-meson-spicc.c +++ b/drivers/spi/spi-meson-spicc.c @@ -291,6 +291,10 @@ static inline void meson_spicc_setup_burst(struct meson_spicc_device *spicc) static irqreturn_t meson_spicc_irq(int irq, void *data) { struct meson_spicc_device *spicc = (void *) data; + struct spi_device *spi_dev; + + spi_dev = spicc->message->spi; + gpiod_set_value(spi_dev->cs_gpiod, 0); writel_bits_relaxed(SPICC_TC, SPICC_TC, spicc->base + SPICC_STATREG); @@ -309,6 +313,8 @@ static irqreturn_t meson_spicc_irq(int irq, void *data) /* Setup burst */ meson_spicc_setup_burst(spicc); + gpiod_set_value(spi_dev->cs_gpiod, 1); + /* Start burst */ writel_bits_relaxed(SPICC_XCH, SPICC_XCH, spicc->base + SPICC_CONREG);