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[73.214.169.22]) by smtp.gmail.com with ESMTPSA id i15-20020a05620a248f00b006fa9d101775sm236022qkn.33.2022.11.17.02.50.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Nov 2022 02:50:27 -0800 (PST) From: Brian Masney To: andersson@kernel.org Cc: agross@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, jejb@linux.ibm.com, martin.petersen@oracle.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Subject: [PATCH 1/2] scsi: ufs: ufs-qcom: add basic interconnect support Date: Thu, 17 Nov 2022 05:49:56 -0500 Message-Id: <20221117104957.254648-2-bmasney@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221117104957.254648-1-bmasney@redhat.com> References: <20221117104957.254648-1-bmasney@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The firmware on the Qualcomm platforms expects the interconnect votes to be present. Let's add very basic support where the maximum throughput is requested to match what's done in a few other drivers. This will not break boot on systems where the interconnects and interconnect-names properties are not specified in device tree for UFS since the interconnect framework will silently return. Signed-off-by: Brian Masney --- drivers/ufs/host/ufs-qcom.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 8ad1415e10b6..55bf8dd88985 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -936,6 +937,22 @@ static const struct reset_control_ops ufs_qcom_reset_ops = { .deassert = ufs_qcom_reset_deassert, }; +static int ufs_qcom_icc_init(struct device *dev, char *pathname) +{ + struct icc_path *path; + int ret; + + path = devm_of_icc_get(dev, pathname); + if (IS_ERR(path)) + return dev_err_probe(dev, PTR_ERR(path), "failed to acquire interconnect path\n"); + + ret = icc_set_bw(path, 0, UINT_MAX); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to set bandwidth request\n"); + + return 0; +} + /** * ufs_qcom_init - bind phy with controller * @hba: host controller instance @@ -991,6 +1008,14 @@ static int ufs_qcom_init(struct ufs_hba *hba) err = dev_err_probe(dev, PTR_ERR(host->generic_phy), "Failed to get PHY\n"); goto out_variant_clear; } + + err = ufs_qcom_icc_init(dev, "ufs-ddr"); + if (err) + goto out_variant_clear; + + err = ufs_qcom_icc_init(dev, "cpu-ufs"); + if (err) + goto out_variant_clear; } host->device_reset = devm_gpiod_get_optional(dev, "reset", From patchwork Thu Nov 17 10:49:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Masney X-Patchwork-Id: 13046570 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4BA2C433FE for ; Thu, 17 Nov 2022 10:52:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239427AbiKQKwa (ORCPT ); Thu, 17 Nov 2022 05:52:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239444AbiKQKwY (ORCPT ); Thu, 17 Nov 2022 05:52:24 -0500 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C68017E35 for ; Thu, 17 Nov 2022 02:50:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1668682231; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gjXLVyb6zwFPJe/OWlCp49ZVjP/sJNSDFeUY35Ol3A8=; b=W6q/bekgWbQSZm44C3hxfB2kt2AUHmuMcmOXoSSFzC2B5nbXPVlzQVmMSQYIJ+gX3O6+bL R/FLtYkf6FqHS9l3QpGYHHYiDdAahW1uHpwHjhTl1CwoqXdrjEdqUI5iQY9P+C2LypVg7/ pCx7EFofAHyrq71FVD34Sinj4LZPFkM= Received: from mail-qk1-f199.google.com (mail-qk1-f199.google.com [209.85.222.199]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_128_GCM_SHA256) id us-mta-662-dvcpvNutMMqUvNfjdQLkwQ-1; Thu, 17 Nov 2022 05:50:30 -0500 X-MC-Unique: dvcpvNutMMqUvNfjdQLkwQ-1 Received: by mail-qk1-f199.google.com with SMTP id i21-20020a05620a405500b006fb25ba3e00so1700870qko.1 for ; Thu, 17 Nov 2022 02:50:30 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gjXLVyb6zwFPJe/OWlCp49ZVjP/sJNSDFeUY35Ol3A8=; b=Xt1YwXJyoQ25CypPfOdL6IqOk2zQqkk6XXHULWpwTUQfiETJtXF7jS2P7AmT2pvQ/i u7UjGXNbbw+RS7lQxC4y9KwMT5+o322unmG66j731C6cdh0YiXou5uSA++xYJjhALHLI Yb9i1aRiCMpQs2RMVGfwMFcbGzjBc33ropSTyYB3Pyz2XXfVpeo+3tdHqeOjeTTanyOO IIrPwOnbhrrqs4e9OK1vqu0ZoIpRXQ8u3s0F9HemRwjF+CHD4FyUg7wNOMCdNO25JVT7 SL3+9XLMrCAueVDXYEDLVq3Ju6NKvtgezxp8behMzapj/HpY97stsjpE3UuguwFiBDgw 9FxA== X-Gm-Message-State: ANoB5pnXkArPCPMY1Rj0C6+cu3ngYbyqFdqiDKf7OoKHsrRqkn5rAVE3 KdYFk3eKHGoBPmuF8nsaIRjIWes1OFRa9nT+vnLOkd03uQU6rLlBMrdnKo+SJGKJTZHnUR43+5v ku0QkJ/7ZcqjGcqaGiXicASkYbQ== X-Received: by 2002:a37:5fc2:0:b0:6fa:9812:42f2 with SMTP id t185-20020a375fc2000000b006fa981242f2mr1057173qkb.754.1668682229905; Thu, 17 Nov 2022 02:50:29 -0800 (PST) X-Google-Smtp-Source: AA0mqf4RXZjMGaetDJxgafbFUWe5YQR5qu294zU1xPcswkZUjgobAH+kXp2W1odUKDMEVqvGYKrhTw== X-Received: by 2002:a37:5fc2:0:b0:6fa:9812:42f2 with SMTP id t185-20020a375fc2000000b006fa981242f2mr1057156qkb.754.1668682229703; Thu, 17 Nov 2022 02:50:29 -0800 (PST) Received: from x1.redhat.com (c-73-214-169-22.hsd1.pa.comcast.net. [73.214.169.22]) by smtp.gmail.com with ESMTPSA id i15-20020a05620a248f00b006fa9d101775sm236022qkn.33.2022.11.17.02.50.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Nov 2022 02:50:29 -0800 (PST) From: Brian Masney To: andersson@kernel.org Cc: agross@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, jejb@linux.ibm.com, martin.petersen@oracle.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Subject: [PATCH 2/2] arm64: dts: qcom: sc8280xp: add interconnect properties to ufs nodes Date: Thu, 17 Nov 2022 05:49:57 -0500 Message-Id: <20221117104957.254648-3-bmasney@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221117104957.254648-1-bmasney@redhat.com> References: <20221117104957.254648-1-bmasney@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the missing interconnects and interconnect-names properties to the ufs_mem_hc and ufs_card_hc nodes. Signed-off-by: Brian Masney --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 6bc12e507d21..17c8dc8d4767 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -856,6 +856,10 @@ ufs_mem_hc: ufs@1d84000 { iommus = <&apps_smmu 0xe0 0x0>; + interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; + interconnect-names = "ufs-ddr", "cpu-ufs"; + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, <&gcc GCC_UFS_PHY_AHB_CLK>, @@ -924,6 +928,10 @@ ufs_card_hc: ufs@1da4000 { iommus = <&apps_smmu 0x4a0 0x0>; + interconnects = <&aggre2_noc MASTER_UFS_CARD 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_CARD_CFG 0>; + interconnect-names = "ufs-ddr", "cpu-ufs"; + clocks = <&gcc GCC_UFS_CARD_AXI_CLK>, <&gcc GCC_AGGRE_UFS_CARD_AXI_CLK>, <&gcc GCC_UFS_CARD_AHB_CLK>,