From patchwork Fri Nov 18 16:44:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13048477 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A25A0C352A1 for ; Fri, 18 Nov 2022 16:45:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id 8EA73C433D6; Fri, 18 Nov 2022 16:45:24 +0000 (UTC) Received: from xavier.telenet-ops.be (xavier.telenet-ops.be [195.130.132.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.kernel.org (Postfix) with ESMTPS id 77323C43470 for ; Fri, 18 Nov 2022 16:45:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org 77323C43470 Authentication-Results: smtp.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed10:d0b:c833:41f6:da0e]) by xavier.telenet-ops.be with bizsmtp id lslC2800E29fmst01slC57; Fri, 18 Nov 2022 17:45:13 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1ow4UK-000pA9-Ec; Fri, 18 Nov 2022 17:45:12 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1ow4UJ-00FrgI-TO; Fri, 18 Nov 2022 17:45:11 +0100 From: Geert Uytterhoeven List-Id: To: arm-soc , soc Cc: Magnus Damm , linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven Subject: [GIT PULL 1/7] Renesas ARM defconfig updates for v6.2 Date: Fri, 18 Nov 2022 17:44:58 +0100 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 The following changes since commit 9abf2313adc1ca1b6180c508c25f22f9395cc780: Linux 6.1-rc1 (2022-10-16 15:36:24 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-arm-defconfig-for-v6.2-tag1 for you to fetch changes up to fa8eec59570923f4132253e61c45f9d70377f049: arm64: defconfig: Enable Renesas R-Car S4-8 Spider Ethernet devices (2022-11-18 17:12:30 +0100) ---------------------------------------------------------------- Renesas ARM defconfig updates for v6.2 - Enable support for Renesas R-Car S4-8 Spider Ethernet devices in the arm64 defconfig. ---------------------------------------------------------------- Yoshihiro Shimoda (1): arm64: defconfig: Enable Renesas R-Car S4-8 Spider Ethernet devices arch/arm64/configs/defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) From patchwork Fri Nov 18 16:44:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13048481 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9320FC43217 for ; Fri, 18 Nov 2022 16:45:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id 7B69FC43470; Fri, 18 Nov 2022 16:45:34 +0000 (UTC) Received: from riemann.telenet-ops.be (riemann.telenet-ops.be [195.130.137.80]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.kernel.org (Postfix) with ESMTPS id 75E07C433D7 for ; Fri, 18 Nov 2022 16:45:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org 75E07C433D7 Authentication-Results: smtp.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from andre.telenet-ops.be (andre.telenet-ops.be [IPv6:2a02:1800:120:4::f00:15]) by riemann.telenet-ops.be (Postfix) with ESMTPS id 4NDN1v2lZRz4xJXT for ; Fri, 18 Nov 2022 17:45:23 +0100 (CET) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed10:d0b:c833:41f6:da0e]) by andre.telenet-ops.be with bizsmtp id lslD2800129fmst01slDAw; Fri, 18 Nov 2022 17:45:14 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1ow4UK-000pAA-Os; Fri, 18 Nov 2022 17:45:12 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1ow4UJ-00FrgO-U1; Fri, 18 Nov 2022 17:45:11 +0100 From: Geert Uytterhoeven List-Id: To: arm-soc , soc Cc: Magnus Damm , linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven Subject: [GIT PULL 2/7] Renesas ARM DT updates for v6.2 (take two) Date: Fri, 18 Nov 2022 17:44:59 +0100 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 The following changes since commit b9a0be2054964026aa58966ce9724b672f210835: arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts (2022-10-28 14:23:00 +0200) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-arm-dt-for-v6.2-tag2 for you to fetch changes up to 884af88b756ccb57ed7cb6241c1fbd1080732124: arm64: dts: renesas: spider-ethernet: Enable Ethernet Switch and SERDES (2022-11-18 17:08:01 +0100) ---------------------------------------------------------------- Renesas ARM DT updates for v6.2 (take two) - Timer (TMU and CMT) and quad Cortex-A76 CPU topology support for the R-Car V4H SoC, - Watchdog, L2 cache, and system controller support for the RZ/V2M SoC on the RZ/V2M Evaluation Kit 2.0, - Ethernet Switch and SERDES supports for the R-Car S4-8 SoC and the Spider development board, - Miscellaneous fixes and improvements. ---------------------------------------------------------------- Biju Das (2): arm64: dts: renesas: r9a09g011: Add L2 Cache node arm64: dts: renesas: r9a09g011: Add system controller node Fabrizio Castro (4): arm64: dts: renesas: r9a09g011: Fix unit address format error arm64: dts: renesas: r9a09g011: Fix I2C SoC specific strings arm64: dts: renesas: r9a09g011: Add watchdog node arm64: dts: renesas: rzv2mevk2: Enable watchdog Geert Uytterhoeven (5): arm64: dts: renesas: r8a779g0: Add L3 cache controller arm64: dts: renesas: r8a779g0: Add secondary CA76 CPU cores arm64: dts: renesas: r8a779g0: Add CPUIdle support arm64: dts: renesas: r8a779g0: Add CPU core clocks arm64: dts: renesas: r8a779g0: Add CA76 operating points Lad Prabhakar (1): arm64: dts: renesas: rzg2l: Drop #address-cells from pinctrl nodes Pierre Gondois (1): arm64: dts: renesas: rzg2l: Add missing cache-level properties Thanh Quan (1): arm64: dts: renesas: r8a779g0: Add CMT node Wolfram Sang (5): arm64: dts: renesas: r8a779f0: Fix HSCIF "brg_int" clock arm64: dts: renesas: r8a779f0: Fix SCIF "brg_int" clock arm64: dts: renesas: r8a779g0: Add TMU nodes arm64: dts: renesas: white-hawk-cpu: Sort RWDT entry correctly arm64: dts: renesas: spider-cpu: Switch from SCIF3 to HSCIF0 Yoshihiro Shimoda (2): arm64: dts: renesas: r8a779f0: Add Ethernet Switch and SERDES nodes arm64: dts: renesas: spider-ethernet: Enable Ethernet Switch and SERDES .../boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 30 +-- .../boot/dts/renesas/r8a779f0-spider-ethernet.dtsi | 90 +++++++ arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 126 +++++++++- .../boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi | 8 +- arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 265 ++++++++++++++++++++- arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 1 + arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 2 +- arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 2 +- arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts | 4 + arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 31 ++- 10 files changed, 522 insertions(+), 37 deletions(-) From patchwork Fri Nov 18 16:45:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13048476 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 55BE2C4167D for ; Fri, 18 Nov 2022 16:45:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id 29639C4314C; Fri, 18 Nov 2022 16:45:23 +0000 (UTC) Received: from xavier.telenet-ops.be (xavier.telenet-ops.be [195.130.132.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.kernel.org (Postfix) with ESMTPS id 77148C433B5 for ; Fri, 18 Nov 2022 16:45:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org 77148C433B5 Authentication-Results: smtp.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed10:d0b:c833:41f6:da0e]) by xavier.telenet-ops.be with bizsmtp id lslC2800F29fmst01slC58; Fri, 18 Nov 2022 17:45:13 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1ow4UK-000pAB-GK; Fri, 18 Nov 2022 17:45:12 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1ow4UJ-00FrgW-Uf; Fri, 18 Nov 2022 17:45:11 +0100 From: Geert Uytterhoeven List-Id: To: arm-soc , soc Cc: Magnus Damm , linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven Subject: [GIT PULL 3/7] Renesas driver updates for v6.2 (take two) Date: Fri, 18 Nov 2022 17:45:00 +0100 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 The following changes since commit b3acbca3c80e612478b354e43c1480c3fc15873e: soc: renesas: Kconfig: Explicitly select GPIOLIB and PINCTRL config under SOC_RENESAS (2022-10-17 12:18:49 +0200) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-drivers-for-v6.2-tag2 for you to fetch changes up to 7e20044052317d5f2942b061c4cacdb6790790a2: soc: renesas: Identify RZ/V2M SoC (2022-11-17 20:20:42 +0100) ---------------------------------------------------------------- Renesas driver updates for v6.2 (take two) - Add support for identifying the SoC revision on RZ/V2M. ---------------------------------------------------------------- Phil Edworthy (1): soc: renesas: Identify RZ/V2M SoC drivers/soc/renesas/renesas-soc.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) From patchwork Fri Nov 18 16:45:01 2022 Content-Type: text/plain; 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dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from andre.telenet-ops.be (andre.telenet-ops.be [IPv6:2a02:1800:120:4::f00:15]) by weierstrass.telenet-ops.be (Postfix) with ESMTPS id 4NDN1v2zQLz4x7k8 for ; Fri, 18 Nov 2022 17:45:23 +0100 (CET) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed10:d0b:c833:41f6:da0e]) by andre.telenet-ops.be with bizsmtp id lslD2800229fmst01slDAx; Fri, 18 Nov 2022 17:45:14 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1ow4UK-000pAC-RR; Fri, 18 Nov 2022 17:45:12 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1ow4UJ-00Frgd-VK; Fri, 18 Nov 2022 17:45:11 +0100 From: Geert Uytterhoeven List-Id: To: arm-soc , soc Cc: Magnus Damm , linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven Subject: [GIT PULL 4/7] Renesas DT binding updates for v6.2 (take two) Date: Fri, 18 Nov 2022 17:45:01 +0100 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 The following changes since commit 7dd1d57c052e88f98b9e9145461b13bca019d108: dt-bindings: soc: renesas: renesas.yaml: Document Renesas RZ/Five SoC (2022-10-28 14:43:12 +0200) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-dt-bindings-for-v6.2-tag2 for you to fetch changes up to a884f187760ee0c6033296aa50845e2d1e0e8430: dt-bindings: arm: renesas: Document Renesas RZ/V2M System Configuration (2022-11-17 20:18:21 +0100) ---------------------------------------------------------------- Renesas DT binding updates for v6.2 (take two) - Document support for the Andes Technology AX45MP RISC-V CPU Core, as used on the Renesas RZ/Five SoC, - Document support for the Renesas RZ/V2M System Configuration. ---------------------------------------------------------------- Lad Prabhakar (2): dt-bindings: riscv: Sort the CPU core list alphabetically dt-bindings: riscv: Add Andes AX45MP core to the list Phil Edworthy (1): dt-bindings: arm: renesas: Document Renesas RZ/V2M System Configuration Documentation/devicetree/bindings/riscv/cpus.yaml | 11 +++--- .../soc/renesas/renesas,r9a09g011-sys.yaml | 43 ++++++++++++++++++++++ 2 files changed, 49 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g011-sys.yaml From patchwork Fri Nov 18 16:45:02 2022 Content-Type: text/plain; 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dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed10:d0b:c833:41f6:da0e]) by xavier.telenet-ops.be with bizsmtp id lslD2800a29fmst01slD5d; Fri, 18 Nov 2022 17:45:13 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1ow4UK-000pAD-Tz; Fri, 18 Nov 2022 17:45:12 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1ow4UJ-00Frgk-Vy; Fri, 18 Nov 2022 17:45:11 +0100 From: Geert Uytterhoeven List-Id: To: arm-soc , soc Cc: Magnus Damm , linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven Subject: [GIT PULL 5/7] Renesas RISC-V defconfig updates for v6.2 Date: Fri, 18 Nov 2022 17:45:02 +0100 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 The following changes since commit 9abf2313adc1ca1b6180c508c25f22f9395cc780: Linux 6.1-rc1 (2022-10-16 15:36:24 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-riscv-defconfig-for-v6.2-tag1 for you to fetch changes up to 1776fca7fadbac2260a22e2ecb708e8a1ba9310d: riscv: configs: defconfig: Enable Renesas RZ/Five SoC (2022-11-10 16:37:58 +0100) ---------------------------------------------------------------- Renesas RISC-V defconfig updates for v6.2 - Enable support for the Renesas RZ/Five SoC and the RZ/Five SMARC EVK board in the risc-v defconfig. ---------------------------------------------------------------- Lad Prabhakar (1): riscv: configs: defconfig: Enable Renesas RZ/Five SoC arch/riscv/configs/defconfig | 3 +++ 1 file changed, 3 insertions(+) From patchwork Fri Nov 18 16:45:03 2022 Content-Type: text/plain; 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dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed10:d0b:c833:41f6:da0e]) by baptiste.telenet-ops.be with bizsmtp id lslE2800229fmst01slEPe; Fri, 18 Nov 2022 17:45:14 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1ow4UK-000pAE-OJ; Fri, 18 Nov 2022 17:45:12 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1ow4UK-00Frgr-0M; Fri, 18 Nov 2022 17:45:12 +0100 From: Geert Uytterhoeven List-Id: To: arm-soc , soc Cc: Magnus Damm , linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven Subject: [GIT PULL 6/7] Renesas RISC-V DT updates for v6.2 Date: Fri, 18 Nov 2022 17:45:03 +0100 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 The following changes since commit b9a0be2054964026aa58966ce9724b672f210835: arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts (2022-10-28 14:23:00 +0200) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-riscv-dt-for-v6.2-tag1 for you to fetch changes up to 40005cb6093e92d24a1bdbc444311c25e4b28878: riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C (2022-11-17 20:27:02 +0100) ---------------------------------------------------------------- Renesas RISC-V DT updates for v6.2 - Add initial support for the Renesas RZ/Five SoC and the Renesas RZ/Five SMARC EVK development board. ---------------------------------------------------------------- Lad Prabhakar (5): riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK MAINTAINERS: Add entry for Renesas RISC-V riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C MAINTAINERS | 3 +- arch/riscv/boot/dts/Makefile | 1 + arch/riscv/boot/dts/renesas/Makefile | 2 + arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 59 ++++++++++++++++++++ arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dts | 27 +++++++++ arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi | 47 ++++++++++++++++ arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi | 64 ++++++++++++++++++++++ 7 files changed, 202 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/boot/dts/renesas/Makefile create mode 100644 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi create mode 100644 arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dts create mode 100644 arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi create mode 100644 arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi From patchwork Fri Nov 18 16:45:04 2022 Content-Type: text/plain; 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dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed10:d0b:c833:41f6:da0e]) by xavier.telenet-ops.be with bizsmtp id lslD2800429fmst01slD5B; Fri, 18 Nov 2022 17:45:13 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1ow4UK-000pAF-Jc; Fri, 18 Nov 2022 17:45:12 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1ow4UK-00Frgy-16; Fri, 18 Nov 2022 17:45:12 +0100 From: Geert Uytterhoeven List-Id: To: arm-soc , soc Cc: Magnus Damm , linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven Subject: [GIT PULL 7/7] Renesas RISC-V SoC updates for v6.2 Date: Fri, 18 Nov 2022 17:45:04 +0100 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 The following changes since commit 9abf2313adc1ca1b6180c508c25f22f9395cc780: Linux 6.1-rc1 (2022-10-16 15:36:24 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-riscv-soc-for-v6.2-tag1 for you to fetch changes up to 8292493c22c8e28b6e67a01e0f5c6db1cf231eb1: riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option (2022-11-10 16:34:05 +0100) ---------------------------------------------------------------- Renesas RISC-V SoC updates for v6.2 - Add Kconfig option for Renesas RISC-V SoCs. ---------------------------------------------------------------- Lad Prabhakar (1): riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option arch/riscv/Kconfig.socs | 5 +++++ 1 file changed, 5 insertions(+)