From patchwork Fri Nov 25 07:19:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: shaozhengchao X-Patchwork-Id: 13055572 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 210D6C433FE for ; Fri, 25 Nov 2022 07:13:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229526AbiKYHNq (ORCPT ); Fri, 25 Nov 2022 02:13:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229455AbiKYHNp (ORCPT ); Fri, 25 Nov 2022 02:13:45 -0500 Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B8BA1B1F1 for ; Thu, 24 Nov 2022 23:13:44 -0800 (PST) Received: from dggpeml500026.china.huawei.com (unknown [172.30.72.54]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4NJR0N5HGNzmW9X; Fri, 25 Nov 2022 15:13:08 +0800 (CST) Received: from huawei.com (10.175.101.6) by dggpeml500026.china.huawei.com (7.185.36.106) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Fri, 25 Nov 2022 15:13:42 +0800 From: Zhengchao Shao To: , , , , , , CC: , , , Subject: [PATCH net] sfc: fix error process in efx_ef100_pci_sriov_enable() Date: Fri, 25 Nov 2022 15:19:58 +0800 Message-ID: <20221125071958.276454-1-shaozhengchao@huawei.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.175.101.6] X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To dggpeml500026.china.huawei.com (7.185.36.106) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org There are two issues in efx_ef100_pci_sriov_enable(): 1. When it doesn't have MAE Privilege, it doesn't disable pci sriov. 2. When creating VF successfully, it should return vf nums instead of 0. Compiled test only. Fixes: 08135eecd07f ("sfc: add skeleton ef100 VF representors") Fixes: 78a9b3c47bef ("sfc: add EF100 VF support via a write to sriov_numvfs") Signed-off-by: Zhengchao Shao --- drivers/net/ethernet/sfc/ef100_sriov.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/sfc/ef100_sriov.c b/drivers/net/ethernet/sfc/ef100_sriov.c index 94bdbfcb47e8..adf7fb09940e 100644 --- a/drivers/net/ethernet/sfc/ef100_sriov.c +++ b/drivers/net/ethernet/sfc/ef100_sriov.c @@ -25,15 +25,17 @@ static int efx_ef100_pci_sriov_enable(struct efx_nic *efx, int num_vfs) if (rc) goto fail1; - if (!nic_data->grp_mae) + if (!nic_data->grp_mae) { + pci_disable_sriov(dev); return 0; + } for (i = 0; i < num_vfs; i++) { rc = efx_ef100_vfrep_create(efx, i); if (rc) goto fail2; } - return 0; + return num_vfs; fail2: list_for_each_entry_safe(efv, next, &efx->vf_reps, list)