From patchwork Wed Nov 30 05:34:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Riana Tauro X-Patchwork-Id: 13059464 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2DF77C4332F for ; Wed, 30 Nov 2022 05:33:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1B7CA10E28E; Wed, 30 Nov 2022 05:33:28 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4B9DF10E28A for ; Wed, 30 Nov 2022 05:33:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669786393; x=1701322393; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1LV6iMgHAkb8mW7gtOpVicyxmdQBxZY1o5J/MIahREA=; b=T3r31RKuXRZmw45LA+Pti6+Yr5253wqWqS9qZclDMwkwt9m1vRjLZGpd dUpJgCDbyciHps6yZcXHLkZrXea6d95Jf6jEhzmYNWDyH7KUqVTPg+Cj4 TvDX6ClrNfYa4S864lx8yHM2VWABYZ1A86IRdPGAFypp0iwFB/+TD5URP ByzKmpx7nbiSLSlOLQAWz8OZ5O+cAj6VaZYQxMb+LUTGfINNCBfjendQq 27aIv4vscFIjNmK2VAPdZ8oSXTC44Zy+DYGh/Rz/+PsXMFRy8uEdKPO7K 6W2snL7PKZKMYRnxBnghJaiNXEP6unzUngYmYp1V/hwmWxYXxCgPlI3ft g==; X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="401588246" X-IronPort-AV: E=Sophos;i="5.96,205,1665471600"; d="scan'208";a="401588246" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 21:33:13 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="818498601" X-IronPort-AV: E=Sophos;i="5.96,205,1665471600"; d="scan'208";a="818498601" Received: from rtauro-desk.iind.intel.com ([10.190.239.41]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 21:33:10 -0800 From: Riana Tauro To: intel-gfx@lists.freedesktop.org Date: Wed, 30 Nov 2022 11:04:25 +0530 Message-Id: <20221130053427.2207600-2-riana.tauro@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130053427.2207600-1-riana.tauro@intel.com> References: <20221130053427.2207600-1-riana.tauro@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v5 1/3] drm/i915/selftests: Rename librapl library to libpower X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Rename librapl files to libpower and replace librapl with libpower prefix. No functional changes v2: update commit message (Anshuman) Signed-off-by: Riana Tauro Reviewed-by: Anshuman Gupta Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/Makefile | 2 +- drivers/gpu/drm/i915/gt/selftest_rc6.c | 12 ++++++------ drivers/gpu/drm/i915/gt/selftest_rps.c | 8 ++++---- drivers/gpu/drm/i915/gt/selftest_slpc.c | 2 +- .../i915/selftests/{librapl.c => libpower.c} | 10 +++++----- drivers/gpu/drm/i915/selftests/libpower.h | 17 +++++++++++++++++ drivers/gpu/drm/i915/selftests/librapl.h | 17 ----------------- 7 files changed, 34 insertions(+), 34 deletions(-) rename drivers/gpu/drm/i915/selftests/{librapl.c => libpower.c} (69%) create mode 100644 drivers/gpu/drm/i915/selftests/libpower.h delete mode 100644 drivers/gpu/drm/i915/selftests/librapl.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 01974b82d205..ddece53f7c9f 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -342,7 +342,7 @@ i915-$(CONFIG_DRM_I915_SELFTEST) += \ selftests/igt_mmap.o \ selftests/igt_reset.o \ selftests/igt_spinner.o \ - selftests/librapl.o + selftests/libpower.o # virtual gpu code i915-y += i915_vgpu.o diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c index 2ceeadecc639..15b84c428f66 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rc6.c +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c @@ -11,7 +11,7 @@ #include "selftest_rc6.h" #include "selftests/i915_random.h" -#include "selftests/librapl.h" +#include "selftests/libpower.h" static u64 rc6_residency(struct intel_rc6 *rc6) { @@ -51,7 +51,7 @@ int live_rc6_manual(void *arg) if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) return 0; - has_power = librapl_supported(gt->i915); + has_power = libpower_supported(gt->i915); wakeref = intel_runtime_pm_get(gt->uncore->rpm); /* Force RC6 off for starters */ @@ -61,9 +61,9 @@ int live_rc6_manual(void *arg) res[0] = rc6_residency(rc6); dt = ktime_get(); - rc0_power = librapl_energy_uJ(); + rc0_power = libpower_get_energy_uJ(); msleep(250); - rc0_power = librapl_energy_uJ() - rc0_power; + rc0_power = libpower_get_energy_uJ() - rc0_power; dt = ktime_sub(ktime_get(), dt); res[1] = rc6_residency(rc6); if ((res[1] - res[0]) >> 10) { @@ -89,9 +89,9 @@ int live_rc6_manual(void *arg) res[0] = rc6_residency(rc6); intel_uncore_forcewake_flush(rc6_to_uncore(rc6), FORCEWAKE_ALL); dt = ktime_get(); - rc6_power = librapl_energy_uJ(); + rc6_power = libpower_get_energy_uJ(); msleep(100); - rc6_power = librapl_energy_uJ() - rc6_power; + rc6_power = libpower_get_energy_uJ() - rc6_power; dt = ktime_sub(ktime_get(), dt); res[1] = rc6_residency(rc6); if (res[1] == res[0]) { diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c b/drivers/gpu/drm/i915/gt/selftest_rps.c index 39f1b7564170..b8b0b0c7617e 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rps.c +++ b/drivers/gpu/drm/i915/gt/selftest_rps.c @@ -19,7 +19,7 @@ #include "selftest_rps.h" #include "selftests/igt_flush_test.h" #include "selftests/igt_spinner.h" -#include "selftests/librapl.h" +#include "selftests/libpower.h" /* Try to isolate the impact of cstates from determing frequency response */ #define CPU_LATENCY 0 /* -1 to disable pm_qos, 0 to disable cstates */ @@ -1095,9 +1095,9 @@ static u64 __measure_power(int duration_ms) u64 dE, dt; dt = ktime_get(); - dE = librapl_energy_uJ(); + dE = libpower_get_energy_uJ(); usleep_range(1000 * duration_ms, 2000 * duration_ms); - dE = librapl_energy_uJ() - dE; + dE = libpower_get_energy_uJ() - dE; dt = ktime_get() - dt; return div64_u64(1000 * 1000 * dE, dt); @@ -1143,7 +1143,7 @@ int live_rps_power(void *arg) if (!intel_rps_is_enabled(rps) || GRAPHICS_VER(gt->i915) < 6) return 0; - if (!librapl_supported(gt->i915)) + if (!libpower_supported(gt->i915)) return 0; if (igt_spinner_init(&spin, gt)) diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c index bd44ce73a504..fc1cdda82ec6 100644 --- a/drivers/gpu/drm/i915/gt/selftest_slpc.c +++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c @@ -169,7 +169,7 @@ static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine) * actually saves power. Let's see if our RAPL measurement supports * that theory. */ - if (!librapl_supported(gt->i915)) + if (!libpower_supported(gt->i915)) return 0; min.freq = slpc->min_freq; diff --git a/drivers/gpu/drm/i915/selftests/librapl.c b/drivers/gpu/drm/i915/selftests/libpower.c similarity index 69% rename from drivers/gpu/drm/i915/selftests/librapl.c rename to drivers/gpu/drm/i915/selftests/libpower.c index eb03b5b28bad..c66e993c5f85 100644 --- a/drivers/gpu/drm/i915/selftests/librapl.c +++ b/drivers/gpu/drm/i915/selftests/libpower.c @@ -1,23 +1,23 @@ // SPDX-License-Identifier: MIT /* - * Copyright © 2020 Intel Corporation + * Copyright © 2022 Intel Corporation */ #include #include "i915_drv.h" -#include "librapl.h" +#include "libpower.h" -bool librapl_supported(const struct drm_i915_private *i915) +bool libpower_supported(const struct drm_i915_private *i915) { /* Discrete cards require hwmon integration */ if (IS_DGFX(i915)) return false; - return librapl_energy_uJ(); + return libpower_get_energy_uJ(); } -u64 librapl_energy_uJ(void) +u64 libpower_get_energy_uJ(void) { unsigned long long power; u32 units; diff --git a/drivers/gpu/drm/i915/selftests/libpower.h b/drivers/gpu/drm/i915/selftests/libpower.h new file mode 100644 index 000000000000..5352981eb946 --- /dev/null +++ b/drivers/gpu/drm/i915/selftests/libpower.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2022 Intel Corporation + */ + +#ifndef SELFTEST_LIBPOWER_H +#define SELFTEST_LIBPOWER_H + +#include + +struct drm_i915_private; + +bool libpower_supported(const struct drm_i915_private *i915); + +u64 libpower_get_energy_uJ(void); + +#endif /* SELFTEST_LIBPOWER_H */ diff --git a/drivers/gpu/drm/i915/selftests/librapl.h b/drivers/gpu/drm/i915/selftests/librapl.h deleted file mode 100644 index e3b24fad0a7a..000000000000 --- a/drivers/gpu/drm/i915/selftests/librapl.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -/* - * Copyright © 2020 Intel Corporation - */ - -#ifndef SELFTEST_LIBRAPL_H -#define SELFTEST_LIBRAPL_H - -#include - -struct drm_i915_private; - -bool librapl_supported(const struct drm_i915_private *i915); - -u64 librapl_energy_uJ(void); - -#endif /* SELFTEST_LIBRAPL_H */ From patchwork Wed Nov 30 05:34:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Riana Tauro X-Patchwork-Id: 13059463 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6AC1CC4332F for ; Wed, 30 Nov 2022 05:33:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E1CC310E28C; Wed, 30 Nov 2022 05:33:25 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9053110E28A for ; Wed, 30 Nov 2022 05:33:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669786395; x=1701322395; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=i6IG+26XnELfsUzMkVZCkULMTTw/TfBQ1l/IugshM0o=; b=Kcfq4pHyAJSVGAIcrNMLgW5MXpr9sCcsHI7YlkppIlkRiUmi0yTqT/Av 2sR22iNqdF548oRUVCYLsM5efzv0p9QOKM1N5wQ4Y2NAE4AsTbRUS5FMK oU7pFYZXMv4LBKAtP4kL/7q33tQCLLuQ5tkHH6DSB9BPffilbovA9pViW Rdpo4ffI+AYimM1C4ncE1G1cSCmWt0fS0yK6+vcGOjd+q/D3F09toHiyL cVBPdZyMn3wE1o1GK+NssckNRnmmKcHU1kTAFyijmb+bwLcCJ8z3VLpgt zq8wH/vkdO5Y33naZs1jsjkTclZAcJGAG+8nF/qsL3FQCeQfwBhQiiywn w==; X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="401588249" X-IronPort-AV: E=Sophos;i="5.96,205,1665471600"; d="scan'208";a="401588249" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 21:33:15 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="818498633" X-IronPort-AV: E=Sophos;i="5.96,205,1665471600"; d="scan'208";a="818498633" Received: from rtauro-desk.iind.intel.com ([10.190.239.41]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 21:33:13 -0800 From: Riana Tauro To: intel-gfx@lists.freedesktop.org Date: Wed, 30 Nov 2022 11:04:26 +0530 Message-Id: <20221130053427.2207600-3-riana.tauro@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130053427.2207600-1-riana.tauro@intel.com> References: <20221130053427.2207600-1-riana.tauro@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v5 2/3] drm/i915/hwmon: Add helper function to obtain energy values X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add an interface to obtain hwmon energy values. The function returns per-gt energy if register is valid else returns the device level energy. This is used by selftest to verify power consumption v2 : use i915_hwmon prefix (Anshuman) v3 : re-use is_visible function of energy to remove redundant code (Anshuman) v4 : fix kernel-doc (Anshuman) add per-gt hwmon support (Ashutosh) Signed-off-by: Riana Tauro Reviewed-by: Anshuman Gupta --- drivers/gpu/drm/i915/i915_hwmon.c | 28 ++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_hwmon.h | 3 +++ 2 files changed, 31 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c index c588a17f97e9..57d4e96d5c72 100644 --- a/drivers/gpu/drm/i915/i915_hwmon.c +++ b/drivers/gpu/drm/i915/i915_hwmon.c @@ -442,6 +442,34 @@ hwm_energy_read(struct hwm_drvdata *ddat, u32 attr, long *val) } } +/** + * i915_hwmon_get_energy - obtains energy value + * @gt: intel_gt structure + * @energy: pointer to store energy in uJ + * + * This function checks for the validity of the underlying energy + * hardware register and obtains the per-gt/package level energy + * values. + * + * Return: 0 on success, -EOPNOTSUPP if register is invalid + */ +int +i915_hwmon_get_energy(struct intel_gt *gt, long *energy) +{ + struct i915_hwmon *hwmon = gt->i915->hwmon; + struct hwm_drvdata *ddat = &hwmon->ddat; + struct hwm_drvdata *ddat_gt = hwmon->ddat_gt + gt->info.id; + + if (hwm_energy_is_visible(ddat_gt, hwmon_energy_input)) + hwm_energy(ddat_gt, energy); + else if (hwm_energy_is_visible(ddat, hwmon_energy_input)) + hwm_energy(ddat, energy); + else + return -EOPNOTSUPP; + + return 0; +} + static umode_t hwm_curr_is_visible(const struct hwm_drvdata *ddat, u32 attr) { diff --git a/drivers/gpu/drm/i915/i915_hwmon.h b/drivers/gpu/drm/i915/i915_hwmon.h index 7ca9cf2c34c9..1c38cfdbb7e9 100644 --- a/drivers/gpu/drm/i915/i915_hwmon.h +++ b/drivers/gpu/drm/i915/i915_hwmon.h @@ -8,13 +8,16 @@ #define __I915_HWMON_H__ struct drm_i915_private; +struct intel_gt; #if IS_REACHABLE(CONFIG_HWMON) void i915_hwmon_register(struct drm_i915_private *i915); void i915_hwmon_unregister(struct drm_i915_private *i915); +int i915_hwmon_get_energy(struct intel_gt *gt, long *energy); #else static inline void i915_hwmon_register(struct drm_i915_private *i915) { }; static inline void i915_hwmon_unregister(struct drm_i915_private *i915) { }; +static inline int i915_hwmon_get_energy(struct intel_gt *gt, long *energy) { return -EOPNOTSUPP; } #endif #endif /* __I915_HWMON_H__ */ From patchwork Wed Nov 30 05:34:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Riana Tauro X-Patchwork-Id: 13059465 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B2F20C352A1 for ; Wed, 30 Nov 2022 05:33:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CA74F10E28F; Wed, 30 Nov 2022 05:33:28 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1CC9C10E28C for ; Wed, 30 Nov 2022 05:33:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669786398; x=1701322398; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JDgbmQL+7SosA9ZIiY+BDzO2DkboqGDSnmZ34TLxGqM=; b=XYzYZgMJvb51ggKDyZAoKKRVb936wyQ11izq2WgM2a/GB0HLiz6sBBDM odcB54t36kVVMCLe2OGureq/PKINYYRH+zKI7ao3ZXtu62VUxJZXkU9OZ UIWgg4r+W9u9Fzi3RV87qtahGHGkR/EDNTCnrlcjnuQkaWir4y9gOa1mc j42aqJn7fJ3/YnUYV0j4bnrMR8I2X5wYZ46PQzruRssKGg8vjM6wyUOAq 2XduWkF15C49fZTT/6TJEEKhjQUVOK3QoEm2FRSAPaxlwZrumpDOGzUB4 T+iW3ow52sPuZPjrnmuKvjik5TuRHsIMHcylomZqhGDpBE2c893qW1ds1 w==; X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="401588255" X-IronPort-AV: E=Sophos;i="5.96,205,1665471600"; d="scan'208";a="401588255" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 21:33:17 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10546"; a="818498645" X-IronPort-AV: E=Sophos;i="5.96,205,1665471600"; d="scan'208";a="818498645" Received: from rtauro-desk.iind.intel.com ([10.190.239.41]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 21:33:15 -0800 From: Riana Tauro To: intel-gfx@lists.freedesktop.org Date: Wed, 30 Nov 2022 11:04:27 +0530 Message-Id: <20221130053427.2207600-4-riana.tauro@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130053427.2207600-1-riana.tauro@intel.com> References: <20221130053427.2207600-1-riana.tauro@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v5 3/3] drm/i915/selftests: Add hwmon support in libpower for dgfx X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Tilak Tangudu hwmon provides an interface to read energy values for discrete graphics. add hwmon support to the existing libpower library so that it can verify power consumption values in different selftests. Changed prototype of libpower_get_energy_uJ v2: add per-gt hwmon support (Ashutosh) Signed-off-by: Tilak Tangudu Co-developed-by: Riana Tauro Signed-off-by: Riana Tauro Reviewed-by: Anshuman Gupta Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/gt/selftest_rc6.c | 10 ++++---- drivers/gpu/drm/i915/gt/selftest_rps.c | 24 +++++++++--------- drivers/gpu/drm/i915/gt/selftest_slpc.c | 4 +-- drivers/gpu/drm/i915/selftests/libpower.c | 31 +++++++++++------------ drivers/gpu/drm/i915/selftests/libpower.h | 10 +++++--- 5 files changed, 40 insertions(+), 39 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c index 15b84c428f66..682f2fe67b3a 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rc6.c +++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c @@ -51,7 +51,7 @@ int live_rc6_manual(void *arg) if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) return 0; - has_power = libpower_supported(gt->i915); + has_power = libpower_supported(gt); wakeref = intel_runtime_pm_get(gt->uncore->rpm); /* Force RC6 off for starters */ @@ -61,9 +61,9 @@ int live_rc6_manual(void *arg) res[0] = rc6_residency(rc6); dt = ktime_get(); - rc0_power = libpower_get_energy_uJ(); + rc0_power = libpower_get_energy_uJ(gt); msleep(250); - rc0_power = libpower_get_energy_uJ() - rc0_power; + rc0_power = libpower_get_energy_uJ(gt) - rc0_power; dt = ktime_sub(ktime_get(), dt); res[1] = rc6_residency(rc6); if ((res[1] - res[0]) >> 10) { @@ -89,9 +89,9 @@ int live_rc6_manual(void *arg) res[0] = rc6_residency(rc6); intel_uncore_forcewake_flush(rc6_to_uncore(rc6), FORCEWAKE_ALL); dt = ktime_get(); - rc6_power = libpower_get_energy_uJ(); + rc6_power = libpower_get_energy_uJ(gt); msleep(100); - rc6_power = libpower_get_energy_uJ() - rc6_power; + rc6_power = libpower_get_energy_uJ(gt) - rc6_power; dt = ktime_sub(ktime_get(), dt); res[1] = rc6_residency(rc6); if (res[1] == res[0]) { diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c b/drivers/gpu/drm/i915/gt/selftest_rps.c index b8b0b0c7617e..d5e9f57cca55 100644 --- a/drivers/gpu/drm/i915/gt/selftest_rps.c +++ b/drivers/gpu/drm/i915/gt/selftest_rps.c @@ -1090,38 +1090,38 @@ int live_rps_interrupt(void *arg) return err; } -static u64 __measure_power(int duration_ms) +static u64 __measure_power(struct intel_gt *gt, int duration_ms) { u64 dE, dt; dt = ktime_get(); - dE = libpower_get_energy_uJ(); + dE = libpower_get_energy_uJ(gt); usleep_range(1000 * duration_ms, 2000 * duration_ms); - dE = libpower_get_energy_uJ() - dE; + dE = libpower_get_energy_uJ(gt) - dE; dt = ktime_get() - dt; return div64_u64(1000 * 1000 * dE, dt); } -static u64 measure_power(struct intel_rps *rps, int *freq) +static u64 measure_power(struct intel_gt *gt, int *freq) { u64 x[5]; int i; for (i = 0; i < 5; i++) - x[i] = __measure_power(5); + x[i] = __measure_power(gt, 5); - *freq = (*freq + intel_rps_read_actual_frequency(rps)) / 2; + *freq = (*freq + intel_rps_read_actual_frequency(>->rps)) / 2; /* A simple triangle filter for better result stability */ sort(x, 5, sizeof(*x), cmp_u64, NULL); return div_u64(x[1] + 2 * x[2] + x[3], 4); } -static u64 measure_power_at(struct intel_rps *rps, int *freq) +static u64 measure_power_at(struct intel_gt *gt, int *freq) { - *freq = rps_set_check(rps, *freq); - return measure_power(rps, freq); + *freq = rps_set_check(>->rps, *freq); + return measure_power(gt, freq); } int live_rps_power(void *arg) @@ -1143,7 +1143,7 @@ int live_rps_power(void *arg) if (!intel_rps_is_enabled(rps) || GRAPHICS_VER(gt->i915) < 6) return 0; - if (!libpower_supported(gt->i915)) + if (!libpower_supported(gt)) return 0; if (igt_spinner_init(&spin, gt)) @@ -1187,10 +1187,10 @@ int live_rps_power(void *arg) } max.freq = rps->max_freq; - max.power = measure_power_at(rps, &max.freq); + max.power = measure_power_at(gt, &max.freq); min.freq = rps->min_freq; - min.power = measure_power_at(rps, &min.freq); + min.power = measure_power_at(gt, &min.freq); igt_spinner_end(&spin); st_engine_heartbeat_enable(engine); diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c b/drivers/gpu/drm/i915/gt/selftest_slpc.c index fc1cdda82ec6..20b9e05d3d16 100644 --- a/drivers/gpu/drm/i915/gt/selftest_slpc.c +++ b/drivers/gpu/drm/i915/gt/selftest_slpc.c @@ -78,7 +78,7 @@ static u64 measure_power_at_freq(struct intel_gt *gt, int *freq, u64 *power) if (err) return err; *freq = intel_rps_read_actual_frequency(>->rps); - *power = measure_power(>->rps, freq); + *power = measure_power(gt, freq); return err; } @@ -169,7 +169,7 @@ static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine) * actually saves power. Let's see if our RAPL measurement supports * that theory. */ - if (!libpower_supported(gt->i915)) + if (!libpower_supported(gt)) return 0; min.freq = slpc->min_freq; diff --git a/drivers/gpu/drm/i915/selftests/libpower.c b/drivers/gpu/drm/i915/selftests/libpower.c index c66e993c5f85..3d4d2dc74a54 100644 --- a/drivers/gpu/drm/i915/selftests/libpower.c +++ b/drivers/gpu/drm/i915/selftests/libpower.c @@ -6,29 +6,28 @@ #include #include "i915_drv.h" +#include "i915_hwmon.h" #include "libpower.h" -bool libpower_supported(const struct drm_i915_private *i915) -{ - /* Discrete cards require hwmon integration */ - if (IS_DGFX(i915)) - return false; - - return libpower_get_energy_uJ(); -} - -u64 libpower_get_energy_uJ(void) +u64 libpower_get_energy_uJ(struct intel_gt *gt) { unsigned long long power; u32 units; + long energy_uJ = 0; - if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &power)) - return 0; + if (IS_DGFX(gt->i915)) { + if (i915_hwmon_get_energy(gt, &energy_uJ)) + return 0; + } else { + if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &power)) + return 0; - units = (power & 0x1f00) >> 8; + units = (power & 0x1f00) >> 8; - if (rdmsrl_safe(MSR_PP1_ENERGY_STATUS, &power)) - return 0; + if (rdmsrl_safe(MSR_PP1_ENERGY_STATUS, &power)) + return 0; - return (1000000 * power) >> units; /* convert to uJ */ + energy_uJ = (1000000 * power) >> units; /* convert to uJ */ + } + return energy_uJ; } diff --git a/drivers/gpu/drm/i915/selftests/libpower.h b/drivers/gpu/drm/i915/selftests/libpower.h index 5352981eb946..e4410a886654 100644 --- a/drivers/gpu/drm/i915/selftests/libpower.h +++ b/drivers/gpu/drm/i915/selftests/libpower.h @@ -8,10 +8,12 @@ #include -struct drm_i915_private; +struct intel_gt; -bool libpower_supported(const struct drm_i915_private *i915); - -u64 libpower_get_energy_uJ(void); +u64 libpower_get_energy_uJ(struct intel_gt *gt); +static inline bool libpower_supported(struct intel_gt *gt) +{ + return libpower_get_energy_uJ(gt); +} #endif /* SELFTEST_LIBPOWER_H */