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[83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.09.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:09:58 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v2 01/12] dt-bindings: display: msm: Rename mdss node name in example Date: Wed, 30 Nov 2022 21:09:39 +0100 Message-Id: <20221130200950.144618-2-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Follow other YAMLs and replace mdss name into display-subystem. Signed-off-by: Adam Skladowski Acked-by: Krzysztof Kozlowski Reviewed-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- .../devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml | 2 +- .../devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml index d6f043a4b08d..4795e13c7b59 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml @@ -72,7 +72,7 @@ examples: #include #include - mdss@5e00000 { + display-subsystem@5e00000 { #address-cells = <1>; #size-cells = <1>; compatible = "qcom,qcm2290-mdss"; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml index a86d7f53fa84..886858ef6700 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml @@ -62,7 +62,7 @@ examples: #include #include - mdss@5e00000 { + display-subsystem@5e00000 { #address-cells = <1>; #size-cells = <1>; compatible = "qcom,sm6115-mdss"; From patchwork Wed Nov 30 20:09:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13060376 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57DE0C4708E for ; Wed, 30 Nov 2022 20:11:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229900AbiK3ULU (ORCPT ); Wed, 30 Nov 2022 15:11:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43786 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229868AbiK3UK4 (ORCPT ); Wed, 30 Nov 2022 15:10:56 -0500 Received: from mail-lj1-x233.google.com (mail-lj1-x233.google.com [IPv6:2a00:1450:4864:20::233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2D239FED0; Wed, 30 Nov 2022 12:10:02 -0800 (PST) Received: by mail-lj1-x233.google.com with SMTP id x6so7998110lji.10; Wed, 30 Nov 2022 12:10:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0qIj/q/S/M+xmpa0Crss8iDZZEgJSAa+iZUKMRDbQ1A=; b=fwXoyKVd99qyS5eoWoK6kZVSv67qIbENqpVmajCXCwnWltjp+zrXyAXKH0Obiq5w4d 2Mfw9Bq/frgOoGkBPOll4xlsehKKYclGHi+NhBVtFd1nk47L05MYzT/AQW4cPYOG9k7H kt04Mn1WEISAqeMBD8CWlfF0f7aDoHohZl84qPpZlwmHtM2nSED6+qZwak+mPdpNBncR rknHgNvT5duvR5qFd1V0Yp5wrJzamnBxE1E2c08f3ny1Va5zTSixVS8RG9Apnv8U4Xy1 sJCx4BvWraIt1CFGu8C3JjZv755jd/smdAE2ff+qVfiKkOfY+DJyBkLaoP0Pdbl2K5uz o/lQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0qIj/q/S/M+xmpa0Crss8iDZZEgJSAa+iZUKMRDbQ1A=; b=hYGzIr4evOBwdPHPDJiEB66zU2kgFjVs17g9ae4wVJTy7PoSDnWWpb5FtaSSc4yvdH s7PzqKbnUYk2Wm3SikTLeIWL6rhSTAC80iUQrvG58DXdi8S4FuuxqXrDNW/9Lxk/usAC uQtl4rIgCpHX3t1peDiVzLD5CqYSi+U+kOLF6e+uidQqi96tAoa3YR/V3dm+iDPCodl3 jJQGWzGLJTr7vNPjqdz0H2zOoO9JktnJOCc4+GbKoRhmYCU6h+s8DoUFpgke4STos70W ZoeLy3Ik7YCduOG7ilFSIVSBtVKvoxLZid5o/YJdRorcja411lhwqzP6WYMvEbZdp7Q4 X6uQ== X-Gm-Message-State: ANoB5pkGclNI9QN4TKsuLnJCAXn69HPLZSGmjsITJDUki54T32CMMrYp u8/QVbm+k3tEG8kkxhzm/7TGj3lTtx0= X-Google-Smtp-Source: AA0mqf6GebFaXhqxSqjzPGpEH8cA6UmpAytnONRCzSRyZXmFXci38kir6+W3OcWKtliqBRb28VbkMw== X-Received: by 2002:a05:651c:1c3:b0:278:eab6:7542 with SMTP id d3-20020a05651c01c300b00278eab67542mr15028408ljn.400.1669839001010; Wed, 30 Nov 2022 12:10:01 -0800 (PST) Received: from localhost.localdomain (ccy110.neoplus.adsl.tpnet.pl. [83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.09.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:10:00 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v2 02/12] dt-bindings: thermal: tsens: Add SM6115 compatible Date: Wed, 30 Nov 2022 21:09:40 +0100 Message-Id: <20221130200950.144618-3-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document compatible for tsens on Qualcomm SM6115 platform according to downstream dts it ship v2.4 of IP Signed-off-by: Adam Skladowski Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index 038d81338fcf..c41fcf404117 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -53,6 +53,7 @@ properties: - qcom,sc8280xp-tsens - qcom,sdm630-tsens - qcom,sdm845-tsens + - qcom,sm6115-tsens - qcom,sm6350-tsens - qcom,sm8150-tsens - qcom,sm8250-tsens From patchwork Wed Nov 30 20:09:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13060377 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08B5DC47089 for ; Wed, 30 Nov 2022 20:11:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230043AbiK3ULb (ORCPT ); Wed, 30 Nov 2022 15:11:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230012AbiK3ULE (ORCPT ); Wed, 30 Nov 2022 15:11:04 -0500 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 05EDF9D837; Wed, 30 Nov 2022 12:10:04 -0800 (PST) Received: by mail-lj1-x22a.google.com with SMTP id z4so22180506ljq.6; Wed, 30 Nov 2022 12:10:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=n6KtEaf/qmwW9+C/8cbU0t4+fA9tt0ZOxNed3iCE/Io=; b=RMNPXwu82W0pG+t8O8HH/V7/u2v+Vb1SNXjosRZzZHhmrwA+iIzc6j4yoh/J5PKFWD eQ4dJienr68cFYcN9+7621V4XOUvPqhLYVckFsDWVz3X731w3G6Xho2trunsXRaCmwjl H5p23onyZ4R3c3r2McKVkJFw0nYUqHfjyaHU7dXl/g3GIfbk6hYqs1GRvnk3tMMmhJFq fQouhvwvVYcMWh+PE/7UfPsB79vxnL1MgA/MhfNcFSFpfL6nrZbO1CqlgDUX+WsRVGXX jTHj1l0ReWwPNXykNaBU4U+F+A4WTMEOucQrHwuPEM6bNpT2+++YJ5MFk9Y+71tM69GO ARdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n6KtEaf/qmwW9+C/8cbU0t4+fA9tt0ZOxNed3iCE/Io=; b=GQhLZqBbBjnP4m9d8vfrcYqhRO8MXwK6qt+KlDRnXF8a9D0ObiFnLRvfkv+YAnYC57 SJYbXrtbLRnVwvOOoSuy/j+Y7c8tqXIfXbwuEMBlnl4SLisGV4SLnqWGQk+QXJdPKEic mSxLt7kDPk187h9FdiKYzH2E+3Fn43YOI7VH699A/xnGaaZUjHtf5c+tLuvKCqTfK4L8 PyM0LEb2+EllgLJR3k2XRYzYsGDt5/TET1kdssT6fxjATF33k2/8ySxf8gct/sHTFH2f 8uPKgGPHhl1BXi4F+7oiAIrjMlmx2qMl+5Llj4E7LxcQ/+ld9m+45+sPdoBevwbiWE5x AUxA== X-Gm-Message-State: ANoB5pmAfyfuo7aN+KZvx460E5AbMgDR5d58YR6N1ZCixZbaIZ8zN4xx bjVPCqTkHliXLP45GFLtKXGee0UfEY4= X-Google-Smtp-Source: AA0mqf5P05TtUcf7Z754qXf11Dn1gzaFO/dbcqSzW1O9opHt5eNJRN1EWK5T5FTIteTnINe3RsNLOA== X-Received: by 2002:a05:651c:1244:b0:278:a461:cb7d with SMTP id h4-20020a05651c124400b00278a461cb7dmr14760527ljh.246.1669839003243; Wed, 30 Nov 2022 12:10:03 -0800 (PST) Received: from localhost.localdomain (ccy110.neoplus.adsl.tpnet.pl. [83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.10.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:10:02 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v2 03/12] arm64: dts: qcom: sm6115: Add cpufreq-hw support Date: Wed, 30 Nov 2022 21:09:41 +0100 Message-Id: <20221130200950.144618-4-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add cpufreq-hw node and assign qcom,freq-domain properties to CPUs to enable CPU clock scaling. Signed-off-by: Adam Skladowski --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 0340ed21be05..2a55087b103e 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -41,6 +41,7 @@ CPU0: cpu@0 { dynamic-power-coefficient = <100>; enable-method = "psci"; next-level-cache = <&L2_0>; + qcom,freq-domain = <&cpufreq_hw 0>; L2_0: l2-cache { compatible = "cache"; cache-level = <2>; @@ -55,6 +56,7 @@ CPU1: cpu@1 { dynamic-power-coefficient = <100>; enable-method = "psci"; next-level-cache = <&L2_0>; + qcom,freq-domain = <&cpufreq_hw 0>; }; CPU2: cpu@2 { @@ -65,6 +67,7 @@ CPU2: cpu@2 { dynamic-power-coefficient = <100>; enable-method = "psci"; next-level-cache = <&L2_0>; + qcom,freq-domain = <&cpufreq_hw 0>; }; CPU3: cpu@3 { @@ -75,6 +78,7 @@ CPU3: cpu@3 { dynamic-power-coefficient = <100>; enable-method = "psci"; next-level-cache = <&L2_0>; + qcom,freq-domain = <&cpufreq_hw 0>; }; CPU4: cpu@100 { @@ -85,6 +89,7 @@ CPU4: cpu@100 { capacity-dmips-mhz = <1638>; dynamic-power-coefficient = <282>; next-level-cache = <&L2_1>; + qcom,freq-domain = <&cpufreq_hw 1>; L2_1: l2-cache { compatible = "cache"; cache-level = <2>; @@ -99,6 +104,7 @@ CPU5: cpu@101 { dynamic-power-coefficient = <282>; enable-method = "psci"; next-level-cache = <&L2_1>; + qcom,freq-domain = <&cpufreq_hw 1>; }; CPU6: cpu@102 { @@ -109,6 +115,7 @@ CPU6: cpu@102 { dynamic-power-coefficient = <282>; enable-method = "psci"; next-level-cache = <&L2_1>; + qcom,freq-domain = <&cpufreq_hw 1>; }; CPU7: cpu@103 { @@ -119,6 +126,7 @@ CPU7: cpu@103 { dynamic-power-coefficient = <282>; enable-method = "psci"; next-level-cache = <&L2_1>; + qcom,freq-domain = <&cpufreq_hw 1>; }; cpu-map { @@ -842,6 +850,17 @@ intc: interrupt-controller@f200000 { redistributor-stride = <0x0 0x20000>; interrupts = ; }; + + cpufreq_hw: cpufreq@f521000 { + compatible = "qcom,cpufreq-hw"; + reg = <0x0f521000 0x1000>, <0x0f523000 0x1000>; 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[83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.10.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:10:05 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v2 04/12] arm64: dts: qcom: sm6115: Add TSENS node Date: Wed, 30 Nov 2022 21:09:42 +0100 Message-Id: <20221130200950.144618-5-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add nodes required for TSENS block using the common qcom,tsens-v2 binding. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 2a55087b103e..a2ac06f4693b 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -523,6 +523,17 @@ spmi_bus: spmi@1c40000 { #interrupt-cells = <4>; }; + tsens0: thermal-sensor@4410000 { + compatible = "qcom,sm6115-tsens", "qcom,tsens-v2"; + reg = <0x04411000 0x1ff>, /* TM */ + <0x04410000 0x8>; /* SROT */ + #qcom,sensors = <16>; + interrupts = , + ; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + rpm_msg_ram: sram@45f0000 { compatible = "qcom,rpm-msg-ram"; reg = <0x045f0000 0x7000>; From patchwork Wed Nov 30 20:09:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13060379 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 027ABC4708C for ; Wed, 30 Nov 2022 20:11:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230080AbiK3ULu (ORCPT ); Wed, 30 Nov 2022 15:11:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229916AbiK3ULL (ORCPT ); Wed, 30 Nov 2022 15:11:11 -0500 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4CB6299F47; Wed, 30 Nov 2022 12:10:09 -0800 (PST) Received: by mail-lf1-x12d.google.com with SMTP id d6so28637725lfs.10; Wed, 30 Nov 2022 12:10:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pzD7os1oJWrCvebMO8GXHUfDeNhMiacSWupEc4fuFFA=; b=QnJ+vVMOFzp8a0jFKo+gCEpS6x8aMNyR9uo+trjRcjKqNgIr+R0ElC2RHVjYQpGOwq d77HwxlmyEox3Dgk/aMoSIpINtcmSsrrEHCqvCd/B/K7Hy6jzJhgfUk0KDedMeS3C7LX +6mpblslw6FnBOZcL+T/oSaazMOl+6xQT9IzYtaHYhiA3kuc8NxjONSkLm+8gf5W68JA TXceDOADJLLxJGiFgMt7mX251pTQKJQzd4XJYs7UwMMeHiJ6I6vvyIWJNXcFIWEDKiUs CWI51GNVD6rMtJb12ieXHqBLIl7uqQwdi2LfM1G74bBeGYFjK9H0Tencrh/1NE7VVwdq miiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pzD7os1oJWrCvebMO8GXHUfDeNhMiacSWupEc4fuFFA=; b=Rc9uuouPXx9dV2USybZHvRVLkf9EKvc4FevHETE72d5f3IxulOWrXnXMppsPD6wKPp EwP3nvRclu2TTl5OjUcQ5+sZqx27DWKuf+b2gwV3kEyfWDXFQpZv0tgQ811TuY69CsfZ nPrCHibTpjYwJhTVK9B1xzRdI/d+ae0kPCUOD3eCiTWtQWK77yc4qlORY0sx+Ato5wNl b+t6foAOko0wsTdar6FQstYZz+/THAgli8dALnPBgXAdU28xly2uZ6h6xEnNbmDXU+Su CW3I3r6qYt0zPVV+fS0DrIJjaykE3/qc9lSI1RRFU0Sl3FobHuNl53oB2j7gfySKepU2 uELQ== X-Gm-Message-State: ANoB5plKlP/8/a6lQWTwxSohEgKw85Q7nMuQQNrWwM2tuX7briczCmFG +mFbXa7LcG/MSZ92xpV2lEb5O9RphpU= X-Google-Smtp-Source: AA0mqf4LbHHujIm1MRFMjViBtA0LkeUiEaUyGqRj8qITqoI1Es3DWJCLZVLzB0RQwO+ut6NVczotDQ== X-Received: by 2002:a19:6b1a:0:b0:4b4:3313:feaf with SMTP id d26-20020a196b1a000000b004b43313feafmr20707007lfa.365.1669839007666; Wed, 30 Nov 2022 12:10:07 -0800 (PST) Received: from localhost.localdomain (ccy110.neoplus.adsl.tpnet.pl. [83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.10.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:10:07 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v2 05/12] arm64: dts: qcom: sm6115: Add PRNG node Date: Wed, 30 Nov 2022 21:09:43 +0100 Message-Id: <20221130200950.144618-6-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add a node for the PRNG to enable hw-accelerated pseudo-random number generation. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index a2ac06f4693b..6f4c36f3da40 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -505,6 +505,13 @@ qusb2_hstx_trim: hstx-trim@25b { }; }; + rng: rng@1b53000 { + compatible = "qcom,prng-ee"; + reg = <0x01b53000 0x1000>; + clocks = <&gcc GCC_PRNG_AHB_CLK>; + clock-names = "core"; + }; + spmi_bus: spmi@1c40000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x01c40000 0x1100>, From patchwork Wed Nov 30 20:09:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13060381 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C20F3C47089 for ; Wed, 30 Nov 2022 20:12:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230105AbiK3UMB (ORCPT ); Wed, 30 Nov 2022 15:12:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230002AbiK3ULU (ORCPT ); Wed, 30 Nov 2022 15:11:20 -0500 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B24F99F19; Wed, 30 Nov 2022 12:10:14 -0800 (PST) Received: by mail-lj1-x22b.google.com with SMTP id d3so22188784ljl.1; Wed, 30 Nov 2022 12:10:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xiwkmaUk+kjHEaXyaNwbQEqrPkyA7kZAaaBGjnhG2Z8=; b=oWRD1+WUXaaxMS5Mg/1rdrbTt8T2V+mdEPBWLT3DExbd71SkO5nzdxGM3PGNxuLF8i 9n9+7oEnRsw3840Vw2qEDBHGOfiL6vG94R3YhmB2IcEesj6Of7wcSR0AqOplJy7ON7tp Zwh/f6efCKHmGMqxaWYRnWoEaIgA6v36Cpc2j5mgoP7Z4C+to6ZYLQNoZVfTZudO1M9M kesLWt97H9oeOH8sngOs02k49FZ9fTGzT91FWBC8Lk1hij2gnJZAg3Q88vN2y/IE5Fcr hOLH7YADsyu8aOAYNBRq8/roA1a2oLmcG5G6hwf+HIo2l7QVMJMo8zW1qQrntVPR5a6o V5vQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xiwkmaUk+kjHEaXyaNwbQEqrPkyA7kZAaaBGjnhG2Z8=; b=JKNzJYYll5gug//evC4IA3AmVWIXdVLM9H7o0D2bwHUS/ZXPYY948TStgDaKK7MVk5 J0HObHQrcU/wmEHX1GNJjQwVQEu5aQvLp5/w3y2PLx5RvMYIOXa9LMKFl0Rjuwbr9bOM wsxBENiyiKN+47MMRntco/nXHbLd5h/XY4DV/jpaJxGiqehomzSTTng3I1CHXJCtEIiJ 17FWAKIl21f211H0wbimepQ2luYFgyBWTC0HQZbVpPYwoRKHcwgmDOjfWDqNaIOehx9M yj439YDajIxgzdSqu5IBkrzOhR/7Lv0/TK7JPi2mH9/BerwJuTwj2hETPuoENZ2yiL8U RySA== X-Gm-Message-State: ANoB5pnHzmoPk87p62bOcGDJSofZZagk2wooepATA7kRn5x90dI5rsNe xfrwjZY2KkRNz0BmSUqhlTlYJ07DB8A= X-Google-Smtp-Source: AA0mqf7H8jFJmIp9vGhj3Np3GgraaEdLHNj5o6/9BuD0+raVoHuCn9Fl71toHFP3Ere3LMIP9RxUNA== X-Received: by 2002:a05:651c:198f:b0:277:6a5:109b with SMTP id bx15-20020a05651c198f00b0027706a5109bmr16196943ljb.42.1669839009907; Wed, 30 Nov 2022 12:10:09 -0800 (PST) Received: from localhost.localdomain (ccy110.neoplus.adsl.tpnet.pl. [83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.10.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:10:09 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v2 06/12] arm64: dts: qcom: sm6115: Add rpm-stats node Date: Wed, 30 Nov 2022 21:09:44 +0100 Message-Id: <20221130200950.144618-7-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add rpm stats node. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 6f4c36f3da40..d0928f19965f 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -546,6 +546,11 @@ rpm_msg_ram: sram@45f0000 { reg = <0x045f0000 0x7000>; }; + sram@4690000 { + compatible = "qcom,rpm-stats"; + reg = <0x04690000 0x10000>; + }; + sdhc_1: mmc@4744000 { compatible = "qcom,sm6115-sdhci", "qcom,sdhci-msm-v5"; reg = <0x04744000 0x1000>, <0x04745000 0x1000>, <0x04748000 0x8000>; From patchwork Wed Nov 30 20:09:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13060380 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59B1DC4708C for ; Wed, 30 Nov 2022 20:12:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229903AbiK3UL6 (ORCPT ); Wed, 30 Nov 2022 15:11:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230001AbiK3ULU (ORCPT ); Wed, 30 Nov 2022 15:11:20 -0500 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A65189D83A; Wed, 30 Nov 2022 12:10:12 -0800 (PST) Received: by mail-lf1-x131.google.com with SMTP id p8so28633777lfu.11; Wed, 30 Nov 2022 12:10:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zjbRY6rd8FaKbUdJMDib6L2zePb+2secFfDnOJ1OhMQ=; b=S4NlJLu7Kc9c1YCCJnXGzDLUk8ADPQ7gJI0e+sUd5s/GpkA4GU8G8zBkoCQJdC8CcB znLbthkwC3cvPZnxlLpp5RNnjZyFQUGt3sjFp0cAk4Nqzl/rmsyoMMqHOBSS1QPMPdCg nS75VrVtlgjEelMpiaqnoFWuuJ4pk7hvqApAWKMGGitCA+C8bIWkUSUU9euw+BnbeNoW 0WH0J73uRi2vXutY6mP3n3AaSHqf8pT5qSYQBVCStPbfSBu0kbU+KGhS/j85zCO12rF0 Zzb+BxwmgymHXewGBq6Q0WtaCjXtlOJOmnk9kL+9KZ0NSIfD2pNqyvuQUJyv1MaJxWB9 okXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zjbRY6rd8FaKbUdJMDib6L2zePb+2secFfDnOJ1OhMQ=; b=TKyRrj9ltpkjeSuox+znQ4cbcGWRQ/YJxGiyv6Aayz7thFyhpWzEAE6q0euCxp9c9h jSuhRLefnbuJMMWucPQCu5F8L4ILyHbQzuzHvxXCP2sS9OpdgEGBCDXzz+BUQkh5ntl3 7Nm1qgdXV2uyvefl60lIuCUOQxbhqWl0uMLEL57YMV1k69LOEETL9lmRncyKjY2C3M5t sDR7ErrDA9LxYG68Z3kfU0VtpiMLLooJLYz8kIXWHHAUzb8x82WJUX6yeQ1/7m2z1kHD TawC9ZVraK8CsHXkxPv4nAHqvHT8uSqWeluAzWOB/0sBv6Y3hKL1ne0HpD4sNQRzuHBB FoUQ== X-Gm-Message-State: ANoB5pmna3av1ORBCauSJSpWZF3LrCRv45bfGhXEQxrQfSiqm3VMzsez aP+Ahok2mmUO4cM/HxXvPOvNqPnYEdg= X-Google-Smtp-Source: AA0mqf4hBWIwa003WRRjczVmDE8qipVYmT9vidiXCDSEA3HNQpZvd20CNtMqv/6//p7atKR85IyFTw== X-Received: by 2002:a19:4f14:0:b0:4b4:b20c:4b7 with SMTP id d20-20020a194f14000000b004b4b20c04b7mr15386197lfb.201.1669839012126; Wed, 30 Nov 2022 12:10:12 -0800 (PST) Received: from localhost.localdomain (ccy110.neoplus.adsl.tpnet.pl. [83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.10.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:10:11 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v2 07/12] arm64: dts: qcom: sm6115: Add dispcc node Date: Wed, 30 Nov 2022 21:09:45 +0100 Message-Id: <20221130200950.144618-8-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add display clock controller to allow controlling display related clocks. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index d0928f19965f..6e0699649257 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -725,6 +726,19 @@ usb_1_dwc3: usb@4e00000 { }; }; + dispcc: clock-controller@5f00000 { + compatible = "qcom,sm6115-dispcc"; + reg = <0x05f00000 0x20000>; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&sleep_clk>, + <&dsi0_phy 0>, + <&dsi0_phy 1>, + <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + apps_smmu: iommu@c600000 { compatible = "qcom,sm6115-smmu-500", "arm,mmu-500"; reg = <0x0c600000 0x80000>; From patchwork Wed Nov 30 20:09:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13060384 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07311C4708D for ; Wed, 30 Nov 2022 20:12:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230140AbiK3UMZ (ORCPT ); Wed, 30 Nov 2022 15:12:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229931AbiK3ULx (ORCPT ); Wed, 30 Nov 2022 15:11:53 -0500 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E45B34E68F; Wed, 30 Nov 2022 12:10:25 -0800 (PST) Received: by mail-lj1-x22b.google.com with SMTP id z24so22173776ljn.4; Wed, 30 Nov 2022 12:10:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=l55ZSpBSaEScUKVcaRYy5noOFCbwMf6AS4fim9mYDzU=; b=hX9Qc/69PdTYELzcvIONcTmgLCM1MCfDI8JC5rXsA12fgwJi8rJ/GgV8Anv3/iwMjO CGp8W8/Fg4RGFOwA1y3NTdq7sxLks1VQhAWeg737e2KRB6981vduvpwKAn8LcTkB37pr 0U2W9/gdvRbJwdpjW9b+mcMLT0tT+l6A/tqVo4IDV56QRMVvqgiUO6tpqaTrhpkvRQzE BzfFQJ+3xj3fs1h2dwDDofVpmfCRp21MnTxKRFnGcqcawvbdXLHuOWDaWRlC1c4Gk1Mx 6Vm51bA4Kdr7ORaVUtBAKaegltoZeApXfmTnrHDnOpn9CWLp4PV/2fUQOtniDo454NhW qxTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=l55ZSpBSaEScUKVcaRYy5noOFCbwMf6AS4fim9mYDzU=; b=HIFj8UxEwAbJ4Qf7H+Mva0Re/pqxOK+wsodt9L5Ucu0DQC9QZXSGUjsisMbbXODO14 ayxH/x/TvYtJ8QGd7cgYWXJ7mpFUErNBv35BKV0cffoTEZfS6ZhcnNf0aUXbzKLn1izx rPerhkLirFt3e36CDZjvJsJlNUppAbwGL2cmr1taGRXVaMmi6cxkvG8gJT6hL5tP4nEJ D4n38bkOGPysrNvPVUG7UNpGII/RKfkkJAslRZHsMzv9yP/d87eGFRTN284dVNqUYf2k GYHj8eTEbmrevfktIL6DBIGVbJUeuqZUJcP6GRXk3UcnT9pX4KSZGcJ+ZwNqb/ZNWQ6M OSGQ== X-Gm-Message-State: ANoB5ploDz+sGKFURemXd1ABWc2kkudz/Hb2riNE6oSNhLtTyGfkg6rf EFtpj5TGbUQk7HfTV41nlXy9dsHD92o= X-Google-Smtp-Source: AA0mqf4N1MjwsUqz/qkPXY6Rb3zUqkrXqdkjaerUFav9rNOyY5/vWSnsxuY0T/WDHWeX58U2Kr+D0w== X-Received: by 2002:a05:651c:1590:b0:279:dfe:897a with SMTP id h16-20020a05651c159000b002790dfe897amr21130009ljq.365.1669839014480; Wed, 30 Nov 2022 12:10:14 -0800 (PST) Received: from localhost.localdomain (ccy110.neoplus.adsl.tpnet.pl. [83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.10.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:10:14 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v2 08/12] arm64: dts: qcom: sm6115: Add mdss/dpu node Date: Wed, 30 Nov 2022 21:09:46 +0100 Message-Id: <20221130200950.144618-9-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add mdss and dpu node to enable display support on SM6115. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 183 +++++++++++++++++++++++++++ 1 file changed, 183 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 6e0699649257..c476b5ecb62b 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -726,6 +726,189 @@ usb_1_dwc3: usb@4e00000 { }; }; + mdss: display-subsystem@5e00000 { + compatible = "qcom,sm6115-mdss"; + reg = <0x05e00000 0x1000>; + reg-names = "mdss"; + + power-domains = <&dispcc MDSS_GDSC>; + + clocks = <&gcc GCC_DISP_AHB_CLK>, + <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>; + + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + + iommus = <&apps_smmu 0x420 0x2>, + <&apps_smmu 0x421 0x0>; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + status = "disabled"; + + mdp: display-controller@5e01000 { + compatible = "qcom,sm6115-dpu"; + reg = <0x05e01000 0x8f000>, + <0x05eb0000 0x2008>; + reg-names = "mdp", "vbif"; + + clocks = <&gcc GCC_DISP_HF_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&dispcc DISP_CC_MDSS_MDP_CLK>, + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, + <&dispcc DISP_CC_MDSS_ROT_CLK>, + <&dispcc DISP_CC_MDSS_VSYNC_CLK>; + clock-names = "bus", + "iface", + "core", + "lut", + "rot", + "vsync"; + + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmpd SM6115_VDDCX>; + + interrupt-parent = <&mdss>; + interrupts = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpu_intf1_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + }; + + mdp_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-19200000 { + opp-hz = /bits/ 64 <19200000>; + required-opps = <&rpmpd_opp_min_svs>; + }; + + opp-192000000 { + opp-hz = /bits/ 64 <192000000>; + required-opps = <&rpmpd_opp_low_svs>; + }; + + opp-256000000 { + opp-hz = /bits/ 64 <256000000>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp-307200000 { + opp-hz = /bits/ 64 <307200000>; + required-opps = <&rpmpd_opp_svs_plus>; + }; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmpd_opp_nom>; + }; + }; + }; + + dsi0: dsi@5e94000 { + compatible = "qcom,dsi-ctrl-6g-qcm2290"; + reg = <0x05e94000 0x400>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, + <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK>, + <&dispcc DISP_CC_MDSS_ESC0_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&gcc GCC_DISP_HF_AXI_CLK>; + clock-names = "byte", + "byte_intf", + "pixel", + "core", + "iface", + "bus"; + + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; + assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; + + operating-points-v2 = <&dsi_opp_table>; + power-domains = <&rpmpd SM6115_VDDCX>; + phys = <&dsi0_phy>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_in: endpoint { + remote-endpoint = <&dpu_intf1_out>; + }; + }; + + port@1 { + reg = <1>; + dsi0_out: endpoint { + }; + }; + }; + + dsi_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-19200000 { + opp-hz = /bits/ 64 <19200000>; + required-opps = <&rpmpd_opp_min_svs>; + }; + + opp-164000000 { + opp-hz = /bits/ 64 <164000000>; + required-opps = <&rpmpd_opp_low_svs>; + }; + + opp-187500000 { + opp-hz = /bits/ 64 <187500000>; + required-opps = <&rpmpd_opp_svs>; + }; + }; + }; + + dsi0_phy: phy@5e94400 { + compatible = "qcom,dsi-phy-14nm-2290"; + reg = <0x05e94400 0x100>, + <0x05e94500 0x300>, + <0x05e94800 0x188>; + reg-names = "dsi_phy", + "dsi_phy_lane", + "dsi_pll"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "iface", "ref"; + + status = "disabled"; + }; + }; + dispcc: clock-controller@5f00000 { compatible = "qcom,sm6115-dispcc"; reg = <0x05f00000 0x20000>; From patchwork Wed Nov 30 20:09:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13060383 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 849D7C352A1 for ; Wed, 30 Nov 2022 20:12:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229918AbiK3UMY (ORCPT ); Wed, 30 Nov 2022 15:12:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230086AbiK3ULw (ORCPT ); Wed, 30 Nov 2022 15:11:52 -0500 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 268764E699; Wed, 30 Nov 2022 12:10:27 -0800 (PST) Received: by mail-lj1-x230.google.com with SMTP id bn5so22182943ljb.2; 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[83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.10.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:10:16 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v2 09/12] arm64: dts: qcom: sm6115: Add GPI DMA Date: Wed, 30 Nov 2022 21:09:47 +0100 Message-Id: <20221130200950.144618-10-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add GPI DMA node which will be wired to i2c/spi/uart. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index c476b5ecb62b..b30a5485671d 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -681,6 +681,26 @@ ufs_mem_phy_lanes: phy@4807400 { }; }; + gpi_dma0: dma-controller@4a00000 { + compatible = "qcom,sm6115-gpi-dma", "qcom,sm6350-gpi-dma"; + reg = <0x04a00000 0x60000>; + interrupts = , + , + , + , + , + , + , + , + , + ; + dma-channels = <10>; + dma-channel-mask = <0xf>; + iommus = <&apps_smmu 0xf6 0x0>; + #dma-cells = <3>; + status = "disabled"; + }; + usb_1: usb@4ef8800 { compatible = "qcom,sm6115-dwc3", "qcom,dwc3"; reg = <0x04ef8800 0x400>; From patchwork Wed Nov 30 20:09:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13060386 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36D72C4321E for ; Wed, 30 Nov 2022 20:12:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230116AbiK3UMg (ORCPT ); Wed, 30 Nov 2022 15:12:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230103AbiK3UMB (ORCPT ); Wed, 30 Nov 2022 15:12:01 -0500 Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [IPv6:2a00:1450:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0AEE4E6A6; Wed, 30 Nov 2022 12:10:28 -0800 (PST) Received: by mail-lj1-x229.google.com with SMTP id q7so22148980ljp.9; Wed, 30 Nov 2022 12:10:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5lsAMEj6HaUbhZ9bHj/9+ikD6XEF6DUBZQroGChklKg=; b=LXfwVLgkA7GrdcTV8UNA2Fem5L/wCKZkMyCv+nQBl9dkWQ3HrGiwiI5/s5ODiYwn7R fcojBBzqduf9uqtWP4tU2bnV3JmbHRaVmAJjteg8gsRurtELhABlGJ9eEbvpFKhbOmUC JY9dg4XuRFq7WTMqv4Rzj1Ryt8GV6xIEtFfG3amezj9sJCJrOiitnfYlQH8pehTBPFw2 tU2hlG8H9ZmnOFbUkEK6VRK/CLNZzvUOWnmaOdtuWJA2j31SFrkVHilOp7rCQJm4/8VR crgGIGrsEc3DGUG5qW4bB+6gczVK2evMpE2g29sadIEVvbZVaQY8ld9RvFcBkCEOVsAP gAdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5lsAMEj6HaUbhZ9bHj/9+ikD6XEF6DUBZQroGChklKg=; b=QP3nw/Fqz5abb/R1QVuq/KmsT2DdATDHxXqi0sGYbBTI2zML4jW/PVNR76IHYBVfYY IrrW4ekUOCDFofSTbfsuOt0CfBPUj74+TMtE645E9LdybcUQ6q2AVb3LfPlhJSWrpGOX DU5NnFFljHNV9NMu2187yqlIR2CvBq8WGf7Igs57JJvN7rXpKFusYlpVmD9JrNHoxNot dLJZ5rB/Ob7SxinyQWsCSpjlWV+2yqSaTv5N7G7rMQQZ955H/LrcbXbtp0Im0qnMawVs FQt8kBdhMRVWtfT6fgfCNdolwHl5MOnK9CxXWREs+LeY1n9JSb1Vgth7+8pSA6ImUHmJ Q6MA== X-Gm-Message-State: ANoB5pn34bJLa23VuzoSfUz6113Wlt8MDfn7d/1bOVC1IzoHl7CR4Uhc egLWMar6Ov855sz1oYWIKyqPlQxU0H4= X-Google-Smtp-Source: AA0mqf7kU3fM2GF4LqoHEcstGJ72edHxe2AQx+Uy6dMhopVvX+xPkK5azXuGEa59xmmiEysaHIHZYw== X-Received: by 2002:a2e:be28:0:b0:278:f1a5:a361 with SMTP id z40-20020a2ebe28000000b00278f1a5a361mr14223947ljq.124.1669839019153; Wed, 30 Nov 2022 12:10:19 -0800 (PST) Received: from localhost.localdomain (ccy110.neoplus.adsl.tpnet.pl. [83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.10.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:10:18 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v2 10/12] arm64: dts: qcom: sm6115: Add i2c/spi nodes Date: Wed, 30 Nov 2022 21:09:48 +0100 Message-Id: <20221130200950.144618-11-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add I2C/SPI nodes for SM6115. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 290 +++++++++++++++++++++++++++ 1 file changed, 290 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index b30a5485671d..e676b9d117e3 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -365,6 +366,90 @@ tlmm: pinctrl@500000 { interrupt-controller; #interrupt-cells = <2>; + qup_i2c0_default: qup-i2c0-default-state { + pins = "gpio0", "gpio1"; + function = "qup0"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_i2c1_default: qup-i2c1-default-state { + pins = "gpio4", "gpio5"; + function = "qup1"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_i2c2_default: qup-i2c2-default-state { + pins = "gpio6", "gpio7"; + function = "qup2"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_i2c3_default: qup-i2c3-default-state { + pins = "gpio8", "gpio9"; + function = "qup3"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_i2c4_default: qup-i2c4-default-state { + pins = "gpio12", "gpio13"; + function = "qup4"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_i2c5_default: qup-i2c5-default-state { + pins = "gpio14", "gpio15"; + function = "qup5"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_spi0_default: qup-spi0-default-state { + pins = "gpio0", "gpio1","gpio2", "gpio3"; + function = "qup0"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_spi1_default: qup-spi1-default-state { + pins = "gpio4", "gpio5", "gpio69", "gpio70"; + function = "qup1"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_spi2_default: qup-spi2-default-state { + pins = "gpio6", "gpio7", "gpio71", "gpio80"; + function = "qup2"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_spi3_default: qup-spi3-default-state { + pins = "gpio8", "gpio9", "gpio10", "gpio11"; + function = "qup3"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_spi4_default: qup-spi4-default-state { + pins = "gpio12", "gpio13", "gpio96", "gpio97"; + function = "qup4"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_spi5_default: qup-spi5-default-state { + pins = "gpio14", "gpio15", "gpio16", "gpio17"; + function = "qup5"; + drive-strength = <2>; + bias-pull-up; + }; + sdc1_state_on: sdc1-on-state { clk-pins { pins = "sdc1_clk"; @@ -701,6 +786,211 @@ gpi_dma0: dma-controller@4a00000 { status = "disabled"; }; + qupv3_id_0: geniqup@4ac0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x04ac0000 0x2000>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; + #address-cells = <1>; + #size-cells = <1>; + iommus = <&apps_smmu 0xe3 0x0>; + ranges; + status = "disabled"; + + i2c0: i2c@4a80000 { + compatible = "qcom,geni-i2c"; + reg = <0x04a80000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_i2c0_default>; + interrupts = ; + dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, + <&gpi_dma0 1 0 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi0: spi@4a80000 { + compatible = "qcom,geni-spi"; + reg = <0x04a80000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_spi0_default>; + interrupts = ; + dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>, + <&gpi_dma0 1 0 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@4a84000 { + compatible = "qcom,geni-i2c"; + reg = <0x04a84000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_i2c1_default>; + interrupts = ; + dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, + <&gpi_dma0 1 1 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi1: spi@4a84000 { + compatible = "qcom,geni-spi"; + reg = <0x04a84000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_spi1_default>; + interrupts = ; + dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, + <&gpi_dma0 1 1 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@4a88000 { + compatible = "qcom,geni-i2c"; + reg = <0x04a88000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_i2c2_default>; + interrupts = ; + dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, + <&gpi_dma0 1 2 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi2: spi@4a88000 { + compatible = "qcom,geni-spi"; + reg = <0x04a88000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_spi2_default>; + interrupts = ; + dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>, + <&gpi_dma0 1 2 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c@4a8c000 { + compatible = "qcom,geni-i2c"; + reg = <0x04a8c000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_i2c3_default>; + interrupts = ; + dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, + <&gpi_dma0 1 3 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi3: spi@4a8c000 { + compatible = "qcom,geni-spi"; + reg = <0x04a8c000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_spi3_default>; + interrupts = ; + dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>, + <&gpi_dma0 1 3 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c4: i2c@4a90000 { + compatible = "qcom,geni-i2c"; + reg = <0x04a90000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_i2c4_default>; + interrupts = ; + dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, + <&gpi_dma0 1 4 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi4: spi@4a90000 { + compatible = "qcom,geni-spi"; + reg = <0x04a90000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_spi4_default>; + interrupts = ; + dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>, + <&gpi_dma0 1 4 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c5: i2c@4a94000 { + compatible = "qcom,geni-i2c"; + reg = <0x04a94000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_i2c5_default>; + interrupts = ; + dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, + <&gpi_dma0 1 5 QCOM_GPI_I2C>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi5: spi@4a94000 { + compatible = "qcom,geni-spi"; + reg = <0x04a94000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_spi5_default>; + interrupts = ; + dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>, + <&gpi_dma0 1 5 QCOM_GPI_SPI>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + usb_1: usb@4ef8800 { compatible = "qcom,sm6115-dwc3", "qcom,dwc3"; reg = <0x04ef8800 0x400>; From patchwork Wed Nov 30 20:09:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13060385 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DD0EC4321E for ; Wed, 30 Nov 2022 20:12:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229907AbiK3UMf (ORCPT ); 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[83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.10.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:10:21 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v2 11/12] arm64: dts: qcom: sm6115: Add WCN node. Date: Wed, 30 Nov 2022 21:09:49 +0100 Message-Id: <20221130200950.144618-12-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add WCN node to allow using wifi module. Signed-off-by: Adam Skladowski --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index e676b9d117e3..38b903592a57 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1305,6 +1305,28 @@ apps_smmu: iommu@c600000 { ; }; + wifi: wifi@c800000 { + compatible = "qcom,wcn3990-wifi"; + reg = <0x0c800000 0x800000>; + reg-names = "membase"; + memory-region = <&wlan_msa_mem>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + ; + iommus = <&apps_smmu 0x1a0 0x1>; + qcom,msa-fixed-perm; + status = "disabled"; + }; + apcs_glb: mailbox@f111000 { compatible = "qcom,sm6115-apcs-hmss-global"; reg = <0x0f111000 0x1000>; From patchwork Wed Nov 30 20:09:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Skladowski X-Patchwork-Id: 13060382 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26D8DC4708C for ; Wed, 30 Nov 2022 20:12:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230031AbiK3UMV (ORCPT ); Wed, 30 Nov 2022 15:12:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45110 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230076AbiK3ULq (ORCPT ); Wed, 30 Nov 2022 15:11:46 -0500 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A2F34E682; Wed, 30 Nov 2022 12:10:24 -0800 (PST) Received: by mail-lj1-x22a.google.com with SMTP id z4so22181486ljq.6; Wed, 30 Nov 2022 12:10:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZI36fDcXOdBjV+BrFI2iVTCVlIJAblM9KI9TL7sAns8=; b=TLnqAXll6nYU3/cRmZ9Qb5BrSLih5PKDpNI/nN0IqYBT75P7ZTfcaSxQ1vzQCOphf1 4dH78gHGmendt1LXrbeD4+DgE4L5Q1Ar+dpwrJTJMLQoLLsfPNSXb3aLBhgIo2QXxUIl z2EHmQR9O+O9Fg8sPELylItlPE2bC+O3x2pQWtdtBbdg8MHUolxP0hjRyK8m1z3Y1EET sQMvyqPamW2HGY3/x76DRMZILwQ9/RCxhVcN4en3dfpiWOo+DoydkfsH17u5YcVTIdaj DN1oVmz6ath7K/OXtf+KBHb9dGM8mYbWxhNJs3RT7M0HOFbjak8fiQp/42Njrl4Z/GiB NcYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZI36fDcXOdBjV+BrFI2iVTCVlIJAblM9KI9TL7sAns8=; b=7CfZvg5G49sT84Wo0UOzcIbDKoD4VH7/fE4+zSxwHXtM1qkBem1sYwJzKpW5fAGvHS qY40XuQMVx1uzBJOMqsKpoAersVe9s6nVfhqnsY/LyIYAt8axdTEhLqXzbh5pQPKsfuA zQDerYF1ChoA/HJlQgZ9CtrDnC854ITr0cbxLIwB/ivk0IWAgZDcR+RaQGpNih0vVidD 6zuc+EnLDIn4IMrIuz7H86nLvNZL4fFoNMkFthrpPho0e3mwvmjWYmN0xipDGyn4kVZU DvWtOU7fnIHUHUvsmke+/GyDHE8GbGD8zZM6ISuXDeSATrHce22q+SUsiUk2V65NhqIt cEhw== X-Gm-Message-State: ANoB5pnLLMsLowr1lQIVTWfHs15cJtEWiFdCNMen/sEivuAWwC01Osbe gD3CR0z/aS5I6BTAFfgNe1Qvg/4Ii4I= X-Google-Smtp-Source: AA0mqf6fR/tKq40y1o1ew89Q6kWJtu3M42/4bXxdpMmVeT0mXXt9SSBGrAf8yGd0Pz6k3OUuLYKWqA== X-Received: by 2002:a2e:be08:0:b0:277:857:87ab with SMTP id z8-20020a2ebe08000000b00277085787abmr13626350ljq.442.1669839023684; Wed, 30 Nov 2022 12:10:23 -0800 (PST) Received: from localhost.localdomain (ccy110.neoplus.adsl.tpnet.pl. [83.30.148.110]) by smtp.gmail.com with ESMTPSA id a25-20020a056512201900b004b4e9580b1asm369754lfb.66.2022.11.30.12.10.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Nov 2022 12:10:23 -0800 (PST) From: Adam Skladowski Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, Adam Skladowski , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Loic Poulain , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v2 12/12] arm64: dts: qcom: sm6115: Add smmu fallback to qcom generic compatible Date: Wed, 30 Nov 2022 21:09:50 +0100 Message-Id: <20221130200950.144618-13-a39.skl@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221130200950.144618-1-a39.skl@gmail.com> References: <20221130200950.144618-1-a39.skl@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add fallback to generic qcom mmu-500 implementation. Signed-off-by: Adam Skladowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 38b903592a57..572bf04adf90 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1233,7 +1233,7 @@ dispcc: clock-controller@5f00000 { }; apps_smmu: iommu@c600000 { - compatible = "qcom,sm6115-smmu-500", "arm,mmu-500"; + compatible = "qcom,sm6115-smmu-500", "qcom,smmu-500", "arm,mmu-500"; reg = <0x0c600000 0x80000>; #iommu-cells = <2>; #global-interrupts = <1>;