From patchwork Thu Dec 1 01:05:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Umesh Nerlige Ramappa X-Patchwork-Id: 13060874 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B8EEEC4321E for ; Thu, 1 Dec 2022 01:05:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 93FEA10E525; Thu, 1 Dec 2022 01:05:43 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4BA1010E51F for ; Thu, 1 Dec 2022 01:05:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669856737; x=1701392737; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=6xsVxME1nH1BLSKPRPTq7Gcgak4l7Y8adC5Qo+Nz3RA=; b=SReQGE29YgFSQRwa7li02e5vMR1qTYQfLA6jhG1DYdYEc4ZNEwG8thsX ZwPYxix5vpqFOX2m32OwsQM4jB0OmS/6JmJBSK1DuFusRenJ0I3YkH0rL bCzxmNk5t4bl1CpSakFPyrWatKujvM4wojmwimizUThuhZe8kInAImWRy zl44OS+EeFyO1jZobJK8dn+GheBD6FXZXK2xBJTrdkxB3IA3CyzGHeURX JWQp1sKp8SdTREOFgYFv2d6/L2ve8WRv4v05RMxHcfO0uvBAjK1XX4cbt Eb8t6+dxHtU3fUO6uMLjR6dj4KtheX5lP9Mh8cQ1EGMJEFW0+uYP6TZqv Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="377718678" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="377718678" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 17:05:36 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="973322674" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="973322674" Received: from unerlige-ril.jf.intel.com ([10.165.21.138]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 17:05:36 -0800 From: Umesh Nerlige Ramappa To: intel-gfx@lists.freedesktop.org Date: Wed, 30 Nov 2022 17:05:32 -0800 Message-Id: <20221201010535.1097741-2-umesh.nerlige.ramappa@intel.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221201010535.1097741-1-umesh.nerlige.ramappa@intel.com> References: <20221201010535.1097741-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 1/4] drm/i915/mtl: Resize noa_wait BO size to save restore GPR regs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On MTL, gt->scratch was using stolen lmem. An MI_SRM to stolen lmem caused a hang that was attributed to saving and restoring the GPR registers used for noa_wait. Add an additional page in noa_wait BO to save/restore GPR registers for the noa_wait logic. Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/gt/intel_gt_types.h | 6 ------ drivers/gpu/drm/i915/i915_perf.c | 25 ++++++++++++++++-------- 2 files changed, 17 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h index c1d9cd255e06..13dffe0a3d20 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h @@ -296,12 +296,6 @@ enum intel_gt_scratch_field { /* 8 bytes */ INTEL_GT_SCRATCH_FIELD_COHERENTL3_WA = 256, - - /* 6 * 8 bytes */ - INTEL_GT_SCRATCH_FIELD_PERF_CS_GPR = 2048, - - /* 4 bytes */ - INTEL_GT_SCRATCH_FIELD_PERF_PREDICATE_RESULT_1 = 2096, }; #endif /* __INTEL_GT_TYPES_H__ */ diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 00e09bb18b13..7790a88f10d8 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -1842,8 +1842,7 @@ static u32 *save_restore_register(struct i915_perf_stream *stream, u32 *cs, for (d = 0; d < dword_count; d++) { *cs++ = cmd; *cs++ = i915_mmio_reg_offset(reg) + 4 * d; - *cs++ = intel_gt_scratch_offset(stream->engine->gt, - offset) + 4 * d; + *cs++ = i915_ggtt_offset(stream->noa_wait) + offset + 4 * d; *cs++ = 0; } @@ -1876,7 +1875,13 @@ static int alloc_noa_wait(struct i915_perf_stream *stream) MI_PREDICATE_RESULT_2_ENGINE(base) : MI_PREDICATE_RESULT_1(RENDER_RING_BASE); - bo = i915_gem_object_create_internal(i915, 4096); + /* + * gt->scratch was being used to save/restore the GPR registers, but on + * MTL the scratch uses stolen lmem. An MI_SRM to this memory region + * causes an engine hang. Instead allocate an additional page here to + * save/restore GPR registers + */ + bo = i915_gem_object_create_internal(i915, 8192); if (IS_ERR(bo)) { drm_err(&i915->drm, "Failed to allocate NOA wait batchbuffer\n"); @@ -1910,14 +1915,19 @@ static int alloc_noa_wait(struct i915_perf_stream *stream) goto err_unpin; } + stream->noa_wait = vma; + +#define GPR_SAVE_OFFSET 4096 +#define PREDICATE_SAVE_OFFSET 4160 + /* Save registers. */ for (i = 0; i < N_CS_GPR; i++) cs = save_restore_register( stream, cs, true /* save */, CS_GPR(i), - INTEL_GT_SCRATCH_FIELD_PERF_CS_GPR + 8 * i, 2); + GPR_SAVE_OFFSET + 8 * i, 2); cs = save_restore_register( stream, cs, true /* save */, mi_predicate_result, - INTEL_GT_SCRATCH_FIELD_PERF_PREDICATE_RESULT_1, 1); + PREDICATE_SAVE_OFFSET, 1); /* First timestamp snapshot location. */ ts0 = cs; @@ -2033,10 +2043,10 @@ static int alloc_noa_wait(struct i915_perf_stream *stream) for (i = 0; i < N_CS_GPR; i++) cs = save_restore_register( stream, cs, false /* restore */, CS_GPR(i), - INTEL_GT_SCRATCH_FIELD_PERF_CS_GPR + 8 * i, 2); + GPR_SAVE_OFFSET + 8 * i, 2); cs = save_restore_register( stream, cs, false /* restore */, mi_predicate_result, - INTEL_GT_SCRATCH_FIELD_PERF_PREDICATE_RESULT_1, 1); + PREDICATE_SAVE_OFFSET, 1); /* And return to the ring. */ *cs++ = MI_BATCH_BUFFER_END; @@ -2046,7 +2056,6 @@ static int alloc_noa_wait(struct i915_perf_stream *stream) i915_gem_object_flush_map(bo); __i915_gem_object_release_map(bo); - stream->noa_wait = vma; goto out_ww; err_unpin: From patchwork Thu Dec 1 01:05:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Umesh Nerlige Ramappa X-Patchwork-Id: 13060873 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 41CBFC4321E for ; Thu, 1 Dec 2022 01:05:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 21B8B10E51F; Thu, 1 Dec 2022 01:05:42 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7295E10E524 for ; Thu, 1 Dec 2022 01:05:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669856737; x=1701392737; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=PgbIvlXQpt+CQeBdZCgvXcNa7x98eVwu9O/ZRxI7EP4=; b=ESyrM9E+wdX+NmE1JNr5/dx6IJY1WJL5ZqSdp6eGYKYGZFiDO99Sx8vo QbW/j6AW/MyBbobt7z0emULlwWV/OPD2QF+ifqRRyECbCWYwHquMwSj1i 6t1sEiIygbkOJQFxOKJYeYm+68Uy+d3umMsQMvQ3SoOeZYGo1JhtzcRln H4ROHaIUXFQlgPXQyU1YGvlSiVNeC5xp2/EzjerPL22wTn0o20S9ts6d1 kPFi5bwMTQALw0leg+UrmkdU/42RODASwmkarHqUYulhR/ZyJqswyQys1 obqKzopyvGDFRXG+9hVk0kTyyNev2vHSadWtYqScGo/F1bQIS81e4s/th w==; X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="377718679" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="377718679" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 17:05:36 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="973322676" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="973322676" Received: from unerlige-ril.jf.intel.com ([10.165.21.138]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 17:05:36 -0800 From: Umesh Nerlige Ramappa To: intel-gfx@lists.freedesktop.org Date: Wed, 30 Nov 2022 17:05:33 -0800 Message-Id: <20221201010535.1097741-3-umesh.nerlige.ramappa@intel.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221201010535.1097741-1-umesh.nerlige.ramappa@intel.com> References: <20221201010535.1097741-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 2/4] drm/i915/mtl: Add Wa_14015846243 to fix OA vs CS timestamp mismatch X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Similar to ACM, OA timestamp that is part of the OA report is shifted when compared to the CS timestamp. Add MTL to the WA. Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_perf.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 7790a88f10d8..8ed9af571de9 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -3136,8 +3136,11 @@ get_sseu_config(struct intel_sseu *out_sseu, */ u32 i915_perf_oa_timestamp_frequency(struct drm_i915_private *i915) { - /* Wa_18013179988:dg2 */ - if (IS_DG2(i915)) { + /* + * Wa_18013179988:dg2 + * Wa_14015846243:mtl + */ + if (IS_DG2(i915) || IS_METEORLAKE(i915)) { intel_wakeref_t wakeref; u32 reg, shift; From patchwork Thu Dec 1 01:05:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Umesh Nerlige Ramappa X-Patchwork-Id: 13060876 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 05385C4321E for ; Thu, 1 Dec 2022 01:05:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AC8D610E526; Thu, 1 Dec 2022 01:05:52 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id A332810E51E for ; Thu, 1 Dec 2022 01:05:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669856737; x=1701392737; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=KA5QAHPT9WP9+4vD5w62rVAkvo07OGuqi9++nL7BK9s=; b=oD4GZI57m+O3jT+XbQjBgrOLWOPuOxmXWtJtI6kPW6bOTI0d70FYmsiN Nj6oKotszVx1NK5oDyKKo6lEWFJCFntNH5HtczTtOaLIio9orhzNtYYpy W0gjw5186tGh9bgxQgrdGX5BlmHgG5h2LPww2zkhN5hpOGzAWMIzVd3uW D1/5+yjBDKsGt3WR1rY8OB6e8GetnW+gfBS96CtFJBYiy0o4+BXxUCdg9 RksPsGiRILXjnuz9BO9caxbx24Mu8/jat82RH4gDc5rHmUD8TpJ9exYsb a7IVnV/vxfoMMlOgJxq+bSUx5bfgSzhgce7ri6Ye/SsBAr5kOE1WHHaOr Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="377718680" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="377718680" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 17:05:36 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="973322677" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="973322677" Received: from unerlige-ril.jf.intel.com ([10.165.21.138]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 17:05:36 -0800 From: Umesh Nerlige Ramappa To: intel-gfx@lists.freedesktop.org Date: Wed, 30 Nov 2022 17:05:34 -0800 Message-Id: <20221201010535.1097741-4-umesh.nerlige.ramappa@intel.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221201010535.1097741-1-umesh.nerlige.ramappa@intel.com> References: <20221201010535.1097741-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 3/4] drm/i915/mtl: Update OA mux whitelist for MTL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" 0x20cc (WAIT_FOR_RC6_EXIT on other platforms) is repurposed on MTL. Use a separate mux table to verify oa configs passed by user. Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_perf.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 8ed9af571de9..8369ae4b850d 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -4318,6 +4318,17 @@ static const struct i915_range gen12_oa_mux_regs[] = { {} }; +/* + * Ref: 14010536224: + * 0x20cc is repurposed on MTL, so use a separate array for MTL. + */ +static const struct i915_range mtl_oa_mux_regs[] = { + { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */ + { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */ + { .start = 0x9840, .end = 0x9840 }, /* GDT_CHICKEN_BITS */ + { .start = 0x9884, .end = 0x9888 }, /* NOA_WRITE */ +}; + static bool gen7_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr) { return reg_in_range_table(addr, gen7_oa_b_counters); @@ -4361,7 +4372,10 @@ static bool xehp_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr) static bool gen12_is_valid_mux_addr(struct i915_perf *perf, u32 addr) { - return reg_in_range_table(addr, gen12_oa_mux_regs); + if (IS_METEORLAKE(perf->i915)) + return reg_in_range_table(addr, mtl_oa_mux_regs); + else + return reg_in_range_table(addr, gen12_oa_mux_regs); } static u32 mask_reg_value(u32 reg, u32 val) From patchwork Thu Dec 1 01:05:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Umesh Nerlige Ramappa X-Patchwork-Id: 13060875 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 27586C4321E for ; Thu, 1 Dec 2022 01:05:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 37A7310E524; Thu, 1 Dec 2022 01:05:43 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id CA28B10E525 for ; Thu, 1 Dec 2022 01:05:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669856737; x=1701392737; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=LieA/ZpVmOxaO/0Rh0ylDNu9nivieve/GQ/6RmFpWk4=; b=l7kWYChRrOlyGfV2wcpfSBZYFCvsFwWbCTlEtXsUrlUWkS/I6f3iZApO tsd2jhPDZl3Qx8ZC6m5IBlKzvAq4fES2cQgOLFWtIDOeTgdqt4MIG8qcJ Y1d35ucVeYscvcmh9LGbS6BM56qtHY1Rczjl/U1ICq9i9d7eI9Ia2EC0W sv5TcibuTY725MDc0ZcVWXuZVh6lFLA1+duFL+Q4KVlC3ARsjhgf6SEau ZYXwbmysc42nrZHd2aWz8ng+iq0ONvFsNmYlmLxJmA0gAmwuZlwMs21Sa eKGP8Pr6acBrK4a5FhiFnHVe3Ex+0LKkViZsYIkevSorOQTHVGciyd34e w==; X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="377718681" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="377718681" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 17:05:37 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10547"; a="973322678" X-IronPort-AV: E=Sophos;i="5.96,207,1665471600"; d="scan'208";a="973322678" Received: from unerlige-ril.jf.intel.com ([10.165.21.138]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2022 17:05:36 -0800 From: Umesh Nerlige Ramappa To: intel-gfx@lists.freedesktop.org Date: Wed, 30 Nov 2022 17:05:35 -0800 Message-Id: <20221201010535.1097741-5-umesh.nerlige.ramappa@intel.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20221201010535.1097741-1-umesh.nerlige.ramappa@intel.com> References: <20221201010535.1097741-1-umesh.nerlige.ramappa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 4/4] drm/i915/mtl: Add OA support by enabling 32 bit OAG formats for MTL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Without an entry in oa_init_supported_formats, OA will not be functional in MTL. Enable OA support by enabling 32 bit OAG formats for MTL. Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_perf.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 8369ae4b850d..a735b9540113 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -4772,6 +4772,7 @@ static void oa_init_supported_formats(struct i915_perf *perf) break; case INTEL_DG2: + case INTEL_METEORLAKE: oa_format_add(perf, I915_OAR_FORMAT_A32u40_A4u32_B8_C8); oa_format_add(perf, I915_OA_FORMAT_A24u40_A14u32_B8_C8); break;